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In this study, a micro in-plane p-type thermoelectric generator (TEG), which consists of thin-film Si1−x−yGexSny ternary alloy semiconductor on insulator, is developed to make efficient use of waste heat such as human body. A power factor value as high as 1095 μWm−1K−2 had been achieved using B-ion implanted and short-term rapid thermal annealing (RTA) process. In addition, a measuring scheme for micro TEG without external load resistance was designed. In one measuring session, multiple parameters can be measured. The micro single-arm TEG prepared by semiconductor process can output 0.29 nW power at a temperature difference of 15 K, and a cross-sectional power density has reached up to 0.58 mW/cm2, which is a superior value for wearable device. The findings of this study have important reference value for wearable device performance improvement and output power measuring of micro TEG.

Group-IV alloy semiconductor materials are much attractive for photovoltaic application, as those realizes multijunction photovoltaic with multi-heterostructure like group-III-V compound semiconductors [1]. In addition, group-IV alloy materials are expected to be familiar to Si integrated electronics. Ge1–x–ySixSny is one of candidate materials suitable for multijunction photovoltaic, since ternary alloy semiconductor provides energy band design independent on the lattice constant. The energy band gap of Ge1–x–ySixSny can be controlled from 0.66 eV to 1.0 eV with the epitaxial layer whose lattice is matching to Ge substrate. We previously reported the epitaxial growth of Ge1–x–ySixSny layers and also investigated the crystalline and electronic properties of them [2, 3]. However, the junction properties of Ge1–x–ySixSny/Ge heterostructure have not been well understood and it is necessary to clarify the crystalline and electronic properties of group-IV ternary alloy hetero junctions. In this study, we examined the crystal growth of pseudomorphic epitaxial layers of Ge1–x–ySixSny ternary alloy on Ge(001) substrates to form heterojunction structure for photovoltaic application. We also investigated the electronic and optoelectronic properties of these Ge1–x–ySixSny/n-Ge heterojunction diodes. Substrate used was n-type Ge(001) wafer. After chemical cleaning of substrate, a 200 nm-thick undoped Ge1–x–ySixSny layer was grown at 150–350 °C on substrate using molecular beam epitaxy system in ultrahigh vacuum chamber. Ge and Sn were deposited using Knudsen cells and Si was done using electron gun evaporation. Then, we prepared a mesa-shaped structure with wet etching. A 300 nm-thick SiO2 layer was deposited with coating of spin-on-glass and annealing at 450 °C. Finally, an Al electrode was prepared on contact holes to form heterojunction diode structure. We confirmed the crystalline structure of epitaxial layers with X-ray diffraction reciprocal space mapping. A Ge1–x–ySixSny layer with a high Sn content of 12% can be prepared with lattice matching epitaxy on Ge at a low temperature below 250 °C. It is also found that the small misfit between Ge1–x–ySixSny and Ge effectively impacts on the high crystalline quality and high thermal stability of substitutional Sn atoms in Ge matrix. Absorption spectroscopy and current-voltage characteristics of undoped Ge1–x–ySixSny/n-Ge heterojunction diodes were also performed. We observed good rectifying property of the diodes meaning that the majority carrier of these undoped Ge1–x–ySixSny ternary alloy layers is hole unintentionally generated due to defects. We also found the extension of the energy band gap of Ge1–x–ySixSny layer with Si and Sn contents. Photovoltaic property of Ge1–x–ySixSny/Ge heterojunction diodes were also measured. We can see the increasing of the open circuit voltage, Voc from 0.08 to 0.12 V for undoped Ge/n-Ge to undoped Ge0.54Si0.36Sn0.10/Ge heterojunction photovoltaic cell structure, which indicates the enhancement of Voc with increasing the energy bandgap of epitaxial layer. We also achieved the improvement of Voc by 0.14 V with 500 °C-annealing in hydrogen (H2) ambient, which suggests the annihilation or termination of point defect in the heterojunction structure. In conclusions, heterojunction structure with Ge1–x–ySixSny ternary alloy semiconductor layer provides the energy band engineering for photovoltaic applications. Understanding and controlling the defect properties in epitaxial growth and heterojunction formation should be key factors for the enhancement of performance of group-IV multijunction photovoltaic. References [1] S. Asaba et al., in Ext. Abstra. of Int. Conf. on Solid State Devices and Materials (SSDM2013), pp. 1172-1173, Fukuoka, Japan, Sept. 2013. [2] T. Asano et al., Solid State Electronics 110, 49 (2015). [3] T. Yamaha et al., Appl. Phys. Lett. 108, 061909 (2016).

Silicon tin (Si1−x Sn x ) layers with an Sn content of 11%, which is almost 100 times the solid solubility limit, have been successfully grown on lattice-matched Si1−y Ge y surfaces using molecular beam epitaxy. The crystallographic analyses revealed that the Sn precipitation did not occur during the growth, even using a deposition temperature (T d) exceeding the Si-Sn eutectic point (231.97 °C). Further, the epitaxial thickness could be increased from 20 to 100 nm with T d from 250 to 350 °C without any Sn precipitation. Utilizing a lattice-matched Si1−y Ge y buffer will be a powerful tool to realize epitaxial Si1−x Sn x layers with various Sn contents.

Boron-doped silicon nanocrystals (Si-NCs)/amorphous silicon oxide (a-SiO y ) multilayers were prepared by plasma-enhanced chemical vapor deposition and post-annealing of boron-doped Si-rich amorphous silicon oxide (a-SiO x ) and a-SiO y multilayers. The diameter of Si-NCs was changed by varying the thickness of the a-SiO x layer (t a-SiOx ) from 3 to 50 nm. The electrical conductivity (σ) was increased in the t a-SiOx range of 3 to 13 nm and saturated around 5.7 kS·m−1. This tendency corresponds to crystal volume fraction in the Si-NCs multilayers. Seebeck coefficient (S) was almost constant at 230 μV·K−1 and showed no dependence on t a-SiOx . Thermal conductivity (κ) was in the range of 1.4–1.5 W·m−1·K−1 and almost independent of t a-SiOx , which is much lower than that of bulk Si. A maximum power factor of 0.33 mW·m−1·K−2 was obtained at t a-SiOx = 13 nm.

The performance of a thermoelectric (TE) generator consisting of GeSn wire is experimentally found to be higher than that of a TE generator fabricated by Si wire. The TE generators are developed in a cavity-free architecture, where the wires are directly placed on the substrate without forming a cavity space underneath. In the cavity-free structure, the heat current flows perpendicularly to the substrate and the TE generator is driven by a steep temperature gradient established around the heater inlet. With an identical patterning design, the TE performance of both generators is characterized by varying lengths. The maximum Seebeck coefficient of the generator consisting of GeSn is −277 μV K−1 and that for the Si is −97 μV K−1. The GeSn-TE generator achieves a higher power factor of 31 μW· K−2· cm−1 than that of the Si-TE generator of 12 μW· K−2· cm−1. The maximum areal power density of the GeSn-TE generator is intrinsically higher than that of the Si-TE generator by approximately 2.5 to 6 times considering the wire thickness difference. The obtained results support the superiority of the GeSn-TE generator over the Si-TE generator.

1. Background and purpose Silicon tin (SiSn) alloys are attractive candidate for the next-generation group-IV semiconductors. It is well known that Si and Ge change from indirect to direct transition types with the addition of Sn. Among them, SiSn alloys are expected to be applied for the near-infrared optical devices because it is predicted to become a direct band-gap appropriate for the optical communication with sufficient Sn content [1]. Although the Sn composition that changes from indirect to direct band-gap has been reported using several calculations, there are few reports of experimental results. In addition, the optical properties of single crystalline Si1-x Sn x have not been sufficiently clarified owing to the difficulty of crystal growth. In this study, we evaluated the optical properties to clarify the band structure of single crystalline Si1-x Sn x . 2. Experimental method Strained 30 nm-thick Si1-x Sn x films were grown on Si substrate by molecular beam epitaxy (MBE), and epitaxial growth was confirmed by X-ray diffraction (XRD) two-dimensional reciprocal space mapping (2DRSM) [2]. The Sn composition was determined by 2DRSM. The Sn fraction x of Si1-x Sn x samples used in this study were 0.005, 0.009, 0.018, 0.022, and 0.06. The spectroscopic ellipsometry measurements were performed with an incident angle of 70°, using a 70 W xenon lamp with a wavelength range of 200 to 1600 nm for the light source. The functions used in the analysis are the Tauc-Lorentz and Lorentz function. 3. Results and Discussion Figure 1(a) and (b) show real part and imaginary part of the complex dielectric functions for Si1-x Sn x (x=0.005 - 0.06) and pure-Si, respectively. From Fig. 1, it can be confirmed that the spectra shift with increasing Sn composition and the peaks appear around 1.8 eV and 2.8 eV for the samples with high Sn composition (2.2% and 6.0%). The peak shift characteristic with the addition of Sn is similar to the results of germanium tin (GeSn) [3]. The complex dielectric functions of the semiconductor include much information about the electronic band structure. In Fig. 1, the sharp peaks that are due to direct band transitions show what is known as critical points (CPs). In the case of Si, E'0 CP (Γ) and E 1 CP (L) energy are around 3.2 eV [4]. Therefore, it can be considered that the peak at 2.8 eV indicates the separation of the E'0 and E 1 CP energies due to the change in the band gap at the Γ point with the addition of Sn. The peak at 1.8 eV is unique to Si1-x Sn x , which is not found in Si. We consider that this peak is due to the split-off valence band caused by the Sn addition. The behavior of the valence band is strongly affected by strain. These results suggest a reduction of the band gap at the Γ point and the formation of an optical transition region due to the Sn addition, and reveal important findings for the application of SiSn for the near-infrared devices. Acknowledgment This work was partly supported by the Japan Society for the Promotion of Science (JSPS) (17J08240, 19K21971, and 21H01366). References [1] M. Kurosawa et al., Appl. Phys. Lett. 106, 171908 (2015). [2] R. Yokogawa et al., ECS Trans. 98. 291 (2020). [3] M. Medikonda et al., J. Vac. Sci. Technol. B 32, 061805 (2014). [4] P. Lautenschlager et al., Phys. Rev. B 36, 9 (1987). Figure 1

The interest in thermoelectrics (TE) for an electrical output power by converting any kind of heat has flourished in recent years, but questions about the efficiency at the ambient temperature and safety remain unanswered. With the possibility of integration in the technology of semiconductors based on silicon, highly harvested power density, abundant on earth, nontoxicity, and cost-efficiency, Si1-x-yGexSny ternary alloy film has been investigated to highlight its efficiency through ion implantation and high-temperature rapid thermal annealing (RTA) process. Significant improvement of the ambient-temperature TE performance has been achieved in a boron-implanted Si0.864Ge0.108Sn0.028 thin film after a short time RTA process at 1100 °C for 15 seconds, the power factor achieves to 11.3 μWcm−1 K−2 at room temperature. The introduction of Sn into Si1-xGex dose not only significantly improve the conductivity of Si1-xGex thermoelectric materials but also achieves a relatively high Seebeck coefficient at room temperature. This work manifests emerging opportunities for modulation Si integration thermoelectrics as wearable devices charger by body temperature.

We investigate Sn incorporation effects on the thermoelectrical characteristics of n-type Ge-rich Ge1−x−y Si x Sn y layers (x ≈ 0.05−0.1, y ≈ 0.03) pseudomorphically grown on semi-insulating GaAs(001) substrates by molecular beam epitaxy. Despite the low Sn content of 3%, the Sn atoms play a role in suppressing the thermal conductivity from 13.5 to 9.0 Wm−1 K−1 without degradation of the electrical conductivity and the Seebeck coefficient. Furthermore, a relatively high power factor (maximum: 14 μW cm−1 K−2 at room temperature) was also achieved for the Ge1−x−y Si x Sn y layers, almost the same as the Si1−x Ge x ones (maximum: 12 μW cm−1 K−2 at room temperature) grown with the same conditions. This result opens up the possibility of developing Sn-incorporated group-IV thermoelectric devices.

A simple method to form ultra-thin (2 and Si3N4. We found that decreasing the Ge thickness reduces the grain size and increases the grain boundary barrier height, causing carrier mobility degradation. We examined two methods, known effective to enhance the grain size in the thicker Ge (>100 nm). As a result, a relatively high Hall hole mobility (59 cm2 V−1 s−1) has been achieved with a 20 nm thick polycrystalline Ge layer on Si3N4, which is the highest value among the previously reported works.

To confirm the feasibility of a theoretically proposed method of forming free-standing germanene [Araidai et al., J. Appl. Phys. 128, 125301 (2020).], we experimentally investigated the hydrogen desorption properties of hydrogen-terminated germanane (GeH) flakes. Thermal desorption spectroscopy analysis revealed that hydrogen desorption occurred during heating under an ultrahigh vacuum environment corresponding to a mass loss of 1.0 wt%. Moreover, we have found that using an ultrahigh vacuum, ambient and short-time annealing for hydrogen desorption is a key to sustain the crystal structures.

To achieve high thermoelectric performance, laterally graded silicon germanium (SiGe) wires were fabricated by rapid melting growth (RMG) method. In addition, the structure evaluation of the RMG laterally graded SiGe wire were performed by Raman spectroscopy and electron backscattering pattern (EBSP). Ge fraction x and strain were estimated from one-dimensional distribution of Raman shift for Ge-Ge mode. As a result, an apparent change of Ge fraction x was observed. For, biaxial isotropic strain assumption, good agreement among the obtained Ge fraction x distribution and theoretical values in the RMG laterally graded SiGe wire near Si seed area were shown. Crystal orientation mapping was obtained by EBSP. It was revealed that the crystal orientation in the SiGe wire was changed from [001] to [110] with increasing growth length. These changes may also influence electronic and thermoelectric performance dramatically.

Low temperature (≤400 °C) formation of orientation-controlled large (≥10 µm) Ge-on-insulator (GOI) structures is desired to fabricate 3-dimensional large-scale integrated circuits (LSIs), where Ge-based functional devices are stacked on Si-LSIs. For this purpose, Si-seeded pulse-laser annealing (PLA) combined with low-temperature substrate heating (≤400 °C) has been developed. Here, a-Ge stripes on Si substrates partially covered with insulating films are subjected to PLA, where single edges of the a-Ge stripes directly contact Si-seeding substrates through opening windows of insulating films. PLA at room temperature generates lateral growth of Ge layers from Si-seeding substrates. However, the growth length is short (~1 µm), which is attributed to very short melting time. To increase the melting time, low-temperature (≤400 °C) substrate heating during PLA is examined. As a result, very large (~20 µm) orientation-controlled GOI is obtained by combining substrate heating (400 °C) with PLA. Detailed electron microscopy analysis reveals very high crystallinity of the grown layers. Consequently, high-quality rapid-melting growth of Ge becomes possible at a low processing temperature of ~400 °C. This thermally-assisted (~400 °C) Si-seeded PLA will facilitate realization of 3-dimensional LSIs.

The formation of Ge 1− x − y Si x Sn y /Ge 1− x Sn x /Ge 1− x − y Si x Sn y double heterostructures with strain-controlled Ge 1− x − y Si x Sn y layers and their crystalline properties were investigated. We achieved the epitaxial growth of double heterostructures consisting of a Ge 1− x Sn x layer with a Sn content of 9% sandwiched between compressive- or tensile-strained Ge 1− x − y Si x Sn y layers. The strain sign of the Ge 1− x − y Si x Sn y epitaxial layer influenced the crystallinity of the double heterostructures. Compressive-strained Ge 1− x − y Si x Sn y layers provided double heterostructures with higher crystallinity than the tensile-strained ones. The magnitude of strain in the Ge 1− x − y Si x Sn y layers also affected the surface roughness of the double heterostructures. Low surface roughness was achieved by decreasing the magnitude of strain in the Ge 1− x − y Si x Sn y layers. Moreover, the strain sign and/or Si content in Ge 1− x − y Si x Sn y influenced the thermal stability of the double heterostructures. Compressive-strained Ge 1− x − y Si x Sn y and/or a low Si content in Ge 1− x − y Si x Sn y improved the thermal stability of the double heterostructures to withstand annealing temperatures as high as 400 °C.

Solid phase crystallization (SPC) of amorphous GeSn (a-GeSn) layers with a Sn content of 2% on various insulating substrates of Si3N4, sapphire, and Y2O3 have been investigated. We found that Si3N4, which has almost same value of a higher surface energy with sapphire and the value is about twice as high as Y2O3, could be reduced the SPC temperature of a-GeSn layers (to 400 °C) compared with the other cases. We can see that a maximum grain size as large as 0.9 µm was achieved for polycrystalline GeSn layers on Si3N4 by the annealing at 450 °C for 5 h. Correspondingly, a relatively higher Hall hole mobility (180 cm2/Vs) was obtained.

As the first-generation semiconductor, silicon (Si) exhibits promising prospects in thermoelectric (TE) convention application with the advantages of un-toxic, abundant, robust, and compliant to the integrated circuit. However, Si-based TE materials are always implemented for high-temperature application and deficient at room temperature (RT) ambience. This study displays an N-type Si1−x−yGexSny thin film by carrying out the strategy of metallic modulation doping for enhancing its power factor (PF). It was distinct to observe the extra carriers poured from the precipitated Sn particles without prominent degradation of mobility while sustaining appreciable thermal conductivity. The PF of 12.21 μW cm−1 K−2 and zT of 0.27 were achieved at 125 °C, which illustrated the significant potential for implementation at near RT ambiance.

Germanane (GeH) is an attractive layered material with potential applications in channel of field-effect transistors and can be topochemically synthesized from CaGe 2 . So far, the film growth method of CaGe 2 has been limited to molecular beam epitaxy. In this study, we demonstrate CaGe 2 epitaxial film growth on Ge(111) substrates at 675–800 ° C by a scalable close-spaced evaporation method using a conventional lamp annealing furnace. Detailed investigation of the film structure by X-ray diffraction reveals that the CaGe 2 films consist mainly of the metastable 2H polytype and of a minor amount of the stable 6R polytype. The CaGe 2 film deposited at 800 ° C is converted to GeH by low temperature HCl treatment while the other CaGe 2 films transform to crystalline and nanocrystalline Ge. The reasons why only the CaGe 2 film synthesized at 800 ° C is converted to GeH is discussed in terms of the film microstructure observed by scanning electron microscopy. The absence of GeH in low-temperature deposited films after HCl treatment is attributed to the exfoliation of island crystals during HCl treatment. We thus show that close-spaced evaporation is a rapid and scalable method to prepare CaGe 2 epitaxial films as a precursor of GeH films and that the roughness of CaGe 2 should be improved for efficient conversion to GeH.

Toward creation of a direct gap group-IV semiconductor, we have developed a new method of growing Si1-xSnx layers with various Sn content including a very high Sn content around 40% by using solid phase epitaxy. Crystallographic analyses indicate that grown Si1−xSnx layers are nearly lattice-matched to the substrates, specifically, the substitutional Sn contents of ~20 and ~40% are achieved for case of growth on (001)-oriented Ge and InP substrates, respectively. Although band structure of the Si0.6Sn0.4 layers grown on InP is still indirect band gap, the difference between the indirect and direct band gap energies decreases from 3.01 (Si) to 0.14 eV (Si0.6Sn0.4) following Sn substitution.

Length-dependent thermal conductivity in $\text{Si}_{1-\mathrm{x}}\text{Ge}_{\mathrm{x}}$ nanocrystalline nanowires was investigated. We found that phonon transport in $\text{Si}_{1-\mathrm{x}}\text{Ge}_{x}$ nanowires is in the intermediate regime between ballistic and diffusive transport. In addition, the ballisticity of phonons changes with temperature and Ge composition. As the temperature increases and Ge composition decreases, heat conduction becomes more diffusive, but remains semi-ballistic even at room temperature. This series of experiments supports previous theoretic works and provides us with further understanding of heat conduction in nanoscale.

The interest in thermoelectrics (TE) for an electrical output power by converting any kind of heat has flourished in recent years, but questions about the efficiency at the ambient temperature and safety remain unanswered. With the possibility of integration in the technology of semiconductors based on silicon, highly harvested power density, abundant on earth, nontoxicity, and cost-efficiency, Si1-x-yGexSny ternary alloy film has been investigated to highlight its efficiency through ion implantation and high-temperature rapid thermal annealing (RTA) process. Significant improvement of the ambient-temperature TE performance has been achieved in a boron-implanted Si0.864Ge0.108Sn0.028 thin film after a short time RTA process at 1100 °C for 15 seconds, the power factor achieves to 11.3 μWcm−1 K−2 at room temperature. The introduction of Sn into Si1-xGex dose not only significantly improve the conductivity of Si1-xGex thermoelectric materials but also achieves a relatively high Seebeck coefficient at room temperature. This work manifests emerging opportunities for modulation Si integration thermoelectrics as wearable devices charger by body temperature.

1. Introduction Silicon tin (SiSn) is a new promising candidate material for next-generation optical devices since its energy band-gap is theoretically expected to a direct band-gap as Sn fraction increases [1, 2]. The lattice constant difference (strain states) between the substrate and the SiSn thin film directly affects a band-gap, a carrier mobility, and device design. Therefore, it is important to evaluate strain states in SiSn thin film and accurate strain evaluation techniques are indispensable. Raman spectroscopy is one of the powerful strain evaluation techniques because it is a high spatial resolution and nondestructive measurement. However, the strain shift coefficient of SiSn has not been experimentally investigated in contrast to silicon germanium, germanium tin, and highly accurate strain measurement cannot be performed by Raman spectroscopy. In this study, Raman measurement was performed to extract the strain-shift coefficient of SiSn thin films, accurately. 2. Experimental method SiSn thin films (Sn fraction: 0.50, 0.90, 1.8, 2.0, and 6.0%) were grown on (001)-Si substrate by molecular beam epitaxy. Their thickness was set to 50 nm. Sn fraction and in-plane biaxial strain were confirmed by X-ray diffraction (XRD). The Si1-x Sn x thin films were evaluated by Raman spectroscopy. Excitation source of ultraviolet laser (λ = 355 nm) was used and focal length of the Raman spectrometer was 2,000 mm. Wavenumber resolution is approximately 0.1 cm-1. The Raman spectra of the Si1-x Sn x thin films for Si-Si vibration mode were measured to determine the strain-shift coefficient. 3. Results and Discussion Figure 1 shows Raman spectra of Si1-x Sn x with x of 0.06 and bulk Si (Si-Si mode) for comparison. As a result, asymmetrical broadening on the low-wavenumber side with slight peak shift in the Raman spectrum for the SiSn thin film were observed. In the Raman scattering, this broadening is often explained using the so-called spatial correlation model, which reproduces the relaxation of momentum conservation due to random atom positions. Figure 2 shows the relationship between Raman peak shift of SiSn for Si-Si mode (Δω LO) and in-plane strain estimated by reciprocal space mapping using XRD. In this study, D’Costa model (see below equation) was used to obtain strain-free Raman shift for Si-Si mode [3]: ω 0 = 520 – 141.8x. (1) It was revealed that the relationship between Raman peak shift of SiSn for Si-Si mode and in-plane strain has clear linear dependence. From the slope of the straight line which calculated by linear approximation as shown in Fig. 2, the value of the strain-shift coefficient b was found to be -732 cm-1. This value shows good agreement with that of strained Si [4] and SiGe [5]. On the basis of the result, it is suggested that the strain-shift coefficient b is not affected by random atom positions (alloy state), and the value of b may not change by composition and strain state. In conclusion, these insights play an important role in the strain evaluation for the next-generation SiSn device by Raman spectroscopy and in the understanding the relationship between phonon behavior and strain. Acknowledgements This work was supported partly the Japan Society for the Promotion of Science (JSPS) (19K21971 and 17J08240). References [1] J. Tolle et al., Appl. Phys. Lett. 89, 231924 (2006). [2] M. Kurosawa et al., Appl Phys. Lett. 111, 192106 (2017). [3] V. R. D’Costa et al., Phys. Rev. B 76, 035211 (2007). [4] S. Nakashima et al., J. Appl. Phys. 99, 053512 (2006). [5] F. Pezzoli et al., J. Appl. Phys. 103, 093521(2008). Figure 1

Ternary alloy semiconductor of germanium-silicon-tin (GeSiSn) has attracted for electronic and optoelectronic applications, because this group-IV alloy material provides energy band engineering independent on the lattice constant like group III-V compound semiconductors [1]. In addition, GeSiSn/Ge(Sn) heterostructure realizes type-I energy band alignment with a sufficiently large band offset at both conduction and valence band edges with no or very small lattice mismatching [2,3], and that is preferable for effective carrier confinement for light emitting devices and high mobility transistors. On the other hand, there are still challenges for crystal growth with strain and band engineering of group-IV ternary alloy semiconductor thin films. GeSn is one of promising candidates for optoelectronic applications since it realizes direct transition group-IV semiconductor. GeSn with an in-plane lattice constant larger than Ge is better to enhance the emission efficiency, as the conduction band edge of the gamma-valley lowers than that of the L-valley with large lattice constant and/or in-plane tensile strain. Thus, a buffer layer such as GeSiSn with a lattice constant sufficiently larger than Ge is required to obtain direct transition GeSn thin films, and lattice-constant engineering technology of buffer and GeSn layers should be developed with well-controlled strain relaxation technique. Recently, we explored effective strain engineering technique of GeSiSn ternary alloy epitaxial layers on Ge and Si substrate to obtain much larger in-plane lattice constant. We investigated the effect of low-temperature growth of Ge buffer layer on the strain relaxation of GeSiSn layer [4,5]. Also, we examined the ion implantation technique into substrate to enhance the strain relaxation of GeSiSn epitaxial layers grown on Ge substrate [6]. We can achieve GeSiSn epitaxial layers with the enhancement of strain relaxation and the lattice constant larger than Ge, although the crystalline quality of these epitaxial layers should be still improved. We previously reported that the strain direction as compressive and tensile ones is significantly influence of GeSiSn epitaxial layers [7]. The control of strain structure and its relaxation process is keys to obtain high crystalline quality of GeSiSn and GeSn heteroepitaxial layers for improving the electronic and optoelectronic properties of group-IV heterostructures. References [1] S. Zaima, O. Nakatsuka, N. Taoka, M. Kuorsawa, W. Takeuchi, and M. Sakashita, Sci. Technol. Adv. Mater. 16, 043502 (22pages) (2015). [2] T. Yamaha, S. Shibayama, T. Asano, K. Kato, M. Sakashita, W. Takeuchi, O. Nakatsuka, and S. Zaima, Appl. Phys. Lett. 108, 061909 (5 pages) (2016). [3] M. Fukuda, K. Watanabe, M. Sakashita, M. Kurosawa, O. Nakatsuka, and S. Zaima, Semicond. Sci. Technol. 32, 104008 (2017). [4] M. Fukuda, T. Yamaha, T. Asano, S. Fujinami, Y. Shimura, M. Kurosawa, O. Nakatsuka, and S. Zaima, Mater. Sci. Semicond. Proc. 70, 156 (2017). [5] M. Fukuda, D. Rainko, M. Sakashita, M. Kurosawa, D. Buca, O. Nakatsuka, and S. Zaima, Semicond. Sci. Technol. 33 (12), 124018 (8 pages) (2018). [6] M. Fukuda, D. Rainko, M. Sakashita, M. Kurosawa, D. Buca, O. Nakatsuka, and S. Zaima, Jpn. J. Appl. Phys. 58, SIIB23 (2019). [7] T. Asano, T. Terashima, T. Yamaha, M. Kurosawa, W. Takeuchi, N. Taoka, O. Nakatsuka, and S. Zaima, Solid State Electronics 110, pp. 49-53 (2015).

Thermoelectric generator has attracted attention because of their ability to recover waste heat with converting it to electricity. The energy conversion efficiency is related to the thermoelectric figure of merit Z, expressed as Z = S2σ/κ, where σ and κ is electrical and thermal conductivities, respectively, and S is the Seebeck coefficient. Consequently, in order to achieve a high Z value, the material must possess a unique combination of electrical and thermal properties, i.e., metal-like high σ and glass-like low κ. In our previous study on electrical and thermal properties of a Ga-doped Ge0.929Sn0.071 thin film grown on Ge(001), it was revealed that simultaneous realization of a high σ (6.5×102 S/cm) and a low κ (2.0 Wm-1K-1) by the incorporations of the Sn and Ga atoms into Ge matrix [1]. Very recently, Uchida et al. [2] has reported heat transport property of polycrystalline GeSn (poly-GeSn) films on SiO2, together with the carrier transport property, to assess self-heating effect of the poly-GeSn channel thin-film transistors. Here, they showed a relatively lower κ of 5–9 Wm-1K-1 for poly-Ge1-xSnx (x-1K-1) [3]. These results are quite beneficial in the field of Ge-based thermoelectric generator. However, the thermoelectric properties of GeSn films have not been entirely understood. It is therefore, in the present study, we aim to reveal the thermoelectric properties of the Ge-rich poly-Ge1-xSnx films grown by solid phase crystallization. Doping effects in poly-Ge1-xSnxon the thermoelectric properties will be discussed. Acknowledgments The authors would like to thank Drs. Hiroshi Onoda and Yoshiki Nakashima of Nissin Ion Equipment Co., Ltd. for providing the opportunity to use ion implanters. This work was partially supported by a Grant-in-Aid for Scientific Research (S) (Grant No. 26220605) of the JSPS and PRESTO from JST. References [1] M. Kurosawa, M. Fukuda, K. Takahashi, M. Sakashita, O. Nakatsuka, and S. Zaima, “Thermophysical characterizations of Ge1-xSnx epitaxial layers aiming for thermoelectric device,” 9th International Conference on Silicon Epitaxy and Heterostructures (ICSI-9), Montreal, Canada, 4.4.1, May 21, 2015. [2] N. Uchida, T. Maeda, R. R. Lieten, S. Okajima, Y. Ohishi, R. Takase, M. Ishimaru, and J.-P. Locquet, Appl. Phys. Lett. 107, 232105 (2015). [3] C. J. Glassbrenner and G. A. Slack, Phys. Rev. 134, A1058 (1964).

We have investigated the epitaxial growth and crystalline properties of Ge1 − xSnx layers on a Si(110) substrate. We found that the twin growth in the Ge epitaxial layer deposited on the Si(110) using molecular beam epitaxy at a low temperature of 200 °C can be effectively suppressed by the incorporation of 2.0% Sn. We also examined the strain relaxation of annealed Ge1 − xSnx/Si(110) samples. The degree of strain relaxation is enhanced by the annealing process, and the threading dislocation in the Ge1 − xSnx layers decreases from 1011 cm− 2 to 1010 cm− 2 because of the propagation of misfit dislocations. We also observed misfit dislocations formed at the Ge1 − xSnx/Si interface, which would effectively promote isotropic strain relaxation in the Ge1 − xSnx layers.

We investigate hydrogen desorptions from monolayer and multilayer graphane analogs, namely, silicane (SiH) and germanane (GeH), by the first-principles calculations. It is found from the calculated pressure–temperature diagrams of the monolayer and multilayer SiH and GeH crystals that the hydrogen atoms can be removed by heating and reducing hydrogen partial pressure. We also perform thermal-desorption-spectroscopy measurements for the multilayer crystals in order to demonstrate the validity of the theoretical calculations, and it turns out that the theoretical results are worth believing. Our theoretical results for monolayer SiH/GeH crystals indicate monolayer SiH and GeH crystals possess high potential to find their application as a precursor to free-standing monolayer silicene and germanene, respectively.

In this study, we report a power factor (PF) value as high as 1950 μW m−1 K−2 for B-ion implanted thermoelectric Si1-x-yGexSny ternary alloy films at ambient temperature by radio frequency sputtering followed by a short-term rapid thermal annealing heat treatment. The record high PF value was realized by modulation doping of Sn in the Si1-x-yGexSny film. It was found that using metallic Sn as nanoparticles and Si1-x-yGexSny as the matrix leads to a large enhancement of the carrier concentration and a very small decrease in carrier mobility. As a result, the electrical conductivity and power factor of the modulation doped Si1-x-yGexSny alloy were greatly improved. The findings of this study present emerging opportunities for the modulation of Si integration thermoelectrics as wearable devices charged by body temperature.

International audience; Group 14 elemental post-graphene materials receive much attention because of their outstanding properties, typically, as robust 2D topological insulators. Their heterostructures are a main target in view of disruptive applications. Here, the realization of striking in-plane lateral heterostructures between germanene and stanene are shown, which are sustainable 2D Ge-and Snbased graphene analogs, but with a strong intrinsic spin-orbit coupling. A unique combination of atomic segregation epitaxy (ASE) and molecular beam epitaxy (MBE) for the in situ continuous fabrication of nearly atomically precise lateral multijunction heterostructures, respectively, consisting of atom-thin germanene and stanene on a Ag(111) thin film is used. Scanning tunneling microscopy (STM) observations at atomic scale and low-energy electron diffraction testify that germanene and stanene sheets without intermixing are prepared simultaneously on the same terraces at wide scale: tin and germanium atoms neither exchange their sites nor adsorb on the germanene and stanene sheets. The atomic structure of the boundary between germanene and stanene is derived from STM images, while scanning tunneling spectroscopy reveals key electronic features at the heterojunction. This innovative synergetic approach of ASE and MBE growths offers great flexibility for the realization of unprecedented lateral 2D heterostructures.

We have investigated the formation of an ultrathin Ge crystal layer by vacuum annealing of the Al/Ge(111) structure. An hetero-epitaxial Al layer was found to be grown on a Ge(111) substrate by control of Al thickness and deposition rate during thermal evaporation, which the Al surface becomes the template of crystallographic structure of a segregated Ge layer. Then, surface flattening and Ge segregation of the Al/Ge(111) structure by vacuum annealing were evaluated, and the formation of ultrathin segregated-Ge crystals with a thickness below 1 nm on the hetero-epitaxial Al surface have been demonstrated.

Phosphorus-doped silicon nanocrystals (Si-NCs)/silicon oxide (SiOy) multilayers were prepared by plasma enhanced chemical vapor deposition and post-annealing. After annealing, Si-rich amorphous silicon oxide (a-SiOx) and a-SiOy layer were converted into Si-NCs layer and lowly thermal conductive layer, respectively. The diameter of Si-NCs were changed by varying the thickness of a-SiOx layer from 3 to 10 nm. Electrical and thermal conductivity of Si-NCs/SiOy multilayers were decreased with decreasing the diameter (d) of Si-NCs. Thermal conductivity at d=3 nm was estimated at 1.48 W•m-1•K-1, which is much lower than that of bulk silicon. These results show that phosphorus doped Si-NCs/SiOy multilayers are promising for thermoelectric materials.

Ballistic heat conduction remains a controversial nanoscale phenomenon because of its occurrence and strength depending on the material, alloy composition, and temperature. Here, we discuss the impact of ballistic thermal conduction and compare the results with theoretical predictions. We experimentally investigate ballistic thermal transport in SiGe polycrystalline nanowires by measuring the length dependence of thermal conductivity for different alloy compositions and temperatures. At room temperature, our experiments show that ballistic effects are negligible in nanowires made of pure polycrystalline Si but become stronger as the Ge composition increases. As we decreased the temperature, we observed that ballistic contribution becomes even stronger.Ballistic heat conduction remains a controversial nanoscale phenomenon because of its occurrence and strength depending on the material, alloy composition, and temperature. Here, we discuss the impact of ballistic thermal conduction and compare the results with theoretical predictions. We experimentally investigate ballistic thermal transport in SiGe polycrystalline nanowires by measuring the length dependence of thermal conductivity for different alloy compositions and temperatures. At room temperature, our experiments show that ballistic effects are negligible in nanowires made of pure polycrystalline Si but become stronger as the Ge composition increases. As we decreased the temperature, we observed that ballistic contribution becomes even stronger.

Thermoelectric properties of Ge 0.95 Sn 0.05 layers with various Ga concentrations (1018–1020 cm−3) grown on GaAs and Si by LTMBE have been investigated. Even for single-crystalline layers, the thermal conductivity has been reduced down to 2.5 Wm−1K−1 by introducing the stacking faults due to microscopic tilt in crystals, which value is 4% of bulk-Ge. The layer possessed a good electrical conductivity and Seebeck coefficient (73% and 79% of bulk-Ge, respectively); hence, a relatively good figure-of-merit (ZT=0.13 at 300 K) was obtained.

We have investigated thermoelectric (TE) properties of poly-Ge}_{1-x}Sn}_{x} layers prepared with pulsed laser annealing in water. Even for polycrystalline layers, relatively high power factors of 0.37 and 0.92 mWK−2m−1 were obtained for p- and n-type poly-Ge}_{1-x}Sn}_{x} layers, respectively. The Ge}_{1-x}Sn}_{x}-based TE generator has been firstly fabricated blow the process temperature of 300 °C.

We performed a Peltier cooling experiment using SiGe wires fabricated by rapid-melting-growth (RMG) method. Thermal conductivity κ of SiGe wires estimated from the Peltier heating/cooling rate showed a significant dependence on the RMG process; the growth into one direction from a Si seed island exhibit a smaller κ than the bilateral growth. According to molecular dynamics simulation, the κ hardly depend on the compositional distribution, indicating the impact of the difference in the RMG processes.

Research and development of GeSn and related group-IV semiconductor materials have been widely extended in recent years for not only electronic transistors but also various optoelectronic applications [1,2]. Design and engineering of the energy band structure of group-IV semiconductor materials are swiftly blossoming with establishing the crystal growth technology of GeSn and related materials. We have successively developed the crystalline growth technology of GeSn and GeSiSn thin films on various substrates mainly by using molecular beam epitaxy [1-7]. Recently, we also achieved the epitaxial growth of GeSn layer by using metal organic chemical vapor deposition method [8]. In this presentation, we will report our recent achievements of our study for the crystalline growth and electronic properties including energy band structure of GeSn and related group-IV materials. Controlling the composition of elements and the strain structure of the group-IV semiconductor alloys promises prospective energy band engineering technology. Increasing in the Sn content over about 10% or tensile strain over about 1% achieve the indirect-to-direct crossover, which is a strong driving force of the optical applications of GeSn material. In addition, we recently achieved the formation of polycrystalline SiSn thin layers with a very high Sn content of 20%, and demonstrated that the direct bandgap decreases to 1.05 eV with Si-Sn alloying, which is just 0.22 eV higher than the indirect bandgap of the poly-SiSn even by using Si matrix material [9]. Also, the ternary alloy GeSiSn promises the control of the energy band structure independently on the lattice constant by changing each content of three elements. We found that unstrained GeSiSn/Ge heterostructure realizes a type-I energy band alignment without using strain structure, that promises various electronic and optoelectronic applications [10]. We will demonstrate the experimental results of the energy band engineering with GeSn and related materials. The energy band engineering also provides controlling technology of the electronic property at the interface such as metal/Ge contact. Recently, we found that the Sn/Ge or GeSn/Ge contacts effectively reduces the Schottky barrier height at the metal/n-Ge interface [11,12]. In our presentation, we will also discuss the influence of the energy band structure on the interface properties for Ge and GeSn. This work was partially supported by Grant-in-Aid for Scientific Researches of the JSPS and the JSPS Core-to-Core Program, A. Advanced Research Networks. References [1] S. Zaima, Jpn. J. Appl. Phys. 52, 030001 (2013). [2] S. Zaima et al., Sci. Technol. Adv. Mater., submitted. [3] S. Zaima et al., ECS Trans. 41, 231 (2011). [4] S. Zaima et al., ECS Trans. 50, 897 (2012). [5] O. Nakatsuka et al., ECS Trans. 58, 149 (2013). [6] S. Zaima et al. ECS Trans. 64, 147 (2014). [7] O. Nakatsuka et al. ECS Trans. 64, 793 (2014). [8] Y. Inuzuka et al., ECS Solid State Lett., submitted. [9] M. Kurosawa et al., Appl. Phys. Lett. 106, 171908 (2015). [10] T. Yamaha et al., in Abstr. of ICSI-9, Montreal, Canada, May, 2015. [11] Suzuki et al., Jpn. J. Appl. Phys. 53, 04EA06 (2014). [12] A. Suzuki et al., SSDM2015, Hokkaido, Japan, Sept. 2015, to be submitted.

We examined the formation of polycrystalline-Si1−x−yGexSny layers on SiO2 by the solid phase crystallization method. We investigated the impact of Sn incorporation on the polycrystallization, crystallinity, and electrical property of Si1−xGex layers. We found that the polycrystallization time of Si1−x−yGexSny decreases with increasing in the Sn content in the annealing at 500 °C. No Sn precipitation is observed after the crystallization of Si1−x−yGexSny layer with an Sn content of 2%, while severe Sn precipitation is found in the sample with an Sn content of 10%. Moreover, larger grains of polycrystal can be obtained by the incorporation of 2%-Sn with comparison to that without Sn. The enlargement of polycrystalline grain of Si1−x−yGexSny improves in the hole mobility to 74 cm2/V s.

We have investigated the influence of tensile and compressive strain on the crystalline structures of Ge 1− x − y Si x Sn y epitaxial layers. The tensile strain in Ge 1− x − y Si x Sn y induces a non-uniform crystallinity of (2 2 0) lattice planes and surface roughening despite the strain magnitude is as small as 0.20%. In contrast, the unstrained or compressive strained Ge 1− x − y Si x Sn y layer exhibits a flat and uniform surface and high crystallinity. We found that the control of the sign of the strain is an important factor to obtain a high quality Ge 1− x − y Si x Sn y layer. Furthermore, substitutional Sn atoms in Ge 1− x − y Si x Sn y epitaxial layer with an Sn content of 10% are thermally stable for annealing at 500 °C.