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Due to the functional limitations of SiO2 for SOI applications, alternative dielectric materials have been investigated. Alternative SOI materials in this work include, AlN and AlGaN. The dielectrics were deposited using MOCVD, and with the aid of PECVD deposited SiO2, and the SiO2 was directly bonded to a handle Si wafer. Tensile tests were performed on the samples to examine the fracture behavior and maximum tensile stresses, with results being comparable to a traditional SOI. Characterization was undertaken using TEM to understand the microstructural and interfacial properties of alternative SOI. High crystal quality Al(Ga)N was achieved on a Si(111) substrate that generally contained well defined chemical interfaces. Finally, synchrotron X-ray diffraction topography was used to understand the topographical strain profile of the device and handle wafers. Topography results showed different strain network properties between the device and handle wafer. This work has demonstrated preliminary feasibility of using alternative dielectrics for SOI applications.

In this chapter, properties of silicon are explained in detail. Silicon is an abundant element found in the Earth’s crust in various compounds. Semiconductor and microelectromechanical systems (MEMS) applications use annually about 70,000 t of high-purity silicon. Quartz or silicon dioxide is the most common starting raw material for purified silicon for semiconductor and sensor applications, and the Siemens process is the most commonly used in semiconductor-grade silicon production. Silicon crystallizes into a diamond cubic crystal structure in which the atoms are covalently bonded. Silicon is a hard, brittle material, and at room temperature under stress silicon single crystal elongates elastically until fracture stress appears without significant plastic deformation. Silicon is a group IV element in the periodic table and is a semiconductor with a bandgap of 1.12 eV, which means that pure silicon at room temperature is almost an insulator. By doping with group III or group V elements the resistivity of silicon can be varied over a wide range. In this chapter, mechanical and electrical properties of silicon are explained in detailed. Schematic diagrams help to better understand the reaction of silicon and its various properties.

Large-area back-reflection and transmission X-ray diffraction topographs of bonded silicon-on-insulator (SOI) wafers made with synchrotron radiation allowed direct and simultaneous imaging of bonding-induced strain patterns of both the 7 μm thick (011) top layers and the (001) Si substrates of the SOI structures. The bonding-induced strain pattern consists of cells having a diameter of about 40 μm. Section topographs show a lattice misorientation of the adjacent cells of about 0.001° and the maximum observed strain-induced lattice plane rotation ten times larger, i.e. about 0.01°. Topographs made after etching away the insulator layer show no indication of residual strain or defects either in the silicon-on-insulator layer or in the substrate. This is in agreement with the experimentally determined maximum bonding stress of 30 MPa, which is much smaller than the estimated stress needed to nucleate dislocations.

We have designed and fabricated micromechanical magnetometers intended for a 3D electronic compass which could be embedded in portable devices. The sensors are based on the Lorentz force acting on a current-carrying coil, processed on a single crystal silicon resonator, and they are operated in vacuum to reach high enough Q values. Sensors for all cartesian components of the magnetic field vector can be processed on the same chip. The vibration amplitude is detected capacitively and the resonance is tracked by a phase-locked-loop circuit. The fabrication process is based on aligned direct bonding of a double side polished silicon wafer and a SOI wafer. Magnetometers measuring the field component along the chip surface have a flux density resolution of about 10 nT/√Hz at a coil current of 100 μA. Magnetometers measuring the field component perpendicular to the chip surface are currently less sensitive with a flux density resolution of about 70 nT/√Hz. The standard deviation of the signal was less than 1% over a period of a few days.

Publisher Summary This chapter discusses the preparation and properties of silicon wafers in detail. MEMS manufacturing sets special requirements for silicon wafers. MEMS processes are traditionally divided into surface micromachining and bulk micromachining. Wafers are cut from the ingot, shaped, polished, and cleaned to be ready for further processing or for device manufacturing. Silicon crystals or ingots grown with either CZ or FZ technique are typically up to 2 m in length. Manufacturing includes ingot cutting and shaping, wafering where ingot is sliced to wafers, ID cutting is done with a thin diamond blade, wire cutting allows simultaneous cutting of hundreds of wafers routinely. Wafer marking is done with a laser, according to SEMI standard. Edge grinding, wafers after cutting have sharp edges, these are shaped to remove sharp edges. Lapping/grinding, this is an operation where wafers where material removal is done with abrasive slurry. Chemical etching, after lapping or grinding wafer edges have residual damage this damage is removed. Wafer is cleaned from impurities coming from mechanical operations in the etching step. Donor killing is done after etching and cleaning by heating the wafer. Polishing, wafers for MEMS applications are commonly doubleside polished. Clean room operation, typically silicon wafers are cleaned by RCA-type cleaning sequence. Resistivity of the wafer is measured with a contact method according. Wafer measurements for thickness, thickness variation and shape are done with a noncontact capacitive method. SEMI are used as a reference and guideline in specifications.

The radial distribution of grown-in microdefects in eight Czochralski-grown silicon crystals was measured by counting the flow pattern (FP) defects revealed by preferential etching. At the center of the crystal, the FP-defect density increased from 5.2 to 6.7 × 105 1/cm3, when the pulling speed was increased from 0.8 to 1.1 mm/min. The magnitude of this effect was only about half as large, when the pulling speed was increased from 1.1 to 1.3 mm/min. Annealing at 1200 °C for 2 h in argon ambient was found to decrease the FP-defect densities significantly, but less than that in oxygen ambient.