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MPSoCs com centenas de processadores j? est?o dispon?veis no mercado. De acordo com o ITRS, tais sistemas integrar?o milhares de processadores at? o final da d?cada. A defini??o de onde cada tarefa ser? executada no sistema ? um desafio importante na concep??o de MPSoCs. Na literatura, tal desafio ? definido como mapeamento de tarefas. O aumento do n?mero de processadores aumenta a complexidade do mapeamento de tarefas. As principais preocupa??es em mapeamento de tarefas em grandes sistemas incluem: (i) escalabilidade; (ii) carga din?mica de trabalho; e (iii) confiabilidade. ? necess?rio distribuir a decis?o do mapeamento pelo sistema para garantir escalabilidade. A carga de trabalho em MPSoCs pode ser din?mica, ou seja, novas aplica??es podem iniciar a execu??o a qualquer momento, levando a diferentes cen?rios de mapeamento. Portanto, ? necess?rio executar o processo de mapeamento em tempo de execu??o para suportar uma carga de trabalho din?mica. Confiabilidade ? diretamente relacionada ? distribui??o da carga de trabalho no sistema. Desequil?brio de carga pode gerar zonas de hotspots e implica??es termais, que podem resultar em uma opera??o do sistema n?o confi?vel. Em MPSoCs de grande dimens?o problemas de confiabilidade se agravam, uma vez que o crescente n?mero de processadores no mesmo chip aumenta o consumo de energia e, consequentemente, a temperatura do sistema. A literatura apresenta diferentes t?cnicas de mapeamento de tarefas para melhorar a confiabilidade do sistema. No entanto, tais t?cnicas utilizam uma abordagem de mapeamento centralizado, a qual n?o ? escal?vel. Em fun??o destes tr?s desafios, o principal objetivo desta Tese ? propor e avaliar heur?sticas de mapeamento distribu?do, executadas em tempo de execu??o, garantindo escalabilidade e uma distribui??o de carga de trabalho uniforme. Distribuir a carga de trabalho e o tr?fego da NoC aumenta a confiabilidade do sistema no longo prazo, devido ? minimiza??o das regi?es de hotspot. Para permitir a explora??o do espa?o de projeto em MPSoCs, a primeira contribui??o desta Tese consiste em um ambiente de modelagem multi-n?vel, que suporta diferentes modelos e capacidades de depura??o que enriquecem e facilitam o projeto de MPSoCs. A simula??o de modelos de mais baixo n?vel (por exemplo, RTL) gera par?metros de desempenho utilizados para calibrar modelos mais abstratos. Os modelos abstratos facilitam a explora??o de heur?sticas de mapeamento em grandes sistemas. A maioria das t?cnicas de mapeamento se concentram na otimiza??o do volume comunica??o na NoC, o que pode comprometer a confiabilidade, devido ? sobrecarga de processadores. Por outro lado, uma heur?stica que visa a otimiza??o apenas da distribui??o de carga de trabalho pode sobrecarregar canais da NoC, comprometendo a sua confiabilidade. A segunda contribui??o significativa desta Tese ? a proposi??o de heur?sticas de mapeamento din?mico e distribu?dos, fazendo um compromisso entre o volume de comunica??o (canais da NoC) e distribui??o de carga de trabalho (uso da CPU). Os resultados relacionados a tempo de execu??o, volume de comunica??o, consumo de energia, distribui??o de pot?ncia e temperatura em grandes MPSoCs (256 processadores) confirmam a hip?tese deste compromisso. Fazer um compromisso entre carga de trabalho e volume de comunica??o melhora a confiabilidade do sistema atrav?s da redu??o de regi?es hotspots, sem comprometer o desempenho do sistema. MPSoCs with hundreds of cores are already available in the market. According to the ITRS roadmap, such systems will integrate thousands of cores by the end of the decade. The definition of where each task will execute in the system is a major issue in the MPSoC design. In the literature, this issue is defined as task mapping. The growth in the number of cores increases the complexity of the task mapping. The main concerns in task mapping in large systems include: (i) scalability; (ii) dynamic workload; and (iii) reliability. It is necessary to distribute the mapping decision across the system to ensure scalability. The workload of emerging large MPSoCs may be dynamic, i.e., new applications may start at any moment, leading to different mapping scenarios. Therefore, it is necessary to execute the mapping process at runtime to support a dynamic workload. Reliability is tightly connected to the system workload distribution. Load imbalance may generate hotspots zones and consequently thermal implications, which may result in unreliable system operation. In large scale MPSoCs, reliability issues get worse since the growing number of cores on the same die increases power densities and, consequently, the system temperature. The literature presents different task mapping techniques to improve system reliability. However, such approaches use a centralized mapping approach, which are not scalable. To address these three challenges, the main goal of this Thesis is to propose and evaluate distributed mapping heuristics, executed at runtime, ensuring scalability and a fair workload distribution. Distributing the workload and the traffic inside the NoC increases the system reliability in long-term, due to the minimization of hotspot regions. To enable the design space exploration of large MPSoCs the first contribution of the Thesis lies in a multi-level modeling framework, which supports different models and debugging capabilities that enrich and facilitate the design of MPSoCs. The simulation of lower level models (e.g. RTL) generates performance parameters used to calibrate abstract models (e.g. untimed models). The abstract models pave the way to explore mapping heuristics in large systems. Most mapping techniques focus on optimizing communication volume in the NoC, which may compromise reliability due to overload processors. On the other hand, a heuristic optimizing only the workload distribution may overload NoC links, compromising its reliability. The second significant contribution of the Thesis is the proposition of dynamic and distributed mapping heuristics, making a tradeoff between communication volume (NoC links) and workload distribution (CPU usage). Results related to execution time, communication volume, energy consumption, power traces and temperature distribution in large MPSoCs (144 processors) confirm the tradeoff hypothesis. Trading off workload and communication volume improves system reliably through the reduction of hotspots regions, without compromising system performance.

MPSoCs with hundreds of cores are already available in the market. According to the ITRS roadmap, such systems will integrate thousands of cores by the end of the decade. The definition of where each task will execute in the system is a major issue in the MPSoC design. In the literature, this issue is defined as task mapping. The growth in the number of cores increases the complexity of the task mapping. The main concerns in task mapping in large systems include: (i) scalability; (ii) dynamic workload; and (iii) reliability. It is necessary to distribute the mapping decision across the system to ensure scalability. The workload of emerging large MPSoCs may be dynamic, i.e., new applications may start at any moment, leading to different mapping scenarios. Therefore, it is necessary to execute the mapping process at runtime to support a dynamic workload. Reliability is tightly connected to the system workload distribution. Load imbalance may generate hotspots zones and consequently thermal implications, which may result in unreliable system operation. In large scale MPSoCs, reliability issues get worse since the growing number of cores on the same die increases power densities and, consequently, the system temperature. The literature presents different task mapping techniques to improve system reliability. However, such approaches use a centralized mapping approach, which are not scalable. To address these three challenges, the main goal of this Thesis is to propose and evaluate distributed mapping heuristics, executed at runtime, ensuring scalability and a fair workload distribution. Distributing the workload and the traffic inside the NoC increases the system reliability in long-term, due to the minimization of hotspot regions. To enable the design space exploration of large MPSoCs the first contribution of the Thesis lies in a multi-level modeling framework, which supports different models and debugging capabilities that enrich and facilitate the design of MPSoCs. The simulation of lower level models (e.g. RTL) generates performance parameters used to calibrate abstract models (e.g. untimed models). The abstract models pave the way to explore mapping heuristics in large systems. Most mapping techniques focus on optimizing communication volume in the NoC, which may compromise reliability due to overload processors. On the other hand, a heuristic optimizing only the workload distribution may overload NoC links, compromising its reliability. The second significant contribution of the Thesis is the proposition of dynamic and distributed mapping heuristics, making a tradeoff between communication volume (NoC links) and workload distribution (CPU usage). Results related to execution time, communication volume, energy consumption, power traces and temperature distribution in large MPSoCs (144 processors) confirm the tradeoff hypothesis. Trading off workload and communication volume improves system reliably through the reduction of hotspots regions, without compromising system performance.; MPSoCs (systèmes multiprocesseurs sur puces) avec des centaines de cœurs sont déjà disponibles sur le marché. Selon le ITRS, ces systèmes intégreront des milliers de cœurs à la fin de la décennie. La définition du cœur, où chaque tâche sera exécutée dans le système, est une question majeure dans la conception de MPSoCs. Dans la littérature, cette question est définie comme allocation de tâches. La croissance du nombre de cœurs augmente la complexité de l'allocation de tâches. Les principales préoccupations en matière d'allocation de tâches dans des grands MPSoCs incluent: (i) l'évolutivité; (ii) la charge de travail dynamique; et (iii) la fiabilité. Il est nécessaire de distribuer la décision d'allocation de tâches à travers le système afin d'assurer l'évolutivité. La charge de travail de grands MPSoCs peut être dynamique, à savoir, de nouvelles applications peuvent commencer à tout moment, conduisant à différents scénarios d'allocation. Par conséquent, il est nécessaire d'exécuter le processus d'allocation à l'exécution pour soutenir une charge de travail dynamique. La fiabilité est étroitement liée à la distribution de la charge de travail du système. Un déséquilibre de charge peut générer des hotspots et autres implications thermiques, ce qui peut entraîner un fonctionnement peu fiable du système. Dans de grands MPSoCs, les problèmes de fiabilité empirent puisque l'augmentation du nombre de cœurs sur la même puce augmente la densité de puissance et, par conséquent, la température du système. La littérature présente différentes techniques d'allocation de tâches pour améliorer la fiabilité du système. Cependant, ces techniques utilisent des approches d'allocation centralisées, qui ne sont pas évolutives. Pour répondre à ces trois défis, l'objectif principal de cette Thèse est de proposer et évaluer des heuristiques d'allocation de tâches distribuées et dynamiques en assurant l'évolutivité et une distribution équitable de la charge de travail. Une distribution équitable de la charge de travail et du trafic du NoC (réseau sur puce) augmente la fiabilité du système dans le long terme, en raison de la minimisation des régions de hotspot. Pour permettre l'exploration de l'espace de conception de grands MPSoCs, la première contribution de cette Thèse se situe dans le cadre d'une modélisation multi-niveaux, qui prend en compte différents modèles et de capacités de débogage qui enrichissent et facilitent la conception des MPSoCs. La simulation de modèles de niveau inférieur (par exemple RTL) génère des paramètres de performance utilisés pour calibrer des modèles abstraits (sans précision d'horloge). Les modèles abstraits permettent d'explorer des heuristiques d'allocation de tâches dans de grands systèmes. La plupart des techniques d'allocation de tâches se focalisent sur l'optimisation du volume de communication, ce qui peut compromettre la fiabilité du système, en raison d'une surcharge des processeurs. D'autre part, une heuristique qui optimise seulement la distribution de la charge de travail peut surcharger le NoC et compromettre sa fiabilité. La deuxième contribution importante de cette Thèse est la proposition d'heuristiques d'allocation de tâches dynamiques et distribuées, qui réalisent un compromis entre le volume de communication (liens du NoC) et la distribution de la charge de travail (de l'utilisation des processeurs). Des résultats liés au temps d'exécution, au volume de la communication, à la consommation d'énergie, aux traces de puissance et à la distribution de la température dans les grands MPSoCs (144 processeurs) confirment l'hypothèse de compromis. Faire un compromis entre la réduction du volume de communication et une distribution équitable de la charge de travail améliore le système de manière fiable grâce à la réduction des régions de hotspots, sans compromettre la performance du système.

Com o objetivo de avaliar diferentes genótipos de alface (Lactuca sativa L.), quanto à adaptação a adubação orgânica, foram testados 18 acessos, pertencentes ao Banco de Germoplasma de Hortaliças da Universidade Federal de Viçosa (BGH - UFV) e comparado o desempenho destes com dois cultivares comerciais: Regina de Verão e Crespa Grand Rapids. O experimento foi conduzido com três repetições, em casa de vegetação, e os genótipos foram comparados em substratos contendo adubação mineral e adubação orgânica. As plantas foram cultivadas em vasos de polietileno, com capacidade para 3 dm³, preenchidos com 2,5 dm³ de substrato. O substrato contendo adubação mineral foi preparado a partir do solo, comumente cultivado, e adubado, segundo as recomendações convencionais para a cultura da alface, a partir da análise de rotina do solo. O substrato contendo adubação orgânica consistiu em solo, manejado organicamente, e adubado com 50 t ha-1 de composto orgânico. Na colheita, foram avaliadas as características morfológicas das plantas e a massa fresca e seca das folhas. Observou-se grande diversidade de formas, tamanhos e coloração, entre os acessos, sendo que os acessos BGH 2625, BGH 118 e o cultivar Regina de Verão apresentaram características qualitativas e produtividade que os selecionam para serem utilizados em programas de melhoramento, visando à produção de cultivares para ambiente com adubação orgânica. The aim of this study was to evaluate the adaptation of different genotypes of lettuce (Lactuca sativa L.) to organic farming systems. Eighteen accesses belonging to the Germoplasm Bank (BGH - UFV) were evaluated and compared with two commercial cultivars, Regina de Verão and Crespa Grand Rapids. The experiment was conducted in a greenhouse with three replications. The accesses were compared on substrates made of soil with either mineral or organic fertilizers. Plants were grown in 3 dm³ polystyrene pots filled with 2.5 dm³of soil. The substrate with mineral fertilizer was prepared with conventionally cultivated soil and mineral fertilizer, according to lettuce crop recommendations, based on soil analyses. The substrate with organic fertilizer was prepared with organically managed soil and fertilized with 50 t.ha-1 of organic compost. At harvest, plant morphological characteristics and leaf fresh and dry weights were evaluated. A great variability of forms, sizes and colors were observed among the genotypes. Accesses BGH 2625, BGH 118 and the cultivar Regina de Verão showed the greatest adaptation to organic environment. The genotypes showed good qualitative characteristics and yield and, therefore, were selected as possible sources of adaptation to this environment.

O avan?o na tecnologia de fabrica??o de circuitos integrados permite obter transistores cada vez menores, tornando poss?vel o desenvolvimento de sistemas completos em um ?nico chip (System-on-Chip - SoC). Muitas aplica??es requerem SoCs com v?rios processadores para poder suprir seus requisitos de desempenho. Um SoC que cont?m diversos elementos de processamento (Processing Element - PEs) ? chamado de MPSoC. Um MPSoC pode ser classificado em homog?neo, quando todos seus PEs s?o iguais; ou heterog?neo, quando seus PEs s?o diferentes. Como infraestrutura de comunica??o, o MPSoC pode utilizar NoCs como forma de interconectar os PEs. O uso de NoCs deve-se a suas vantagens em rela??o a barramentos, entre as quais maior escalabilidade e paralelismo na comunica??o. Um dos principais problemas relativos ao projeto de MPSoCs ? a defini??o de qual dos PEs do sistema ser? respons?vel pela execu??o de cada tarefa de uma aplica??o. Este problema ? chamado de mapeamento de tarefas. O mapeamento pode ser classificado em est?tico, que ocorre em tempo de projeto, ou em din?mico que ocorre em tempo de execu??o. A abordagem de mapeamento din?mico requer primeiramente o mapeamento de tarefas iniciais de uma aplica??o (que n?o dependem de nenhuma outra tarefa) das aplica??es, sendo que as outras tarefas s?o mapeadas dinamicamente quando solicitadas. Tamb?m se pode classificar o mapeamento quanto ao n?mero de tarefas que executam em um PE do sistema. O mapeamento ? dito monotarefa, quando apenas uma tarefa ? executada por PE, e multitarefa, quando m?ltiplas tarefas podem ser executadas em um mesmo PE. Este trabalho prop?e novas heur?sticas de mapeamento din?mico monotarefa e multitarefa, visando ? redu??o de energia de comunica??o. Resultados s?o avaliados atrav?s do MPSoC HeMPS, que executa c?digos de aplica??es geradas a partir de um ambiente de simula??o baseado em modelos. Estas heur?sticas s?o comparadas com heur?sticas de mapeamento apresentadas na literatura, apresentando uma redu??o m?dia de energia de comunica??o nos cen?rios avaliados de at? 9,8% na abordagem monotarefa e 18,6% na multitarefa. Este trabalho tamb?m avalia a inser??o din?mica de carga no sistema, utilizando para isto a implementa??o de uma heur?stica de mapeamento din?mico de tarefas iniciais. Esta heur?stica ? uma contribui??o inovadora, visto que uma abordagem parecida n?o ? encontrada em nenhum outro trabalho da literatura. The advance in manufacturing technology of integrated circuits enables smaller transistors, making possible the development of SoCs (System-on-Chip). Many applications require multi-processor SoCs in order to meet their performance requirements. A SoC containing several processing elements (PEs) is called MPSoC. An MPSoC can be classified as homogeneous, when all their PEs has the same architecture; or heterogeneous, when they have different architectures. . As communication infrastructure, the MPSoC can use NoCs as a way to interconnect the PEs. NoCs may be used to replace busses, due to their advantages of higher scalability and communication parallelism. One of the main problems related to MPSoC projects is to define a PE of the system that will run each task. This problem is called task mapping. The mapping can be classified into static, which occurs at design time, and dynamic that occurs at runtime. The dynamic mapping approach requires firstly the mapping of the initial tasks of an application (which does not depend on any other task). The other tasks, in this approach, are mapped dynamically when requested. The mapping can be also classified by the number of tasks running in a PE. The mapping is classified as single task, when only one task is executed by a PE, and as multitask, when multiple tasks can be executed in a same PE. This work proposes new single task and multitask dynamic task mapping heuristics, in order to reduce communication energy. Results are evaluated using the MPSoC HeMPS, which executes application code generated from a model-based simulation environment. These heuristics are compared with mapping heuristic presented in literature, obtaining, in the evaluated scenarios, an average communication energy reduction of 9.8%, for the single task approach, and 18.6%, for the multitask approach. This work also evaluates the inclusion of dynamic load on the system, which makes necessary the implementation of an initial tasks mapping heuristic. This heuristic is an innovative contribution, since a similar approach is not found in any other work in literature.