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With the advancement of technology nodes, the challenging space radiation environment poses a significant threat to memory reliability. Spin transfer torque magnetic random access memory (STT-MRAM) is a formidable candidate for non-volatile memory for space applications due to its advantages of non-volatility, durability, speed and compatibility with CMOS technology. Although the STT-MRAM memory unit magnetic tunnel junction (MTJ) is naturally immune to radiation effects, the single event upset (SEU) affects the peripheral circuitry. A radiation-hardened circuit is proposed, which theoretically does not have ‘0' upset nodes and automatically recovers from ‘1' upset. Moreover, the circuit's radiation-hardened performance was corroborated through hybrid simulation utilizing 40-nm technology. The findings of this investigation hold significance for the use of space radiation-hardened STT-MRAM. [ABSTRACT FROM AUTHOR]

Present-day computationally intensive on-chip applications consume much area and energy. Multi-level cells (MLCs) capable of storing two-bit information can reduce this area and energy consumption. Spintronics-based MLCs are suitable for on-chip memory with salient features like nonvolatility, high endurance, density, zero leakage, etc. Even though spintronic-based MLCs perform well regarding leakage power, speed, and thickness, they require a large switching current that increases energy dissipation during the write operation. Also, external sensing and feedback circuits lead to power and area overheads. This paper proposes a new highperformance Voltage Controlled Spin-Orbit Torque (VGSOT) based parallel MLC that uses Magnetic Tunnel Junctions (MTJs) with peculiar characteristics. The novel approach is to configure the MTJs with different retention times. The proposed model has reduced critical current for switching and write energy compared to conventional MLC due to the decreased energy barrier for switching in the MTJ. The energy barrier is reduced by tuning the retention time of the MTJ, which can be done by modulating the geometrical and physical parameters. Further, the flaws like leakage power, scaling, and the threshold voltage of conventional CMOS transistors in the read and write channel of the presented MLC are compensated by a Carbon nanotube Field Effect Transistor (CNFET). The comprehensive simulations are used to confirm the functionality of the proposed design using a 45 nm Cadence virtuoso. The VGSOT-based MLC's read-and-write circuit eliminates a sense amplifier and bistable feedback, making it radiation resistant. Compared to pioneering MLC architectures, the design reduces critical switching current by 50% and write energy by 42% for a 2-bit memory cell. [ABSTRACT FROM AUTHOR]

This paper theoretically examines the impact of integrating 2D transition metal dichalcogenide (TMDCs) materials—MoS2, MoSe2, MoTe2, WS2, and WSe2—with a conventional MgO dielectric to fabricate double-barrier penta-layer (DBPL) magnetic tunnel junction (MTJ) structures. The MTJ device proposed herein is distinguished by a DBPL configuration which incorporates the composite tunnel barrier (CTB) of MgO-MX2-MgO sandwiched between the Fe ferromagnetic electrodes. Using density functional theory (DFT), we conducted a crystallographic analysis on all constituent materials to predict the properties necessary for device operation. Subsequent simulations leveraged an advanced nonequilibrium Green's function-based (NEGF) quantum transport simulator to quantify critical transport phenomena. Notable metrics such as tunneling magnetoresistance (TMR), differential TMR, and spin-transfer torque (STT), both in-plane and out-of-plane, were determined. Additionally, resistance and differential resistance profiles for parallel and antiparallel alignment states were thoroughly evaluated. Our findings elucidate the essential role of CTB composition in determining MTJ performance attributes, with particular dielectric pairings showing a significant enhancement in TMR ratios and an improved resistance differential without compromising the efficiency of STT. Interestingly, our proposed MTJ device shows a substantial increase in TMR values, ranging from 900% to 4300%, with very high sensitivity ranging from 7.33 × 106 T−1 to 3.36 × 107 T−1. [ABSTRACT FROM AUTHOR]

In biological neural systems, noise is ubiquitous but does not affect the correct decisions made in the complex cognitive tasks. Decision-making in biological neural system is typically achieved by accumulating input information over a period of time. Inspired by recent developments in neurosciences, we design a decision-making module based on spintronic devices, utilizing superparamagnetic tunnel junctions as artificial neurons. The feasibility of this decision-making module is verified through circuit simulations. Taking a multi-layer perceptron as an example, the module significantly improves the accuracy of the perceptron in the handwritten digit recognition task. Furthermore, the spintronic decision-making module offers advantages over the conventional pooling methods, such as adaptive decision time, high performance and the absence of analog-to-digital conversion. The decision-making module is flexible to be integrated into artificial neural networks and provides a general yet effective solution to enhance performance against device noise. [ABSTRACT FROM AUTHOR]

Computing in memory (CiM) architecture enables computation within the memory array, reducing power-intensive data transmission between the processor and memory. The primary goal of this work is to enhance the energy efficiency of CiM architectures that use spintronic devices. Experiments show that the thermal stability (Δ ) in magnetic tunnel junctions (MTJs) can be optimized to reduce write energy by adjusting the oxide layer thickness. Based on this finding, this work explores a novel spin-orbit torque random-access memory (SOT) cell that yields a 30% increase in energy efficiency compared to conventional SOT. However, reducing the oxide layer thickness below 1.5 nm to tune Δ leads to a decrease in the tunnel magnetoresistance (TMR) ratio leading to reliability concerns. The second part of the work proposes to improve TMR by replacing the conventional MgO oxide layer with a TiCoSb Heusler alloy-based layer and utilizing Co 2 MnSb as the electrode in the modified cell called Δ M-SOT. Theoretical and experimental studies demonstrate that this alternative MTJ design exhibits TMR ratios comparable to values reported in the literature. The performance of magnetic full adder CiM design using the proposed Δ M-SOT is compared with designs implemented using CMOS, spin-transfer torque random-access RAM (STT), and conventional SOT. Evaluations show that the Δ M-SOT-CiM has a reduction of 66% and 30% in logic and data transfer energy, respectively, compared to conventional SOT-CiM design. Furthermore, the data storage and computation operations in Δ M-SOT-CiM are found to be significantly faster compared to both STT- and SOT-CiM design. Overall, this work presents a promising SOT design that effectively bridges the gap between the processor and memory by enabling logical functions within memory, eliminating the need for additional circuits. [ABSTRACT FROM AUTHOR]

In this work, we focus on a detailed study of the role of each component layer in the multilayer structure of a magnetic tunnel junction (MTJ) as well as the analysis of the effects that the deposition parameters of the thin films have on the performance of the structure. Various techniques including atomic force microscopy (AFM), scanning electron microscopy (SEM), and transmission electron microscopy (TEM) were used to investigate the effects of deposition parameters on the surface roughness and thickness of individual layers within the MTJ structure. Furthermore, this study investigates the influence of thin films thickness on the magnetoresistive properties of the MTJ structure, focusing on the free ferromagnetic layer and the barrier layer (MgO). Through systematic analysis and optimization of the deposition parameters, this study demonstrates a significant improvement in the tunnel magnetoresistance (TMR) of the MTJ structure of 10% on average, highlighting the importance of precise control over thin films properties for enhancing device performance. [ABSTRACT FROM AUTHOR]

Spintronics, utilizing both the charge and spin of electrons, benefits from the nonvolatility, low switching energy, and collective behavior of magnetization. These properties allow the development of magnetoresistive random access memories, with magnetic tunnel junctions (MTJs) playing a central role. Various spin logic concepts are also extensively explored. Among these, spin logic devices based on the motion of magnetic domain walls (DWs) enable the implementation of compact and energy-efficient logic circuits. In these devices, DW motion within a magnetic track enables spin information processing, while MTJs at the input and output serve as electrical writing and reading elements. DW logic holds promise for simplifying logic circuit complexity by performing multiple functions within a single device. Nevertheless, the demonstration of DW logic circuits with electrical writing and reading at the nanoscale is still needed to unveil their practical application potential. In this review, we discuss material advancements for high-speed DW motion, progress in DW logic devices, groundbreaking demonstrations of current-driven DW logic, and its potential for practical applications. Additionally, we discuss alternative approaches for current-free information propagation, along with challenges and prospects for the development of DW logic. [ABSTRACT FROM AUTHOR]

The exceptional properties of two‐dimensional (2D) magnet materials present a novel approach to fabricate functional magnetic tunnel junctions (MTJ) by constructing full van der Waals (vdW) heterostructures with atomically sharp and clean interfaces. The exploration of vdW MTJ devices with high working temperature and adjustable functionalities holds great potential for advancing the application of 2D materials in magnetic sensing and data storage. Here, we report the observation of highly tunable room‐temperature tunneling magnetoresistance through electronic means in a full vdW Fe3GaTe2/WSe2/Fe3GaTe2 MTJ. The spin valve effect of the MTJ can be detected even with the current below 1 nA, both at low and room temperatures, yielding a tunneling magnetoresistance (TMR) of 340% at 2 K and 50% at 300 K, respectively. Importantly, the magnitude and sign of TMR can be modulated by a DC bias current, even at room temperature, a capability that was previously unrealized in full vdW MTJs. This tunable TMR arises from the contribution of energy‐dependent localized spin states in the metallic ferromagnet Fe3GaTe2 during tunnel transport when a finite electrical bias is applied. Our work offers a new perspective for designing and exploring room‐temperature tunable spintronic devices based on vdW magnet heterostructures. [ABSTRACT FROM AUTHOR]

AbstractHybrid magnetic tunnel junction (MTJ)/CMOS circuits based on the computation-in-memory (CIM) architecture are contemplated as the future generation of digital integrated circuits. It overcomes the limitations of von-Neumann architecture by offering solutions to problems such as memory wall and standby power dissipation. In this work, we have developed hybrid logic gates, such as AND/NAND, OR/NOR, and XOR/XNOR, for CIM architecture by integrating three terminal spin-Hall effect assisted spin transfer torque (SHE + STT) MTJs with standard CMOS. To write the MTJs an auto-write-stopping (AWS) circuit is adopted, whereas to perform the logic operations and produce the corresponding outputs, an improved sense amplifier circuit (ISA) is employed. All the hybrid logic gates are investigated for key performance indicators such as power, delay, device count, and power delay product (PDP). The results are compared with their conventional counterparts. The comparison reveals that the ISA + AWS-based hybrid gates dissipate 50.52% lower total power. The worst-case read delay of ISA + AWS hybrid AND/NAND, OR/NOR, and XOR/XNOR gates are 27.41%, 13.4%, and 21.28% lower. Meanwhile, the reduction of read PDP (write PDP) is 47.64% (37.09%), 25.78% (36.29%), and 39.31% (35.48%) observed with ISA + AWS hybrid AND/NAND, OR/NOR, and XOR/XNOR gates in comparison with the conventional counterparts. Hence the ISA + AWS gates are superior in terms of total power dissipation, worst read delay, and read/write PDP. Further, we have conducted Monte-Carlo simulations on all the logic circuits to study the parameter variations during fabrication.

Magnetic tunnel junctions (MTJs), as the core storage unit of magneto resistive random-access memory, plays important role in the cutting-edge spintronics. In the MTJ devices, there are multiple internal magnetic/nonmagnetic heterojunction structures. The heterojunction always consists of magnetic metals and magnetic insulators or nonmagnetic metals. The interface of the heterojunction has certain physical effects that can affect the performance of MTJ devices. In the review, combined with the existing research results, the physical mechanism of magnetic/non-magnetic heterojunction interface coupling is discussed. The influence of the interface effect of the heterojunction on the performance of MTJ devices is studied. The optimization method is proposed specifically. This work systematically summarizes the interface effect of magnetic/non-magnetic heterojunction, which could be the critical aspect for the device's yield and reliability. [ABSTRACT FROM AUTHOR]

Hybrid magnetic tunnel junction/complementary metal oxide semiconductor (MTJ/CMOS) circuits based on in-memory-computation (IMC) architecture is considered as the next-generation candidate for the digital integrated circuits. However, the energy consumption during the MTJ write process is a matter of concern in these hybrid circuits. In this regard, we have developed a novel write circuit for the contemporary three-terminal perpendicular-MTJs that works on the voltage-gated spin orbit torque (VG+SOT) switching mechanism to store the information in hybrid circuits for IMC architecture. Investigation of the novel write circuit reveals a remarkable reduction in the total energy consumption (and energy delay product) of 92.59% (95.81) and 92.28% (42.03%) than the conventional spin transfer torque (STT) and spin-Hall effect assisted STT (SHE+STT) write circuits, respectively. Further, we have developed all the hybrid logic gates followed by nonvolatile full adders (NV-FAs) using VG+SOT, STT, and SHE+STT MTJs. Simulation results show that with the VG+SOT NOR-OR, NAND-AND, XNOR-XOR, and NV-FA circuits, the reduction in the total power dissipation is 5.35% (4.27%), 5.62% (3.2%), 3.51% (2.02%), and 4.46% (2.93%) compared to STT (SHE+STT) MTJs respectively. [ABSTRACT FROM AUTHOR]

The spin Hall effect enables fast and reliable writing operations for next‐generation spin‐orbit‐torque magnetoresistive random‐access memories (SOT‐MRAMs). To develop SOT‐MRAMs; however, the spin Hall material should have a sufficiently low writing energy and high annealing stability for the semiconductor integration process. Thus far, none of the crystalline‐based spin Hall materials are able to satisfy these requirements. Here, a promising solution for SOT‐MRAMs is provided using amorphous W─Ta─B alloys. Even without a long‐range crystal order, W─Ta─B alloys exhibit both large effective spin Hall angles up to 40% derived from a Ta substitutional doping and superior annealing stability (up to 400 °C) due to the addition of B, enabling them to satisfy both requirements. Nanoscale three‐terminal SOT‐MRAM cells are fabricated, and these are demonstrated to have high magnetoresistance ratios (up to 130%) and extremely low intrinsic switching current densities (down to 4 × 106 A cm−2). These results show that amorphous spin Hall materials can provide the key for realizing high‐performance SOT‐MRAMs. [ABSTRACT FROM AUTHOR]

Abstract The exceptional properties of two‐dimensional (2D) magnet materials present a novel approach to fabricate functional magnetic tunnel junctions (MTJ) by constructing full van der Waals (vdW) heterostructures with atomically sharp and clean interfaces. The exploration of vdW MTJ devices with high working temperature and adjustable functionalities holds great potential for advancing the application of 2D materials in magnetic sensing and data storage. Here, we report the observation of highly tunable room‐temperature tunneling magnetoresistance through electronic means in a full vdW Fe3GaTe2/WSe2/Fe3GaTe2 MTJ. The spin valve effect of the MTJ can be detected even with the current below 1 nA, both at low and room temperatures, yielding a tunneling magnetoresistance (TMR) of 340% at 2 K and 50% at 300 K, respectively. Importantly, the magnitude and sign of TMR can be modulated by a DC bias current, even at room temperature, a capability that was previously unrealized in full vdW MTJs. This tunable TMR arises from the contribution of energy‐dependent localized spin states in the metallic ferromagnet Fe3GaTe2 during tunnel transport when a finite electrical bias is applied. Our work offers a new perspective for designing and exploring room‐temperature tunable spintronic devices based on vdW magnet heterostructures.

The exceptional properties of skyrmion devices, including their miniature size, topologically protected nature, and low current requirements, render them highly promising for energy-efficient neuromorphic computing applications. Examining the creation, stability, and dynamics of magnetic skyrmions in thin-film systems is imperative to realize these skyrmion-based neuromorphic devices. Herein, we report the creation, stability, and tunability of magnetic skyrmions in the Ta/IrMn/CoFeB/MgO thin-film system. We use polar magneto-optic Kerr effect (MOKE) microscopy and micromagnetic simulations to investigate the magnetic-field dependence of skyrmion density and size. The topological charge evolution with time under a magnetic field is studied, and the transformation dynamics are explained. Furthermore, we demonstrate skyrmion size and density tunability as parameters controlled by voltage, current, and magnetic field via Voltage-Controlled Magnetoresistance (VCMA) and Dzyaloshinskii-Moriya Interaction (DMI). We propose a skyrmion-based synaptic device for neuromorphic computing applications. The device exhibits spin-orbit torque-controlled discrete topological resistance states with high linearity and uniformity, allowing for the realization of the hardware implementation of weight quantization in a Quantized Convolutional Neural Network (QCNN). Our experimental results demonstrate that the devices can be trained and tested on the CIFAR-10 dataset, achieving a recognition accuracy of ~87%. The findings open new avenues for developing neuromorphic computing devices based on tunable skyrmion systems.

The two‐dimensional (2D) materials InX (X = O, Se), experimentally available thus far, can become a ferromagnetic half metal under hole doping, though the charge neutral states of them are nonmagnetic semiconductors. Based on such an electronic characteristic, a theoretical model of magnetic tunnel junction (MTJ) is proposed composed only of one of the 2D InX. In doing so, the two semi‐infinite pieces of 2D InX in the half‐metallic state is assumed as the opposite electrodes which are separated by a strip of the same material but in its nonmagnetic state. Owing to the 2D nature of InX, the half metal electrodes of the InX device induced by hole doping can be achieved by using split gating technique. The numerical simulations identify a proper hole doping concentration, at which 100% tunneling magnetoresistance (TMR) ratios can be realized, accompanying an appreciable conductance of majority spin electron under parallel magnetization configuration. Under a finite bias voltage, the TMR ratio remains high. Therefore, the proposed device model is an ideal candidate for future spintronics applications. It enables electrical control of TMR and circumvents the detriment of hetero‐interface disorder inevitable in conventional MTJs. [ABSTRACT FROM AUTHOR]

Hybrid magnetic tunnel junction (MTJ)/CMOS circuits based on the computation-in-memory (CIM) architecture are contemplated as the future generation of digital integrated circuits. It overcomes the limitations of von-Neumann architecture by offering solutions to problems such as memory wall and standby power dissipation. In this work, we have developed hybrid logic gates, such as AND/NAND, OR/NOR, and XOR/XNOR, for CIM architecture by integrating three terminal spin-Hall effect assisted spin transfer torque (SHE + STT) MTJs with standard CMOS. To write the MTJs an auto-write-stopping (AWS) circuit is adopted, whereas to perform the logic operations and produce the corresponding outputs, an improved sense amplifier circuit (ISA) is employed. All the hybrid logic gates are investigated for key performance indicators such as power, delay, device count, and power delay product (PDP). The results are compared with their conventional counterparts. The comparison reveals that the ISA + AWS-based hybrid gates dissipate 50.52% lower total power. The worst-case read delay of ISA + AWS hybrid AND/NAND, OR/NOR, and XOR/XNOR gates are 27.41%, 13.4%, and 21.28% lower. Meanwhile, the reduction of read PDP (write PDP) is 47.64% (37.09%), 25.78% (36.29%), and 39.31% (35.48%) observed with ISA + AWS hybrid AND/NAND, OR/NOR, and XOR/XNOR gates in comparison with the conventional counterparts. Hence the ISA + AWS gates are superior in terms of total power dissipation, worst read delay, and read/write PDP. Further, we have conducted Monte-Carlo simulations on all the logic circuits to study the parameter variations during fabrication. [ABSTRACT FROM AUTHOR]

We demonstrated a magnetic tunnel junction (MTJ) consisting of Fe/MgO-Si-MgO/Fe. Si layer was deposited at room temperature and at 700 °C; when deposited at 700 °C, Si diffused into the MgO layer. The MTJ with silicon deposited at 700 °C attained high MR ratios of up to 38.7 and 2.9% at t Si = 0.19 and 1.3 nm, respectively. Low-temperature measurements established that the temperature dependence of the MR ratio and resistance between MTJs with and without diffused silicon are significantly different. This behavior confirms that the Si-MgO channel acts as an impurity semiconductor in the MTJ. [ABSTRACT FROM AUTHOR]

Copyright of Journal of Beijing University of Technology is the property of Journal of Beijing University of Technology, Editorial Department and its content may not be copied or emailed to multiple sites or posted to a listserv without the copyright holder's express written permission. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)

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Complementary Metal Oxide Silicon (CMOS) technology faces a major concern in power dissipation due to the scale-down of technology nodes to the nanoscale. To, resolve this problem, logic-in-memory (LIM) structures are researched as a solution. A spintronics device called magnetic tunnel junction (MTJ) uses less static power than CMOS technology. To improve the energy efficiency of LIM structures, spin-transfer torque based magnetic tunnel junction (STT-MTJ) and CMOS are used to design digital circuits. In this paper, the design of hybrid AND/NAND, OR/NOR, and XOR/XNOR logic gate are done by exploring two proposed LIM designs namely LIM1 based on a pre-charge sense amplifier (PCSA) and LIM2 based on a modified version of PCSA (M-PCSA)using the Cadence simulator. This work considers the incorporation of separated transistor logic into the LIM structure to provide separate read and write paths.The results are compared in respect of delay, power, gate count and energy consumption.The proposed LIM1 and LIM2-based AND/NAND, OR/NOR and XOR/XNOR design shows 47.5%, 49.6%, 41.9% and 59.3%, 60.7%, 55.7% lower energy consumption respectively compared to the existing CMOS-based designs. This paper exhibits the design of energy efficient hybrid MTJ/CMOS structures using optimized read/write circuitry and it is appropriate for IoT applications.

Abstract The spin Hall effect enables fast and reliable writing operations for next‐generation spin‐orbit‐torque magnetoresistive random‐access memories (SOT‐MRAMs). To develop SOT‐MRAMs; however, the spin Hall material should have a sufficiently low writing energy and high annealing stability for the semiconductor integration process. Thus far, none of the crystalline‐based spin Hall materials are able to satisfy these requirements. Here, a promising solution for SOT‐MRAMs is provided using amorphous W─Ta─B alloys. Even without a long‐range crystal order, W─Ta─B alloys exhibit both large effective spin Hall angles up to 40% derived from a Ta substitutional doping and superior annealing stability (up to 400 °C) due to the addition of B, enabling them to satisfy both requirements. Nanoscale three‐terminal SOT‐MRAM cells are fabricated, and these are demonstrated to have high magnetoresistance ratios (up to 130%) and extremely low intrinsic switching current densities (down to 4 × 106 A cm−2). These results show that amorphous spin Hall materials can provide the key for realizing high‐performance SOT‐MRAMs.

Stochasticity in magnetic nanodevices is an essential characteristic for harnessing these devices to computing based on population coding or the building blocks of probabilistic computing, p-bits. A magnetic tunneling junction (MTJ) consisting of a patterned magnetic element is considered a promising computing unit in the concept of artificial neurons and p-bits. A comprehensive understanding of the stochasticity in the switching of patterned magnetic elements is crucial for realizing MTJ-based probabilistic computing technology. In the present work, the stochastic behavior in the switching process of a perpendicularly magnetized Co/Pt disk within an array was directly observed utilizing full-field soft X-ray microscopy. Within 50 repeated hysteretic cycles, the stochastic magnetization switching of individual Co/Pt disks within disk arrays is identified. We found that the stochasticity in the magnetization switching of disks considerably depends on the disk size. The stochasticity initially decreases as the disk radius gets bigger from 125 to 375 nm (region I), then increases with further enlarging the disk size to 625 nm (region II). The variance of thermal fluctuation relevant to the disk size and the multilevel switching within a disk are severely involved in the observed size-dependent stochasticity. This work provides the way for controlling the stochasticity in the switching of nanopatterned elements, which is a key aspect of MTJ-based probabilistic computing.

[Display omitted] The non-volatile magnetoresistive random access memory (MRAM) is believed to facilitate emerging applications, such as in-memory computing, neuromorphic computing and stochastic computing. Two-dimensional (2D) materials and their van der Waals heterostructures promote the development of MRAM technology, due to their atomically smooth interfaces and tunable physical properties. Here we report the all-2D magnetoresistive memories featuring all-electrical data reading and writing at room temperature based on WTe 2 /Fe 3 GaTe 2 /BN/Fe 3 GaTe 2 heterostructures. The data reading process relies on the tunnel magnetoresistance of Fe 3 GaTe 2 /BN/Fe 3 GaTe 2. The data writing is achieved through current induced polarization of orbital magnetic moments in WTe 2 , which exert torques on Fe 3 GaTe 2 , known as the orbit-transfer torque (OTT) effect. In contrast to the conventional reliance on spin moments in spin-transfer torque and spin–orbit torque, the OTT effect leverages the natural out-of-plane orbital moments, facilitating field-free perpendicular magnetization switching through interface currents. Our results indicate that the emerging OTT-MRAM is promising for low-power, high-performance memory applications. [ABSTRACT FROM AUTHOR]

Intelligent computing paradigms have become increasingly important for the efficient processing of massive amounts of data. However, using traditional electronic devices to implement these intelligent paradigms is currently mismatched and limited by their energy, area, and speed. Spintronics, which exploits the magnetic and electrical properties of electrons, could break through these limitations and bring new possibilities to electrical devices. In particular, the tunneling magnetoresistance effect, merging quantum and spintronics, enables spintronic devices to be compatible with standard integrated circuits with a magnetic tunnel junction (MTJ) design, showing great potential for implementing hardware-based intelligent frameworks. In this review, we introduce the specific capabilities of MTJs, including nonvolatility, stochasticity, plasticity, and nonlinearity, which are highly favorable in artificial intelligence algorithms. We then present how these devices could impact the development of intelligent computing, including in-memory computing, probabilistic computing, and neuromorphic computing. Finally, we discuss their challenges and perspectives in intelligent hardware implementations. [ABSTRACT FROM AUTHOR]

This article discusses the current state of development, open research opportunities, and application perspectives of electric‐field‐controlled magnetic tunnel junctions that use the voltage‐controlled magnetic anisotropy effect to control their magnetization. The integration of embedded magnetic random‐access memory (MRAM) into mainstream semiconductor foundry manufacturing opens new possibilities for the development of energy‐efficient, high‐performance, and intelligent computing systems. The current generation of MRAM, which uses the current‐controlled spin‐transfer torque (STT) effect to write information, has gained traction due to its nonvolatile data retention and lower integration cost compared to embedded Flash. However, scaling MRAM to high bit densities will likely require a transition from current‐controlled to voltage‐controlled operation. In this perspective, an overview of voltage‐controlled magnetic anisotropy (VCMA) as a promising beyond‐STT write mechanism for MRAM devices is provided and recent advancements in developing VCMA‐MRAM devices with perpendicular magnetization are highlighted. Starting from the fundamental mechanisms, the key remaining challenges of VCMA‐MRAM, such as increasing the VCMA coefficient, controlling the write error rate, and achieving field‐free VCMA switching are discussed. Then potential solutions are discussed and open research questions are highlighted. Lastly, prospective applications of voltage‐controlled magnetic tunnel junctions (VC‐MTJs) in security applications, extending beyond their traditional role as memory devices are explored. [ABSTRACT FROM AUTHOR]

This study investigates the effects of annealing on the tunnel magnetoresistance (TMR) ratio in CoFeB/MgO/CoFeB-based magnetic tunnel junctions (MTJs) with different capping layers and correlates them with microstructural changes. It is found that the capping layer plays an important role in determining the maximum TMR ratio and the corresponding annealing temperature (Tann). For a Pt capping layer, the TMR reaches ~95% at a Tann of 350 °C, then decreases upon a further increase in Tann. A microstructural analysis reveals that the low TMR is due to severe intermixing in the Pt/CoFeB layers. On the other hand, when introducing a Ta capping layer with suppressed diffusion into the CoFeB layer, the TMR continues to increase with Tann up to 400 °C, reaching ~250%. Our findings indicate that the proper selection of a capping layer can increase the annealing temperature of MTJs so that it becomes compatible with the complementary metal-oxide-semiconductor backend process. [ABSTRACT FROM AUTHOR]

Spin-torque diode have shown great potentials and performance in many applicative fields, from microwave detectors to energy harvesters. In this work, we use micromagnetic simulations to study, at room temperature, a state-of-the-art non-resonant low-frequency-tail spin-torque diode in terms of dc output voltage as a function of the amplitude of an in-plane external field applied along different directions. We find that there exists a threshold value of the injected ac current that promotes a linear behavior of the output voltage of field down to the pT range, and we suggest exploiting such a behavior for the design of a magnetic field sensor. [ABSTRACT FROM AUTHOR]

Directed acyclic graphs or Bayesian networks that are popular in many AI-related sectors for probabilistic inference and causal reasoning can be mapped to probabilistic circuits built out of probabilistic bits (p-bits), analogous to binary stochastic neurons of stochastic artificial neural networks. In order to satisfy standard statistical results, individual p-bits not only need to be updated sequentially but also in order from the parent to the child nodes, necessitating the use of sequencers in software implementations. In this article, we first use SPICE simulations to show that an autonomous hardware Bayesian network can operate correctly without any clocks or sequencers, but only if the individual p-bits are appropriately designed. We then present a simple behavioral model of the autonomous hardware illustrating the essential characteristics needed for correct sequencer-free operation. This model is also benchmarked against SPICE simulations and can be used to simulate large-scale networks. Our results could be useful in the design of hardware accelerators that use energy-efficient building blocks suited for low-level implementations of Bayesian networks. The autonomous massively parallel operation of our proposed stochastic hardware has biological relevance since neural dynamics in brain is also stochastic and autonomous by nature.

Spintronics, utilizing both the charge and spin of electrons, benefits from the nonvolatility, low switching energy, and collective behavior of magnetization. These properties allow the development of magnetoresistive random access memories, with magnetic tunnel junctions (MTJs) playing a central role. Various spin logic concepts are also extensively explored. Among these, spin logic devices based on the motion of magnetic domain walls (DWs) enable the implementation of compact and energy-efficient logic circuits. In these devices, DW motion within a magnetic track enables spin information processing, while MTJs at the input and output serve as electrical writing and reading elements. DW logic holds promise for simplifying logic circuit complexity by performing multiple functions within a single device. Nevertheless, the demonstration of DW logic circuits with electrical writing and reading at the nanoscale is still needed to unveil their practical application potential. In this review, we discuss material advancements for high-speed DW motion, progress in DW logic devices, groundbreaking demonstrations of current-driven DW logic, and its potential for practical applications. Additionally, we discuss alternative approaches for current-free information propagation, along with challenges and prospects for the development of DW logic.

In this work, we focus on a detailed study of the role of each component layer in the multilayer structure of a magnetic tunnel junction (MTJ) as well as the analysis of the effects that the deposition parameters of the thin films have on the performance of the structure. Various techniques including atomic force microscopy (AFM), scanning electron microscopy (SEM), and transmission electron microscopy (TEM) were used to investigate the effects of deposition parameters on the surface roughness and thickness of individual layers within the MTJ structure. Furthermore, this study investigates the influence of thin films thickness on the magnetoresistive properties of the MTJ structure, focusing on the free ferromagnetic layer and the barrier layer (MgO). Through systematic analysis and optimization of the deposition parameters, this study demonstrates a significant improvement in the tunnel magnetoresistance (TMR) of the MTJ structure of 10% on average, highlighting the importance of precise control over thin films properties for enhancing device performance.

True random number generators (TRNGs) should ideally generate lengthy chains of non-repeating, uncorrelated bit-streams that are efficient in terms of both energy and area. Current TRNG designs include source of randomness such as CMOS or non-volatile memory based devices with additional circuitry to improve the quality of randomness leading to power and area overhead. This paper addresses these issues by improving the randomness of the Spin-Orbit Torque (SOT)-Magnetic Tunnel Junction cell. Motivated by the observation that free layer thickness of Magnetic Tunnel Junction (MTJ) can be scaled to design a low-barrier device, the paper proposes a novel source of randomness called ΔSOT. This device is then used to design TRNG circuits that achieves high quality random telegraphic switching behavior without any additional circuitry making it suitable for ultra-low power applications. Evaluations show that ΔSOT-TRNG has significant reduction in energy (51%) and area (66%) compared to state-of-the-art MTJ based TRNG design. Furthermore, the work shows that the improved switching speed of the reduced barrier junction can results in 65% increase in throughput compared to MTJ based TRNG design.

Perpendicular magnetic anisotropy (PMA) is crucial in magnetic tunnel junctions (MTJs) for next-generation devices such as non-volatile memory devices–magnetic random-access-memory, spin–orbit-torque-based devices, and magnetic sensors. Precise tuning of PMA requires highly controllable modification methods compatible with existing electronic device fabrication technology. In this study, we report on the effects of low-energy (30 keV) Ar and Ne ion irradiation on the PMA of cobalt-iron-boron alloy (CoFeB) based thin films for fluences between 1 × 1013 ions·cm−2 and 1 × 1015 ions·cm−2 and resultant displacement per atom (DPA) of 0.13–13 and 0.32–32 for Ne and Ar ions, respectively. Our results showed that ion irradiation reduced the PMA in CoFeB layer. The effective anisotropy energy, Keff ≈ 64 kJ·m−3 for un-irradiated CoFeB stacks reduced to ≈ 50 kJ·m−3 and ≈ 30 kJ·m−3 for stacks irradiated with 1 × 1013 Ne·cm−2 and with 1 × 1013 Ar·cm−2, respectively. Monte Carlo-based simulations for ion irradiation showed significant intermixing of interface layers upon irradiation leading to decrease in Fe–O and Fe/Co–W orbital hybridization, which reduced the PMA. Furthermore, intermixing of Fe/Co with W resulted in the formation of paramagnetic phases, which decreased the saturation magnetization. Our study shows that ion irradiation is an effective method for tuning PMA in MTJs, and the extent of change in PMA can be directly correlated with the DPA. [ABSTRACT FROM AUTHOR]

Modern machine learning is based on powerful algorithms running on digital computing platforms and there is great interest in accelerating the learning process and making it more energy efficient. In this paper we present a fully autonomous probabilistic circuit for fast and efficient learning that makes no use of digital computing. Specifically we use SPICE simulations to demonstrate a clockless autonomous circuit where the required synaptic weights are read out in the form of analog voltages. This allows us to demonstrate a circuit that can be built with existing technology to emulate the Boltzmann machine learning algorithm based on gradient optimization of the maximum likelihood function. Such autonomous circuits could be particularly of interest as standalone learning devices in the context of mobile and edge computing.

Since the first report on truly two-dimensional (2D) magnetic materials in 2017, a wide variety of merging 2D magnetic materials with unusual physical characteristics have been discovered and thus provide an effective platform for exploring the associated novel 2D spintronic devices, which have been made significant progress in both theoretical and experimental studies. Herein, we make a comprehensive review on the recent scientific endeavors and advances on the various engineering strategies on 2D ferromagnets, such as strain-, doping-, structural- and electric field-engineering, toward practical spintronic applications, including spin tunneling junctions, spin field-effect transistors and spin logic gate, etc. In the last, we discuss on current challenges and future opportunities in this field, which may provide useful guidelines for scientists who are exploring the fundamental physical properties and practical spintronic devices of low-dimensional magnets.

Magnetic tunnel junctions (MTJs) have been widely utilized in sensitive sensors, magnetic memory, and logic gates due to their tunneling magnetoresistance. Moreover, these MTJ devices have promising potential for renewable energy generation and storage. Compared with Si-based devices, MTJs are more tolerant to electromagnetic radiation. In this review, we summarize the functionalities of MgO-based MTJ devices under different electromagnetic irradiation environments, with a focus on gamma-ray radiation. We explore the effects of these radiation exposures on the MgO tunnel barriers, magnetic layers, and interfaces to understand the origin of their tolerance. This review enhances our knowledge of the radiation tolerance of MgO-based MTJs, improves the design of these MgO-based MTJ devices with better tolerances, and provides information to minimize the risks of irradiation under various irradiation environments. This review starts with an introduction to MTJs and irradiation backgrounds, followed by the fundamental properties of MTJ materials, such as the MgO barrier and magnetic layers. Then, we review and discuss the MTJ materials and devices' radiation tolerances under different irradiation environments, including high-energy cosmic radiation, gamma-ray radiation, and lower-energy electromagnetic radiation (X-ray, UV–vis, infrared, microwave, and radiofrequency electromagnetic radiation). In conclusion, we summarize the radiation effects based on the published literature, which might benefit material design and protection. [ABSTRACT FROM AUTHOR]

Magnetic sensors are key elements in many industrial, security, military, and biomedical applications. Heusler alloys are promising materials for magnetic sensor applications due to their high spin polarization and tunable magnetic properties. The dynamic field range of magnetic sensors is strongly related to the perpendicular magnetic anisotropy (PMA). By tuning the PMA, it is possible to modify the sensing direction, sensitivity and even the accuracy of the magnetic sensors. Here, we report the tuning of PMA in a Co2MnGa Heusler alloy film via argon (Ar) ion irradiation. MgO/Co2MnGa/Pd films with an initial PMA were irradiated with 30 keV 40Ar+ ions with fluences (ions·cm−2) between 1 × 1013 and 1 × 1015 Ar·cm−2, which corresponds to displacement per atom values between 0.17 and 17, estimated from Monte-Carlo-based simulations. The magneto optical and magnetization results showed that the effective anisotropy energy (Keff) decreased from ~153 kJ·m−3 for the un-irradiated film to ~14 kJ·m−3 for the 1 × 1014 Ar·cm−2 irradiated film. The reduced Keff and PMA are attributed to ion-irradiation-induced interface intermixing that decreased the interfacial anisotropy. These results demonstrate that ion irradiation is a promising technique for shaping the PMA of Co2MnGa Heusler alloy for magnetic sensor applications. [ABSTRACT FROM AUTHOR]

The conventional computing method based on the von Neumann architecture is limited by a series of problems such as high energy consumption, finite data exchange bandwidth between processors and storage media, etc., and it is difficult to achieve higher computing efficiency. A more efficient unconventional computing architecture is urgently needed to overcome these problems. Neuromorphic computing and stochastic computing have been considered to be two competitive candidates for unconventional computing, due to their extraordinary potential for energy-efficient and high-performance computing. Although conventional electronic devices can mimic the topology of the human brain, these require high power consumption and large area. Spintronic devices represented by magnetic tunnel junctions (MTJs) exhibit remarkable high-energy efficiency, non-volatility, and similarity to biological nervous systems, making them one of the promising candidates for unconventional computing. In this work, we review the fundamentals of MTJs as well as the development of MTJ-based neurons, synapses, and probabilistic-bit. In the section on neuromorphic computing, we review a variety of neural networks composed of MTJ-based neurons and synapses, including multilayer perceptrons, convolutional neural networks, recurrent neural networks, and spiking neural networks, which are the closest to the biological neural system. In the section on stochastic computing, we review the applications of MTJ-based p-bits, including Boltzmann machines, Ising machines, and Bayesian networks. Furthermore, the challenges to developing these novel technologies are briefly discussed at the end of each section. [ABSTRACT FROM AUTHOR]

The performance and efficiency of running large-scale datasets on traditional computing systems exhibit critical bottlenecks due to the existing “power wall” and “memory wall” problems. To resolve those problems, processing-in-memory (PIM) architectures are developed to bring computation logic in or near memory to alleviate the bandwidth limitations during data transmission. NAND-like spintronics memory (NAND-SPIN) is one kind of promising magnetoresistive random-access memory (MRAM) with low write energy and high integration density, and it can be employed to perform efficient in-memory computation operations. In this study, we propose a NAND-SPIN-based PIM architecture for efficient convolutional neural network (CNN) acceleration. A straightforward data mapping scheme is exploited to improve parallelism while reducing data movements. Benefiting from the excellent characteristics of NAND-SPIN and in-memory processing architecture, experimental results show that the proposed approach can achieve ∼2.6× speedup and ∼1.4× improvement in energy efficiency over state-of-the-art PIM solutions. [ABSTRACT FROM AUTHOR]

The electric-field modulation of magnetization switching is an energy-efficient method for the design of potential spintronic devices. In this study, a magnetic tunnel junction (MTJ)/Pb(Mg1/3Nb2/3)0.7Ti0.3O3 (PMN-PT) magnetoelectric heterostructure with the memory configuration of the MTJ was constructed for electric-field control of magnetization switching through angular-dependent magnetotransport measurements. It was observed that the electric-field control of tunneling magnetoresistance (TMR) depends on the direction of the applied magnetic field, and the corresponding tunability (T) of the TMR ratio will also change as the angle between the applied magnetic field and the x-axis changes. When a maximal electric field of 8.6 kV/cm is applied to the PMN-PT layer with a magnetic field (~50 Oe) along the major axis direction of the MTJ (i.e., PMN-PT [100]), the tunability Tmajor (the subscript refers to the major axis) is approximately +0.17‰. However, when a magnetic field (~50 Oe) is applied along the minor axis direction of the MTJ (i.e., PMN-PT [01-1]), the tunability Tminor is approximately −1.8‰. Furthermore, the tunability Tminor (the subscript refers to the minor axis) first increases with a positive sign and then decreases with a negative sign as the applied magnetic fields increase. It further increases negligibly as the magnitude of the applied magnetic field increases. The corresponding transitional region is in the range of approximately 15–40 Oe. It is conjectured that the competition among electric-field-induced magnetoelastic anisotropy, magnetic shape anisotropy, and Zeeman energy induced by the external magnetic field contributes to the magnetization switching of the free layer in the MTJ. This results in the aforementioned electric-field control of the TMR behavior. The findings from this study can help in understanding the mechanism of electric-field-induced magnetic switching in storage-mode MTJs through strain-mediated magnetoelectric coupling. [ABSTRACT FROM AUTHOR]