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Nano-magnetic logic is one of the most competitive technologies of conventional metal oxide semiconductor-based designs. There is no current flow, and information is transferred via the magnetic force between the magnets. Because of this phenomenon, it has low power dissipation and operating in the megahertz frequency range. In this paper, perpendicular nano-magnetic logic (pNML) technology is used for designing a non-restoring divider circuit. First, a new three-dimensional layout of the Exclusive-OR (XOR) gate is proposed. This layout is extended to a new 1-bit full adder circuit, 1-bit non-restoring cell and a 4-bit non-restoring divider. According to our insight, the proposed non-restoring divider circuit in the pNML layout and use of the multilayer is the first time in the literature. The areas of the proposed layouts are 9.72 µm2, 45.9 µm2, 61.2 µm2 and 3955.95 µm2 for the XOR gate, full adder, non-restoring cell and non-restoring divider designs, respectively. The proposed FA consumes 44.25% less latency and 60% fewer layers than the existing state-of-the-art work. All the proposed layouts are implemented using the MagCAD tool. [ABSTRACT FROM AUTHOR]

The post-CMOS scenario poses many challenges to researchers. Innovative solutions must be found to further improve electronic circuits. Exploiting the potential offered by the third dimension is clearly one of the best possibilities available. However, due to the lack of a simple and straightforward methodology, it is difficult to analyze and compare beyond-CMOS technologies. We tackle this challenge by presenting a framework that enables the design of 3-D circuits based on field-coupled technologies. The tool is called MagCAD and is part of the ToPoliNano design suite, created to design and simulate circuits based on emerging technologies by applying a top-down methodology. Right now, MagCAD supports the two main implementations of nanomagnetic logic (NML), the in-plane NML, and the perpendicular NML (pNML). However, it is designed to be easily extended to other beyond-CMOS technologies. Researchers can design pNML circuits by using MagCAD, which embeds design rules, physical models, and technological parameters. The compact model and the physical properties of these cells are based on experimental results. After the design phase, a register-transfer-level model of the circuit is automatically extracted by MagCAD. The model is written in VHSIC Hardware Description Language and has been validated through experiments. The extracted model can be simulated with fast HDL-simulators; this makes it possible to verify the behavior and extract the performance of the designed circuit. With MagCAD, designers have the possibility to easily design,simulate, and compare 3-D NML circuits, exploring the advantages provided by the third dimension freely.

Abstract Perpendicular NanoMagnet Logic (pNML) can be considered one of the most interesting emerging technology since it has unique features that cannot be naturally implemented with standard transistor technologies. Each device can act both as a memory and a logic circuit. Because of its intrinsic properties, this technology makes it possible to easily design 3D circuits. In this paper, we propose several complex architectures by exploiting the 3D integrability of the pNML technology. The presented circuits belong to different categories, covering both combinational and sequential circuits. Memory elements and logic circuits have been designed and simulated taking into account the technology constraints. As an absolute novelty, the first Finite State Machine based on pNML is also introduced. Highlights • Architectural exploration of perpendicular Nano Magnetic Logic (pNML) technology. • Design of combination and sequential circuits in pNML technology. • Design analysis of a pNML Random Access Memory, a 32-bit Ripple Carry Adder, a Programmable Logic Array and a FSM. • Performance analysis of the designed circuits. [ABSTRACT FROM AUTHOR]