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We present a dynamic verification tool MCC for Multicore Communication API applications — a new API for communication among cores. MCC systematically explores all relevant interleavings of an MCAPI application using a tailor-made dynamic partial order reduction algorithm (DPOR). Our contributions are (i) a way to model the non-overtaking message matching relation underlying MCAPI calls with a high level algorithm to effect DPOR for MCAPI that controls the lower level details so that the intended executions happen at runtime; and (ii) a list of default safety properties that can be utilized in the process of verification. To our knowledge, this is the first push button model checker for MCAPI application writers that, at present, deals with an interesting subset of MCAPI calls. Our result is the demonstration that we can indeed develop a dynamic model checker for MCAPI that can directly control the non-deterministic behavior at runtime that is inherent in any implementation of the library without additional API modifications or additions.

The application constraints driving the design of embedded systems are constantly demanding higher performance and power efficiency. To meet these constraints, current SoC platforms rely on replicating several processing cores while adding dedicated hardware accelerators to handle specific tasks. However, developing embedded applications is becoming a key challenge, since applications workload will continue to grow and the software technologies are not evolving as fast as hardware architectures, leaving a gap in the full system design. Indeed, the increased programming complexity can be associated to the lack of software standards that supports heterogeneity, frequently leading to custom solutions. On the other hand, implementing a standard software solution for embedded systems might induce significant performance and memory usage overheads. Therefore, this Thesis focus on decreasing this gap by implementing hardware mechanisms in co-design with a standard programming interface for embedded systems. The main objectives are to increase programmability through the implementation of a standardized communication application programming interface (MCAPI), and decrease the overheads imposed by the software implementation through the use of the developed hardware mechanisms.The contributions of the Thesis comprise the implementation of MCAPI for a generic multi-core platform and dedicated hardware mechanisms to improve communication connection phase and overall performance of data transfer phase. It is demonstrated that the proposed mechanisms can be exploited by the software implementation without increasing software complexity. Furthermore, performance estimations obtained using a SystemC/TLM simulation model for the reference multi-core architecture show that the proposed mechanisms provide significant gains in terms of latency (up to 97%), throughput (40x increase) and network traffic (up to 68%) while reducing processor workload for both characterization test-cases and real application benchmarks., L’évolution des contraintes applicatives imposent des améliorations continues sur les performances et l’efficacité énergétique des systèmes embarqués. Pour répondre à ces contraintes, les plateformes « SoC » actuelles s’appuient sur la multiplication des cœurs de calcul, tout en ajoutant des accélérateurs matériels dédiés pour gérer des tâches spécifiques. Dans ce contexte, développer des applications embarquées devient un défi complexe, en effet la charge de travail des applications continue à croître alors que les technologies logicielles n’évoluent pas aussi vite que les architectures matérielles, laissant un écart dans la conception complète du système. De fait, la complexité accrue de programmation peut être associée à l’absence de standards logiciels qui prennent en charge l’hétérogénéité des architectures, menant souvent à des solutions ad hoc. A l’opposé, l’utilisation d’une solution logicielle standardisée pour les systèmes embarqués peut induire des surcoûts importants concernant les performances et l’occupation de la mémoire si elle n’est pas adaptée à l’architecture. Par conséquent, le travail de cette thèse se concentre sur la réduction de cet écart en mettant en œuvre des mécanismes matériels dont la conception prend en compte une interface de programmation standard pour systèmes embarqués. Les principaux objectifs sont ainsi d’accroître la programmabilité par la mise en œuvre d’une interface de programmation : MCAPI, et de diminuer la charge logiciel des cœurs grâce à l’utilisation des mécanismes matériels développés.Les contributions de la thèse comprennent la mise en œuvre de MCAPI pour une plate-forme multicœur générique et des mécanismes matériels pour améliorer la performance globale de la configuration de la communication et des transferts de données. Il est démontré que les mécanismes peuvent être pris en charge par les interfaces logicielles sans augmenter leur complexité. En outre, les résultats de performance obtenus en utilisant un modèle SystemC/TLM de l’architecture multicœurs de référence montrent que les mécanismes proposés apportent des gains significatifs en termes de latence, débit, trafic réseau, temps de charge processeur et temps de communication sur des cas d’étude et des applications complètes.

High performance and high power efficiency are two mandatory constraints for multi-core systems in order to successfully handle the most recent applications in several fields, e.g. image processing and communication standards. Nowadays, hardware accelerators are often used along with several processing cores to achieve the desired performance while keeping high power efficiency. However, such systems impose an increased programming complexity due to the lack of software standards that supports heterogeneity, frequently leading to custom solutions. On the other hand, implementing a standard software solution for embedded systems might induce significant overheads. This work presents a hardware mechanism in co-design with a standard programming interface (API) for embedded systems focusing to decrease overheads imposed by software implementation while increasing programmability and communication performance. The results show gains of up to 97% in latency and an increase of 40 times in throughput for synthetic traffics and an average decrease of 95% in communication time for an image processing application.

This chapter introduces a number of concurrency abstraction layers that provide the software developer some necessary abstractions for developing multicore software. Each of these abstraction layers has a technique for developing software using the approach, so several code examples are given for each approach. Pros and cons are discussed for each approach.

We describe verification and coverage methods for multicore software that uses message passing libraries for communication. Specifically, we provide techniques to improve reliability of software using the new industry standard MCAPI by the Multicore Association. We develop dynamic predictive verification techniques that allow us to find actual and potential errors in a multicore software. Some of these error types are deadlocks, race conditions, and violation of temporal assertions. We complement our verification techniques with a mutation-testing-based coverage metric. Coverage metrics enable measuring the quality of verification tests. We implemented our techniques in tools and validated them on several multicore programs that use the MCAPI standard. We implement our techniques in tools and experimentally show the effectiveness of our approach. We find errors that are not found using traditional dynamic verification techniques and we can potentially explore execution schedules different than the original program with our coverage tool. This is the first time such predictive verification and coverage metrics have been developed for MCAPI.

The Multicore Communications API (MCAPI) is a new message-passing API that was released by the Multicore Association. MCAPI provides an interface designed for closely distributed embedded systems with multiple cores on a chip and/or chips on a board. Similar to parallel programs in other domains, debugging MCAPI programs is a challenging task due to their nondeterministic behavior. In this article we present a tool that is capable of deterministically replaying MCAPI program executions, which provides valuable insight for MCAPI developers in case of failure.

Multicore processor designs have become increasingly popular for embedded applications in recent years, but diversified inter-core communication mechanisms have led to the difficulties in software development, integration and migration. A unified, portable, and efficient inter-core communication mechanism would have helped reduce these difficulties significantly, but such a solution did not exist today. We proposed a scheme called MSG, which provides users with a set of essential message-passing programming interfaces adopted from MPI and MCAPI, including blocking and non-blocking point-to-point communications, one-sided communications, and collective operations. We experimented and evaluated our design methodology with case studies on two heterogeneous multicore platforms: IBM CELL and ITRI PAC DUO. On the CELL platform, our MSG library fitted in the 256KB local memory on each individual processor core and outperformed two existing communication libraries, DaCS and CML. On the second case study, we were able to port MSG onto the PAC DUO platform within two weeks upon receiving the platform. With a systematic approach, we showed how optimizations could be done to improve the performance of the MSG libraries. Hopefully, our experiences help the design and development of communication libraries for existing and future multicore platforms.

Topics include a new flexible, easily programmable supercomputer; an API that helps developers build applications for multicore chips; a private wireless-spectrum marketplace; and an intelligent pill that comes with its own microprocessor.

This paper presents CHAOS-MCAPI (Communication Header and Operating Support-Multicore Communication API), an IPC mechanism targeting parallel programming based on message passing on multicore platforms. The proposed mechanism is built on top of the D-Bus protocol for message transmission, which allows a higher abstraction level and control when compared to lower-level mechanisms such as UNIX Pipes. Optimizations adopted by the implementation of CHAOS-MCAPI resulted in significant performance gains in relation to the original D-Bus implementation, which should be further improved by the adoption of KDBus, a 'zero-copy' mechanism recently made available natively in the Linux Kernel. That should make CHAOS-MCAPI a viable alternative for the design and implementation of parallel programs targeting multicore platforms, both in terms of scalability and programmer's productivity.

This chapter provides an overview of how mobile devices, technology, and approaches are currently being utilized by commercial market research. The chapter defines what it means by ‘mobile’ and highlights the difference between the ‘visible’ (projects where the use of mobile is seen as a core part of the project) and the ‘less visible’ (for example mobile devices being used to take part in online surveys designed for PCs). In commercial research the visible mobile projects get most of the attention in the media and at conferences, but the less visible is much larger in terms of the amount of data collected and the money spent. The chapter then goes on to review the key uses of mobile, for example: web surveys, CATI, CAPI, mobile apps, passive data collection, in-the-moment research, and location-based research. The chapter next looks at the issues facing the use of mobile market research, such as the impact on the results, ethical issues, and the balance between the use of web-based and app-based approaches. The chapter concludes by looking at the near future.

Current SoC platforms targeting high-performance with high power efficiency rely on replicating several processing cores while adding dedicated hardware units for specific tasks. However, programming such architectures demand a high effort when compared to homogeneous multiprocessors since there is no widely used standard for heterogeneous embedded systems. The use of standard application programming interfaces (APIs) increases the programmability but also costs performance/memory usage overheads. Providing mechanisms at the software level leveraging on dedicated hardware resources can help reducing that impact. To address this point, this work presents a co-design approach for improving programming based on a standard API deployed through a mix of hardware and software support for tasks synchronization. Results present a reduction of up to 88% in network traffic and processor active times during synchronization phases when compared to a pure software implementation.

Computer-assisted data collection in survey research offers potentially lower costs, quicker turnaround time, and improved data quality as compared to traditional paper-and-pencil methods. The proliferation of handheld computers in recent years now makes these benefits more accessible to field researchers. Handheld computers are inexpensive, portable, and energy efficient, making them ideal field instruments. In this article, I review a new software product designed for mobile computer- assisted personal interviewing (MCAPI) with Palm OS handheld computers. Based on my experience with MCAPI in the field, I conclude that version 3.0 of Entryware software is a robust tool for face-to-face or self-administered structured interviews in field settings. I also consider some implications of this new technology for field research, including respondents' reactions and data quality. Handheld computers have become commonplace, and field researchers should take note: These small, affordable computers are not just personal organizers. They offer absolute portability, extended battery life, an intuitive interface, and surprising computing power. In addition, the connectability of handhelds to desktop computers provides a mobile interface with standard software applications, and modem and wireless communications make it easy to transfer data to and from the field. The potential utility of handheld computers for field researchers is tremendous (Greene 2001). This review considers a new product for the Palm platform that makes good on the promise of mobile computing for field researchers. Version 3.0 of Techneos Systems' Entryware software consists of two applications for designing questionnaires, transferring data, and conducting face-to-face interviews with Palm-powered computers. This technology offers several key advantages of computer-assisted interviewing in general but stands out for its true mobility and significantly lower hardware costs. Here I offer a brief overview of mobile computer-assisted personal inter- viewing (MCAPI) in general and review the key features of the Entryware system in particular. I report my own experiences using Entryware software

The increasing complexity in the development of embedded system is raising the need of system modularization, parallelization and component portability. High-level languages such as UML are clearly oriented to solve these needs, but implementation flows are usually highly dependent on platform details. Different platform-agnostic APIs such as MPI or MCAPI have appeared to increase the application independence from the executive HW. Nevertheless, the gap between the high-level models and the final system implementations is still too large. In this context, this paper presents a methodology for automating system deployment of component-based systems. The process starts from a high level description based on UML/MARTE, including complex channel semantics and provides automatic code generation for interconnection and deployment of system components based on MCAPI. This automatic process enables exploring different possibilities both in the component allocation and in the resulting concurrency, involving low designer effort.

This paper presents an implementation of Multicore Communications API (MCAPI), with focus on portability, stability, and simplicity of the design. The main motivation for the implementation is instability of other publicly available implementations. The developed implementation utilizes POSIX message queues, that is an easily portable interface and readily compatible with MCAPI. The performance was measured as latency and transfer rate of the API. The measurement platforms were a x86-64 PC and a development board featuring an ARM processor. A MCAPI implementation was used as reference for comparison. PMQ-MCAPI is much more stable and easily usable than other MCAPI implementations publicly available for PC. When transfer size was between 1–8 KiB, latency of transfers between cores was between 9–15 µs and transfer rate 500–5000 MBps. This translates to 27 000–45 000 cycles and 0.16–1.67 bytes per cycle. CPU and especially performance of its cache were concluded as the most important factors contributing to the performance. In comparison to the reference, latency of the implementation was 1/8 at best, while transfer rate was up to 35x.

The increasing complexity in the development of embedded system applications is necessitating system modularization, parallelization and component portability. Finding the best solution to combine component reuse and platform optimization is not an easy and straightforward task, especially when considering the different APIs supported to provide communication and concurrency on the different boards. Thus, in order to reduce designer effort, the development of automatic synthesis tools operating from high level models is emerging. In this context, this paper presents a methodology for automating system deployment on different platforms supporting distinct APIs. The process starts from a high-level description based on UML/MARTE and provides automatic code generation for interconnection and deployment of system components. This automatic process enables exploration of different possibilities both in the component allocation and in the resulting concurrency, requiring only minimal designer effort. Different APIs such as POSIX, OpenMP, OpenStream, TCP-IP and MCAPI are covered to provide the required flexibility for platform support and reuse.

Asynchronous message passing is an important paradigm in writing applications for embedded heterogeneous multicore systems. The Multicore Association (MCA), an industry consortium promoting multicore technology, is working to standardize message passing into a single API, MCAPI, for bare metal implementation and portability across platforms. Correctness in such an API is difficult to reason about manually, and testing against reference solutions is equally difficult as reference solutions implement an unknown set of allowed behaviors, and programmers have no way to directly control API internals to expose or reproduce errors. This paper provides a way to encode an MCAPI execution as a Satisfiability Modulo Theories (SMT) problem, which if satisfiable, yields a feasible execution schedule on the same trace, such that it resolves non-determinism in the MCAPI runtime in a way that it now fails user provided assertions. The paper proves the problem is NP-complete. The encoding is useful for test, debug, and verification of MCAPI program execution. The novelty in the encoding is the direct use of match pairs (potential send and receive couplings). Match-pair encoding for MCAPI executions, when compared to other encoding strategies, is simpler to reason about, results in significantly fewer terms in the SMT problem, and captures feasible behaviors that are ignored in previously published techniques. Further, to our knowledge, this is the first SMT encoding that is able to run in infinite-buffer semantics, meaning the runtime has unlimited internal buffering as opposed to no internal buffering. Results demonstrate that the SMT encoding, restricted to zero-buffer semantics, uses fewer clauses when compared to another zero-buffer technique, and it runs faster and uses less memory. As a result the encoding scales well for programs with high levels of non-determinism in how sends and receives may potentially match.

This chapter discusses communication and synchronization libraries which can be used to implement parallelism in your embedded application. Details will be shared on several common libaries including Windows Threads, POSIX Threads, Threading Building Blocks, OpenMP, and MCAPI.

Multicore software development is growing in importance and applicability in many areas of embedded systems from automotive to networking, to wireless base stations. This chapter is a summary of key sections of the recently released Multicore Programming Practices (MPP) from the Multicore Association (MCA). The MPP standardized “best practices” guide is written specifically for engineers and engineering managers of companies considering or implementing a development project involving multicore processors and favoring use of existing multicore technology. There is an important need to better understand how today’s C/C++ code may be written to be “multicore ready”, and this was accomplished under the influence of the MPP working group. The guide will enable you to (a) produce higher-performing software; (b) reduce the bug rate due to multicore software issues; (c) develop portable multicore code which can be targeted at multiple platforms; (d) reduce the multicore programming learning curve and speed up development time; and (e) tie into the current structure and roadmap of the Multicore Association’s API infrastructure.

FPGAs are traditionally designed with RTL-level IP-block descriptions. Many FPGA designs include several synthesizable processors and SW executables are mapped to them after a separate software development process. The tools help connecting physical blocks together and typically provide a board support package for SW development to access HW from the application code. The designer is still responsible of carefully planning how the applications on multiple cores communicate, which is getting the more difficult the more cores and other IP blocks are introduced. We apply Multicore Association Communications API (MCAPI) to implement hardware independent communication mechanism between the applications. The benefit is a unified programming API to different processor and operating system types, but also for hardware IP-blocks that the cores can access. We introduce MCAPI and show a case study of a simple video encoder with and without MCAPI abstraction. Porting an application function takes 3 hours with MCAPI and 5 without, i.e. 40% reduction. However, the overhead from MCAPI is increase memory footprint by 25 KB and effect on the video encoder performance -22% compared to non-MCAPI case.

IP-XACT, the recent IEEE1685 standard, defines metadata format for IP packing and integration in System-on-Chip designs. It was originally proposed for hardware descriptions, but we have extended it for software, HW/SW mappings and application communication abstraction. The latter is realized with Multicore Association MCAPI that is a lightweight message passing interface. In this paper we present as a work-in-progress how we utilize all these to deploy and move application tasks between different platforms for FPGA prototyping, execution acceleration or verification. The focus is on the metadata format since it is a foundation for automation and tool development. The design flow is illustrated with two case studies: A motion JPEG encoder and a 12-node workload model of video object plane decoder (VOPD). These are deployed to PC and Altera and Xilinx FPGA boards in five variations. The results are reported as the deployment time for both non-recurring and deployment specific tasks. Setting up a new deployment is a matter of hours when there is an IP-XACT library of HW and SW components.

In this paper, we present a prototype implementation of the Multicore Communications API (MCAPI) for the Intel Single-Chip Cloud Computer (SCC). The SCC is a 48 core concept vehicle for future many-core systems that exhibit message-passing oriented architectures. The MCAPI specification, recently developed by the Multicore Association, resembles a lightweight interface for message-passing in today's multicore systems. The presented prototype implementation should be used to evaluate the MCAPI's capability and feasibility for its employment also in future many-core systems.

This paper presents a formal modeling paradigm that is callable from C, the dominant language for embedded systems programming, for message passing APIs that provides reasonable assurance that the model correctly captures intended behavior. The model is a suitable reference solution for the API, and it supports putative what-if queries over API scenarios for behavior exploration, reproducibility for test and debug, full exhaustive search, and other advanced model checking analysis methods for C programs that use the API. This paper illustrates the modeling paradigm on the MCAPI interface, a growing industry standard message passing library, showing how the model exposes errors hidden by the C reference solution provided by the Multicore Association.

Simulation based verification is the most commonly used verification technique in the industry. However, the effort of generating new tests is non-trivial especially for the newly emerging multicore applications. Automated test generation greatly reduces the cost of testing ultimately improving the quality of multicore software. We develop an automated test generation framework using static analysis techniques for embedded multicore applications. We use an emerging multicore standard for multicore applications, named Multicore Communication API (MCAPI). MCAPI is a lightweight API that targets heterogeneous multicore embedded systems. Specifically, our techniques lever- age mutation testing and model checking. We present preliminary experimental results to validate the effectiveness of our approach.

Multi-core processor technology has been applied to the processors in embedded systems as well as in ordinary PC systems. In multi-core embedded processors, however, a processor may consist of heterogeneous CPU cores that are not configured with a shared memory and do not have a communication mechanism for inter-core communication. MCAPI is a highly portable API standard for providing inter-core communication independent of the architecture heterogeneity. In this paper, we extend the current MCAPI to a multi-chip in a distributed memory configuration and propose its portable implementation, named XMCAPI, on a commodity network stack. With XMCAPI, the inter-core communication method for intra-chip cores is extended to inter-chip cores. We evaluate the XMCAPI implementation, xmcapi/ip, on a standard socket in a portable software development environment.

Key challenge for embedded system companies is management of product configurations over lifecycle. Either new functionality is implemented on an old platform, legacy code on a new one, or both at the same time. We propose Kactus2, a product integration environment suitable for small and mid-size enterprises (SME) utilizing FPGAs. We combine IP-XACT for HW integration and Multicore Association Communications API (MCAPI) for SW integration. The programmer has a uniform view of the system as MCAPI nodes regardless of their implementation in SW or HW. Kactus2 is a work-in-progress open source project implemented in C++ and QT 4.7 currently containing over 40k lines of code and gSOAP as TGI IP-XACT interface.

The Multicore Communications API (MCAPI) is a new message passing API that was released by the Multicore Association. MCAPI provides an interface designed for closely distributed embedded systems with multiple cores on a chip and/or chips on a board. Similar to concurrent programs in other domains, debugging MCAPI programs is a challenging task due to their non-deterministic behavior. In this paper we present a tool that is able to deterministically replay the executions of MCAPI programs, which provides valuable insight for MCAPI developers in case of failure.

Within the domain of embedded systems, hardware architectures are commonly characterised by application-specific heterogeneity. Systems may contain multiple dissimilar processing elements, non-standard memory architectures, and custom hardware elements. The programming of such systems is a considerable challenge, not only because of the need to exploit large degrees of parallelism but also because hardware architectures change from system to system. To solve this problem, this paper proposes the novel combination of a new industry standard for communication across multicore architectures (MCAPI), with a minimal-overhead technique for targeting complex architectures with standard programming languages (Compile-Time Virtualisation).The Multicore Association have proposed MCAPI as an industry standard for on-chip communications. MCAPI abstracts the on-chip physical communication to provide the application with logical point-to-point unidirectional channels between nodes (software thread, hardware core, etc.). Compile-Time Virtualisation is used to provide an extremely lightweight implementation of MCAPI, that supports a much wider range of architectures than its specification normally considers. Overall, this unique combination enhances programmability by abstracting on-chip communication whilst also exposing critical parts of the target architecture to the programming language.

Improper use of Inter-Process Communication (IPC) within concurrent systems often creates data races which can lead to bugs that are challenging to discover. Techniques that use Satisfiability Modulo Theories (SMT) problems to symbolically model possible executions of concurrent software have recently been proposed for use in the formal verification of software. In this work we describe a new technique for modeling executions of concurrent software that use a message passing API called MCAPI. Our technique uses an execution trace to create an SMT problem that symbolically models all possible concurrent executions and follows the same sequence of conditional branch outcomes as the provided execution trace. We check if there exists a satisfying assignment to the SMT problem with respect to specific safety properties. If such an assignment exists, it provides the conditions that lead to the violation of the property. We show how our method models behaviors of MCAPI applications that are ignored in previously published techniques.

The design and implementation of an application programming interface (API) is a trade-off between abstraction it provides and overheads it causes. This paper presents an implementation of Multicore Communications API (MCAPI) on a heterogeneous platform consisting of FPGA-based multiprocessor system-on-chip (MPSoC) connected via PCIe to an external CPU board. The purpose is to provide a unified programming API to different processor and OS types as well as hardware IP-blocks. MCAPI is shown to meet these requirements. We show the MCAPI transport implementation on three processors and two buses, measure the overhead cost, and analyze the effort required to port an application from a PC to the MPSoC. The measured library memory footprint is less than 25KB and the roundtrip communication latency is diminishing low - only few dozen clock cycles - compared to non-MCAPI implementation.

In the recent years, multicore processor designs have become increasingly popular for embedded applications, but diversified inter-core communication mechanisms have led to the difficulties in software development, integration and migration. A unified, portable, and efficient inter-core communication mechanism would have helped reduce these difficulties significantly, but such a solution did not exist today. We proposed a scheme called MSG, which provides users with a set of essential message-passing programming interfaces adopted from MPI and MCAPI, including blocking and non-blocking point-to-point communications, one-sided communications, and collective operations. We experimented and evaluated our design methodology with the case study on the IBM CELL, a popular heterogeneous multicore platform. On the CELL platform, our MSG library fitted in the 256KB local memory on each individual processor core and outperformed two existing communication libraries, DaCS and CML. With a systematic approach, we showed how optimization could be done on the CELL platform to improve the performance of the MSG library. Hopefully, our experiences help the design and development of communication libraries for existing and future multicore platforms and embedded applications.

The recently proposed MCAPI (Multicore Association Communication API) specification provides multicore programs developers with a standard API for inter-core messages-based communication and stream-based communication. Debugging MCAPI programs that use message-based communication is expected to be very challenging due to the non-determinism associated with the order of messages' arrivals at a core. In this paper we present a tool that uses an off-the-shelf SMT solver to symbolically explore all possible orders of messages arrival in an MCAPI program. If there is a specific order of messages arrival that leads to an error state, this order is presented to the user as a debugging aid.

OBJETIVO: Avaliar índices de pulsatilidade das artérias umbilical (IPAU) e cerebral média (IPACM) e relação do índice de pulsatilidade umbilico-cerebral (IPAU/IPACM) em fetos de gestantes hipertensas e presença de resultados perinatais adversos. MATERIAIS E MÉTODOS: Analisamos IPAU, IPACM e IPAU/IPACM de 289 fetos de gestantes hipertensas quanto à previsão dos resultados perinatais adversos. Os resultados foram comparados sem e com ajuste pela idade gestacional. RESULTADOS: O índice de Apgar < 7 no 5º minuto foi associado com resultados alterados após o ajuste por idade gestacional. O risco para recém-nascidos pequenos para a idade gestacional aumentou em três vezes após o ajuste, com significância estatística em todos os parâmetros do Doppler. Na síndrome da hipóxia neonatal o aumento do risco ajustado pela idade gestacional foi estatisticamente significante no IPAU e IPAU/IPACM. Não houve aumento no risco de síndrome do desconforto respiratório na análise ajustada. A mortalidade perinatal e o IPAU alterado apresentaram um risco três vezes maior e foram estatisticamente significantes após o ajuste. CONCLUSÃO: Em gestantes hipertensas, o IPAU apresentou melhor correlação com os resultados perinatais do que o IPACM ou relação IPAU/IPACM. O risco de resultados adversos deve considerar a idade gestacional. OBJECTIVE: To evaluate the pulsatility index of umbilical artery (UAPI) and middle cerebral artery (MCAPI), as well as the umbilical-cerebral pulsatility (UAPI/MCAPI) ratio in fetuses of hypertensive pregnant women and associated adverse perinatal outcomes. MATERIALS AND METHODS: The authors have analyzed UAPI, MCAPI and UAPI/MCAPI ratio in 289 fetuses of hypertensive women, correlating the results with the presence of adverse perinatal outcomes. Results were compared with and without adjustment for gestational age. RESULTS: Apgar score < 7 at the 5th minute was associated with altered outcomes after adjustment for gestational age. The risk for small-for-gestational-age infant increased three times after such adjustment, with statistical significance for all the Doppler parameters. The increase in risk for neonatal hypoxia after adjustment for gestational age was statistically significant for UAPI and UAPI/MCAPI ratio. No increase was observed in the risk for respiratory distress syndrome in the adjusted analysis. A three-time higher risk for perinatal mortality and altered UAPI with statistical significance was observed after adjustment. CONCLUSION: In fetuses of hypertensive pregnant women, UAPI demonstrated better correlations with perinatal outcomes than MCAPI and UAPI/MCAPI ratio. The risk for adverse gestational outcome should be evaluated taking the gestational age into consideration.

We present a trace-driven SMT-based symbolic debugging tool for MCAPI (Multicore Association Communication API) applications. MCAPI is a newly proposed standard that provides an API for connectionless and connection-oriented communication in multicore applications. Our tool obtains a trace by executing an instrumented MCAPI. The collected trace is then encoded into an SMT formula such that its satisfiability indicates the existence of a reachable error state such as an assertion failure.

A Model-Based Controller with Adaptive Proportional-Integral gains (MCAPI) is developed for a trajectory tracking control of a single-input, single-output nonlinear system. The robustness of tracking error dynamics is guaranteed by the feedback of estimated uncertainty and the performance specification given by the adaptation of PI gains using the second method of Lyapunov. The newly developed MCAPI method is applied to the power tracking control of a nuclear reactor and the simulation results show great improvement in tracking performance compared with the conventional model-based control methods.

We present a dynamic direct code verification tool called MCC (MCAPI Checker) for applications written in the newly proposed Multicore Communications API (MCAPI). MCAPI provides both message passing and threading constructs, making the concurrent programming involved in MCAPI application development a non-trivial challenge. MCC intercepts MCAPI calls issued by user applications. Then, using a verification scheduler, MCC orchestrates a dependency directed replay of all relevant thread interleavings. This paper presents the technical challenges in handling MCC's non-blocking constructs. This is the first dynamic model checker for MCAPI applications, and as such our work provides designers the opportunity to use a formal design tool in verifying MCAPI applications and evaluating MCAPI itself in the formative stages of MCAPI.

Improper use of Inter-Process Communication (IPC) within concurrent systems often creates data races which can lead to bugs that are challenging to discover. Techniques that use Satisfiability Modulo Theories (SMT) problems to symbolically model possible executions of concurrent software have recently been proposed for use in the formal verification of software. In this work we describe a new technique for modeling executions of concurrent software that use a message passing API called MCAPI. Our technique uses an execution trace to create an SMT problem that symbolically models all possible concurrent executions and follows the same sequence of conditional branch outcomes as the provided execution trace. We check if there exists a satisfying assignment to the SMT problem with respect to specific safety properties. If such an assignment exists, it provides the conditions that lead to the violation of the property. We show how our method models behaviors of MCAPI applications that are ignored in previously published techniques.

In this chapter, we will describe our smart predictive analysis technique tailored for enhancing the testing process of programs developed using the MCAPI specification. We have developed a trace-based SMT-driven (Satisfiability Modulo Theories) predictive analysis technique that reduces the process of explicitly enumerating and checking all interleavings to constraint solving that uses off-the-shelf SMT solvers. First, we instrument a program such that it produces a trace when executed. Given the program trace, we assemble a series of quantifier-free first-order logic (QF-FOL) formule that captures not only the given trace but also all possible interleavings of the events of this trace and the functional correctness properties of the program. The formula is fed to a solver; if the solver can find variable assignments that satisfy the formula, then we can find a valid permutation of the events in the trace (an execution scenario) that violates at least one correctness property. In this case, the SMT solver produces an abstract counterexample that embodies the erroneous execution. If not, we can presume that in all execution interleavings originating from the same set of events in the original trace, no violation of the correctness properties is possible.