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1. Atomic layer deposition of transition metal chalcogenide TaSx using Ta[N(CH3)2]3[NC(CH3)3] precursor and H2S plasma.

3. Backside Power Delivery With Relaxed Overlay for Backside Patterning Using Extreme Wafer Thinning and Molybdenum-Filled Slit Nano Through Silicon Vias

6. Molybdenum Nitride as a Scalable and Thermally Stable pWFM for CFET

8. Buried Power Rail Metal exploration towards the 1 nm Node

10. High-k Dielectrics and Metal Gates for Future Generation Memory Devices

14. ALD HfO2 surface preparation study

16. Composition influence on the physical and electrical properties of SrxTi1-xOy-based metal-insulator-metal capacitors prepared by atomic layer deposition using TiN bottom electrodes.

17. First demonstration of ∼3500 cm2/V-s electron mobility and sufficient BTI reliability (max Vov up to 0.6V) In0.53Ga0.47As nFET using an IL/LaSiOx/HfO2 gate stack

18. Si-passivated Ge nMOS gate stack with low Dit and dipole-induced superior PBTI reliability using 3D-compatible ALD caps and high-pressure anneal

19. Scalability of InGaAs gate-all-around FET integrated on 300mm Si platform: Demonstration of channel width down to 7nm and Lg down to 36nm

20. Gate-all-around InGaAs nanowire FETS with peak transconductance of 2200μS/μm at 50nm Lg using a replacement Fin RMG flow

25. Phosphorus doped SiC Source Drain and SiGe channel for scaled bulk FinFETs

26. Scaling of high-k dielectrics towards sub-Inm EOT

28. Composition influence on the physical and electrical properties of SrxTi1−xOy-based metal-insulator-metal capacitors prepared by atomic layer deposition using TiN bottom electrodes

29. Alternative high-k dielectrics for semiconductor applications

30. 0.5 nm EOT low leakage ALD SrTiO3 on TiN MIM capacitors for DRAM applications

42. ALD HfO2 surface preparation study.

47. Atomic layer deposition goes main-stream in 22nm logic technologies.

48. Atomic Layer Deposition of Strontium Titanate Films Using Sr(tBu3Cp)2 and Ti(OMe)4.

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