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Using different types of WSe2 and graphene-based heterostructures, we experimentally determine the offset between the graphene neutrality point and the WSe2 conduction and valence band edges, as well as the WSe2 dielectric constant along the c-axis. In a first heterostructure, consisting of WSe2-on-graphene, we use the WSe2 layer as the top dielectric in dual-gated graphene field-effect transistors to determine the WSe2 capacitance as a function of thickness, and the WSe2 dielectric constant along the c-axis. In a second heterostructure consisting of graphene-on-WSe2, the lateral electron transport shows ambipolar behavior characteristic of graphene combined with a conductivity saturation at sufficiently high positive (negative) gate bias, associated with carrier population of the conduction (valence) band in WSe2. By combining the experimental results from both heterostructures, we determine the band offset between the graphene charge neutrality point, and the WSe2 conduction and valence band edges.

We report the fabrication and device characteristics of exfoliated, few-layer, dual-gated ReS2 field effect transistors (FETs). The ReS2 FETs display n-type behavior with a room temperature Ion/I(off) of 10(5). Many devices were studied with a maximum intrinsic mobility of 12 cm(2) · V(-1) · s(-1) at room temperature and 26 cm(2) · V(-1) · s(-1) at 77 K. The Cr/Au-ReS2 contact resistance determined using the transfer length method is gate-bias dependent and ranges from 175 kΩ · μm to 5 kΩ · μm, and shows an exponential dependence on back-gate voltage indicating Schottky barriers at the source and drain contacts. Dual-gated ReS2 FETs demonstrate current saturation, voltage gain, and a subthreshold swing of 148 mV/decade.

We fabricate and characterize a set of dual-gated graphene field effect transistors using a novel physical vapor deposition technique in which titanium is evaporated onto the graphene channel in 10 Å cycles and oxidized in ambient to form a top-gate dielectric. A combination of X-ray photoemission spectroscopy, ellipsometry, and transmission electron microscopy suggests that the titanium is oxidizing in situ to titanium dioxide. Electrical characterization of our devices yields a dielectric constant of κ = 6.9 with final mobilities above 5500 cm(2)/(V s). Low temperature analysis of the gate-leakage current in the devices gives a potential barrier of 0.78 eV in the conduction band and a trap depth of 45 meV below the conduction band.

We present the room temperature operation of a vertical tunneling field-effect transistor using a stacked double bilayer graphene (BLG) and hexagonal boron nitride heterostructure. The device shows two tunneling resonances with negative differential resistance (NDR). An analysis of the electrostatic potential drop across the heterostructure indicates the resonances are associated with the relative alignment of the lower or upper bands of the two BLG. Using the NDR characteristic of the device, one-transistor latch or SRAM operation is demonstrated. The device characteristics are largely insensitive to temperature from 1.5 to 300 K.

The competition–predation hypothesis has been widely used for many years to explain the segregation along moisture gradients by species of dusky salamanders (genus Desmognathus) along Appalachian streams. According to this idea, all species originally favored aquatic sites, and large, aggressive species displaced smaller ones to more terrestrial habitats, both ecologically and evolutionarily. We tested this hypothesis by investigating the role of a recently described, previously unsuspected member (D. folkertsi) of this assemblage. This species coexists in widespread sympatry with its larger, cryptic congener, D. quadramaculatus. The competition–predation hypothesis predicts that the smaller D. folkertsi is displaced to more terrestrial habitats by the larger, aggressive D. quadramaculatus. We did not find D. folkertsi farther from water than D. quadramaculatus. However, in streams where they are sympatric, D. folkertsi was more abundant in small tributaries while D. quadramaculatus predominated along the...

Graphene presents interesting opportunities but also faces unique challenges for applications in nanoelectronics. As a gapless semiconductor, with an inert surface that is difficult to grow high quality gate dielectrics on, or chemically dope, it can be challenging to make graphene field effect transistors (GFETs) with low leakage currents, low interface state densities, and low source/drain series resistance. However, the Dirac cone bandstructure with high a Fermi velocity enables high frequency GFETs with ambipolar characteristics which can be used, for instance, in simple frequency doublers. Beyond-CMOS low power device ideas include single particle 2D-2D interlayer tunnel FETs (ITFETs), or more esoteric many-body tunneling devices such as the Bilayer Pseudospin FET (BiSFET).

We describe the realization of van der Waals (vdW) heterostructures with accurate rotational alignment of individual layer crystal axes. We illustrate the approach by demonstrating a Bernal-stacked bilayer graphene formed using successive transfers of monolayer graphene flakes. The Raman spectra of this artificial bilayer graphene possess a wide 2D band, which is best fit by four Lorentzians, consistent with Bernal stacking. Scanning tunneling microscopy reveals no moiré pattern on the artificial bilayer graphene, and tunneling spectroscopy as a function of gate voltage reveals a constant density of states, also in agreement with Bernal stacking. In addition, electron transport probed in dual-gated samples reveals a band gap opening as a function of transverse electric field. To illustrate the applicability of this technique to realize vdW heterostructuctures in which the functionality is critically dependent on rotational alignment, we demonstrate resonant tunneling double bilayer graphene heterostructures separated by hexagonal boron-nitride dielectric.

Irradiated or injured cells enter apoptosis, and in turn, promote proliferation of surrounding unaffected cells. In Drosophila, apoptotic cells have an active role in proliferation, where the caspase Dronc and p53 induce mitogen expression and growth in the surrounding tissues. The Drosophila p53 gene structure is conserved and encodes at least two protein isoforms: a full-length isoform (Dp53) and an N-terminally truncated isoform (DDNp53). Historically, DDNp53 was the first p53 isoform identified and was thought to be responsible for all p53 biological activities. It was shown that DDNp53 induces apoptosis by inducing the expression of IAP antagonists, such as Reaper. Here we investigated the roles of Dp53 and DDNp53 in apoptosis and apoptosis- induced proliferation. We found that both isoforms were capable of activating apoptosis, but that they each induced distinct IAP antagonists. Expression of DDNp53 induced Wingless (Wg) expression and enhanced proliferation in both ‘undead cells’ and in ‘genuine’ apoptotic cells. In contrast to DDNp53, Dp53 did not induce Wg expression in the absence of the endogenous p53 gene. Thus, we propose that DDNp53 is the main isoform that regulates apoptosis-induced proliferation. Understanding the roles of Drosophila p53 isoforms in apoptosis and in apoptosis-induced proliferation may shed new light on the roles of p53 isoforms in humans, with important implications in cancer biology.

Electron tunneling is receiving increased emphasis as the physical mechanism of operation in emerging devices that seek to mitigate power dissipation issues in aggressively scaled CMOS technology. A tunneling field-effect transistors (TFET) consisting of a gated p-i-n junction is arguably the best known example. In a separate class of tunneling devices, consisting of two semiconducting layers separated by a barrier, the inter-layer tunneling current-voltage characteristics possess gate-tunable negative differential resistance [1]–[3], which is subsequently used to implement Boolean logic functions [4]. We describe here the fabrication, characterization, and benchmarking of inter-layer TFETs (ITFETs) using double bilayer graphene heterostructures separated by hexagonal boron-nitride dielectric as example [Fig. 1(a)].

In this study, we report the fabrication and characterization of a vertical resonant interlayer tunneling field-effect transistor created using exfoliated, few-layer rhenium disulfide (ReS2) flakes as the electrodes and hexagonal boron nitride as the tunnel barrier. Due to the Γ-point conduction band minimum, the ReS2 based system offers the possibility of resonant interlayer tunneling and associated low-voltage negative differential resistance (NDR) without rotational alignment of the electrode crystal orientations. Substantial NDR is observed, which appears consistent with in-plane crystal momentum conserving tunneling, although considerably broadened by scattering consistent within low mobility ReS2 flakes.

As the limits of CMOS performance are approached, industry, government and academia alike search for so-called beyond “CMOS devices” to replace CMOS either globally or, more likely initially, for specific applications. This discussion focuses on our ongoing efforts to develop and apply one such device concept, resonant interlayer tunnel field effect transistor (ITFETs), addressing essential physics, device design and fabrication, and circuit applications. As considered here, resonant ITFETs employ stacks of two-dimensional van der Waals materials to form both parallel conduction channels and intervening dielectric tunnel barriers. Due to the requirement for surface-parallel crystal momentum conservation between the layers, resonant tunneling between such two dimensional layers is not nominally subject to thermal smearing of the resonance over a few kBT as in more conventional resonant tunneling systems. Thus, such interlayer resonant tunneling potentially could be used for low voltage room temperature applications, with nano-scale devices operating at a tenth of a volt or less in principle. In addition, this layered 2D geometry readily lends itself to electrostatic gating of the interlayer tunneling, from above and even below. The concept of such interlayer resonant tunneling has been around for years. However, the use of 2D van der Waals materials such as monolayer or Bernal-stacked bilayer graphene as channel materials, hexagonal boron-nitride (hBN) as dielectrics, and/or various transition metal dichalcogenides such as MoS2 or ReS2 as channel or dielectric materials, in various combinations also lends itself to atomically precise control of layer thicknesses and interfaces, avoiding, e.g., inhomogeneous resonance broadening. However, there are many challenges to achieving such resonant ITFETs and using them in circuit applications. For example, rotational alignment between layers is essential to interface-parallel crystal-momentum conserving resonant tunneling for van der Waals channel materials with peripheral band edge energy valleys, which is the norm. At least in experimental device fabricated via layer exfoliation, crystallographic alignment between the channel layers had been challenging to achieve. However, among the authors, we recently achieved a breakthrough in this respect allowing very precise control over rotational alignment. Alternatively, the use of the direct gap channel material such as ReS2 should substantially remove this concern with respect to resonant broadening. However, we also demonstrate using density functional theory that rotational misalignment of the tunnel dielectric with the channel material can greatly reduce the overall amplitude of the interlayer tunneling current by, specifically, reducing the coupling across the channel-to-dielectric interfaces (vs. by band structure misalignment) even with rotational alignment between the channel layers. Toward eventual nanoscale devices, we show that Heisenberg position-momentum uncertainty translated to energy uncertainty via the carrier group velocity, dE/d( ħk), will lead to resonance broadening, and the more so for fast carrier. Another concern is intrinsic spectral broadening of the crystal momentum states by scattering. Nevertheless, if fabrication issues could be overcome, we show that low-voltage operation of nanoscale devices should be possible. However, the negative differential resistance (NDR)-current-voltage (I-V) characteristics of these devices make use in conventional circuits challenging. The use of clocked power supplies allows basic logic gates such as inverters, buffers, and NAND and NOR gates to be created. It also results in each gate effectively being a latch, but also effectively having an activity factor of unity for each clock cycle, which requires new approaches to higher level circuit design. We show that for certain applications such as ultra-deep pipelining and ultra-compact circuits, and perhaps non-conventional computing schemes, resonant ITFET circuits could provide advantages over CMOS. (This work is supported by the Nanoelectronics Research Initiative (NRI) through the Southwest Academy of Nanotechnology (SWAN)).

Chemical vapor deposition (CVD) of two-dimensional (2D) hexagonal boron nitride (h-BN) is at the center of numerous studies for its applications in novel electronic devices. However, a clear understanding of the growth mechanism is lacking for its wider industrial adoption on technologically relevant substrates such as SiO2. Here, we demonstrate a controllable growth method of thin, wafer scale h-BN films on arbitrary substrates. We also clarify the growth mechanism to be diffusion and surface segregation (D-SS) of boron (B) and nitrogen (N) in Ni and Co thin films on SiO2/Si substrates after exposure to diborane and ammonia precursors at high temperature. The segregation was found to be independent of the cooling rates employed in this report, and to our knowledge has not been found nor reported for 2D h-BN growth so far, and thus provides an important direction for controlled growth of h-BN. This unique segregation behavior is a result of a combined effect of high diffusivity, small film thickness and the inability to achieve extremely high cooling rates in CVD systems. The resulting D-SS h-BN films exhibit excellent electrical insulating behavior with an optical bandgap of about 5.8?eV. Moreover, graphene-on-h-BN field effect transistors using the as-grown D-SS h-BN films show a mobility of about 6000?cm2 V?1 s?1 at room temperature.

We demonstrate gate-tunable resonant tunneling and negative differential resistance in the interlayer current-voltage characteristics of rotationally aligned double bilayer graphene heterostructures separated by hexagonal boron-nitride (hBN) dielectric. An analysis of the heterostructure band alignment using individual layer densities, along with experimentally determined layer chemical potentials indicates that the resonance occurs when the energy bands of the two bilayer graphene are aligned. We discuss the tunneling resistance dependence on the interlayer hBN thickness, as well as the resonance width dependence on mobility and rotational alignment., Comment: 26 pages, 6 figures; supporting information includes one figure

We report the fabrication and device characteristics of exfoliated, few-layer, ReSe2 field effect transistors (FET) and a method to improve contact resistance by up to three orders of magnitude using ultra-high-vacuum annealing (UHV). Many devices were studied in the absence of light and we found an average contact of 750 Ω · cm after UHV treatment. The median FET metrics were similar to other transition metal dichalcogenides: field effect mobility ∼6.7 cm2/V · s, subthreshold swing ∼1.2 V/decade, and Ion/Ioff ∼ 105. In devices with low Rc current saturation was observed and is attributed to injection limited transport.

We report a method of fabricating self-aligned, top-gated graphene field-effect transistors (GFETs) employing polyethyleneimine spin-on-doped source/drain access regions, resulting in a 2X reduction of access resistance and a 2.5X improvement in device electrical characteristics, over undoped devices. The GFETs on Si/SiO$_2$ substrates have high carrier mobilities of up to 6,300 cm$^2$/Vs. Self-aligned spin-on-doping is applicable to GFETs on arbitrary substrates, as demonstrated by a 3X enhancement in performance for GFETs on insulating quartz substrates, which are better suited for radio frequency applications., 5 pages, 5 figures

Core-shell ${\text{Ge-Si}}_{x}$${\text{Ge}}_{1\ensuremath{-}x}$ nanowires (NWs) are expected to contain large strain fields due to the lattice mismatch at the core-shell interface. Here we report the measurement of core strain in a NW heterostructure using Raman spectroscopy. We compare the Raman spectra, and the frequency of the Ge-Ge mode measured in individual ${\text{Ge-Si}}_{0.5}$${\text{Ge}}_{0.5}$ core-shells, and bare Ge NWs. We find that the Ge-Ge mode frequency is diameter independent in Ge NWs with a value similar to that of bulk Ge, 300.5 ${\text{cm}}^{\ensuremath{-}1}$. On the other hand, ${\text{Ge-Si}}_{0.5}$${\text{Ge}}_{0.5}$ core-shell nanowires reveal a strain-induced blue shift of the Ge-Ge mode, dependent on the relative core and shell thicknesses. Using lattice dynamical theory we determine the strain in the Ge core and show that the results are in good agreement with values calculated using a continuum elasticity model.

The exceptional electronic properties of graphene field-effect transistors (GFETs) make them a promising replacement for conventional Si CMOS transistors for high frequency analog applications. Radio frequency GFETs with intrinsic cut-off frequencies as high as 300GHz have been reported [1], with theoretically predicted THz frequencies only being limited by fabrication challenges. A major factor responsible for degradation of GFET performance is high series resistance of the access regions between the source/drain contacts and the top-gated graphene channel, which reduces maximum possible drive currents. A back-gate bias can be used to modulate this resistance, but this approach does not provide for independent control of multiple GFETs on the same substrate and for GFETs on insulating substrates. GFETs with self-aligned gates overcome this problem by reducing the access region resistance, but their fabrication is not straightforward [1, 2]. Here, we propose a simple scheme of improving GFET performance by reducing the source/drain access resistance using self-aligned charge-transfer doping. A novel and controllable way of “spin-on-doping” of the access regions with chemical dopants is demonstrated.

We demonstrate the synthesis of large-area graphene on Co, a complementary metal-oxide-semiconductor (CMOS)-compatible metal, using acetylene (C(2)H(2)) as a precursor in a chemical vapor deposition (CVD)-based method. Cobalt films were deposited on SiO(2)/Si, and the influence of Co film thickness on monolayer graphene growth was studied, based on the solubility of C in Co. The surface area coverage of monolayer graphene was observed to increase with decreasing Co film thickness. A thorough Raman spectroscopic analysis reveals that graphene films, grown on an optimized Co film thickness, are principally composed of monolayer graphene. Transport properties of monolayer graphene films were investigated by fabrication of back-gated graphene field-effect transistors (GFETs), which exhibited high hole and electron mobility of ∼1600 cm(2)/V s and ∼1000 cm(2)/V s, respectively, and a low trap density of ∼1.2 × 10(11) cm(-2).

Graphene has emerged recently as an attractive channel material for high frequency analog device applications. High carrier mobility and large gate capacitance are both desirable attributes for such devices. A main obstacle however in depositing thin dielectrics on graphene, with high dielectric constant is its chemical inertness. This obstacle can be overcome by either directly depositing the dielectric, e.g. using sputtering or e-beam evaporation, or by using a seed layer which provides nucleation sites for atomic layer deposition (ALD). The interfacial layer however reduces the gate capacitance and can also impact the quality of the ALD dielectric subsequently grown. Here we provide a systematic study of gate capacitance scaling of graphene field effect transistors with Al 2 O 3 gate dielectric with two seed layers, oxidized aluminum and oxidized titanium. Our results show the oxidized Ti film on graphene provides a smooth surface, which allows us to use a Ti nucleation layer as thin as 6A, and achieve uniform coverage required for the subsequent ALD. The k-value of the ALD Al 2 O 3 grown on graphene using oxidized Ti as nucleation layer is 12.7, a value 2.5 times larger than the ALD Al 2 O 3 grown using oxidized Al. We demonstrate graphene devices with ultra-thin top gate dielectrics, with EOT values as low as 3.5 nm.

There has been great interest in methods for the synthesis of high-quality, large-area graphene films, as required for practical applications in the electronics industry. In particular, recent developments in chemical vapor deposition (CVD) methods have shown a promising approach to grow large-area graphene on metal substrates by catalyzed CVD growth [1]. Reports of CVD growth on Cu and Ni are common [1–3]; however, there have been few efforts to grow graphene on Co [4], and attempts to grow graphene on Co/SiO 2 /Si resulted in very small domains of predominantly multilayer graphene that were not suitable for transistor fabrication. Unlike Ni, Co is attractive due to the low lattice mismatch (< 2%) between graphene and the Co (0001) surface, and Co exhibits greater compatibility with Si than Cu, which is a deep trap in Si and a fast diffuser. Here we have demonstrated graphene field-effect transistors (GFETs) fabricated using large-area monolayer graphene grown by catalyzed CVD on Co films.

We investigate poly(methyl methacrylate) (PMMA) as a low thermal budget organic gate dielectric for graphene field effect-transistors (GFETs) based on a simple process flow. We show that high temperature baking steps above the glass transition temperature (∼130 °C) can leave a self-assembled, thin PMMA film on graphene, where we get a gate dielectric almost for “free” without additional atomic layer deposition type steps. Electrical characterization of GFETs with PMMA as a gate dielectric yields a dielectric constant of k = 3.0. GFETs with thinner PMMA dielectrics have a lower dielectric constant due to decreased polarization arising from neutralization of dipoles and charged carriers as baking temperatures increase. The leakage through PMMA gate dielectric increases with decreasing dielectric thickness and increasing electric field. Unlike conventional high-k gate dielectrics, such low-k organic gate dielectrics are potentially attractive for devices such as the proposed Bilayer pseudoSpin Field-Effect Transistor or flexible high speed graphene electronics.

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We investigate the scaling of Al2O3 dielectric on graphene by atomic layer deposition (ALD) using ultra-thin, oxidized Ti and Al films as nucleation layers. We show that the nucleation layer significantly impacts the dielectric constant (k) and morphology of the ALD Al2O3, yielding k = 5.5 and k = 12.7 for Al and Ti nucleation layers, respectively. Transmission electron microscopy shows that Al2O3 grown using the Ti interface is partially crystalline, while Al2O3 grown on Al is amorphous. Using a spatially uniform 0.6 nm-thick Ti nucleation layer, we demonstrate graphene field-effect transistors with top dielectric stacks as thin as 2.6 nm.

Controlling the morphology of inorganic nanocrystals is important because many of their electronic attributes are highly sensitive to shape and aspect ratio. FePt nanocrystals have potential as advanced magnetic materials for ultrahigh-density memory. This is due to their high shape and/or magnetocrystalline anisotropy, which allows bits as small as 3 nm to be thermally stable over typical data storage periods of 10 years. Herein, nanocrystals were simply fabricated by simultaneous reduction of platinum acetylacetonate and thermal decomposition of iron pentacarbonyl in properly chosen conditions of solvent/surfactant proportions and temperature for rational design of their shape and magnetic properties. This work has combined magnetometry measurements and micromagnetic simulations to illustrate the role of the external shape on the rotation of the magnetization vector for colloidal assemblies.