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Our objective is to provide awareness about psychotic vulnerability in patients infected with SARS-CoV-2 and to better understand the role of steroid withdrawal in manic episodes, especially with its common usage in respiratory disease caused by SARS-CoV-2.We present the case of a patient who was hospitalized twice after discontinuing steroid therapy for SARS-CoV-2 infection and presented with a manic episode despite not having a psychiatric history.The patient tested positive on a polymerase chain reaction test for SARS-CoV-2 and developed pneumonia. Other organic differential diagnoses such as encephalitis were also investigated and excluded. Manic episodes were diagnosed according to DSM-V criteria. Subsequently, the patient was diagnosed with type I bipolar disorder.According to the protocols, supplemental oxygen therapy, prophylactic enoxaparin and intravenous (IV) steroids were administered. Steroid dosage was gradually reduced under supervision. During the acute mania, antipsychotics and benzodiazepines were administered.After discharge, the patient was admitted to the psychiatric consultation service. He first received mood stabilizer therapy and then received supportive psychotherapy.Psychotic symptoms commonly occur after the discontinuation of high-dose steroid therapy; however, controlled tapering may prevent these side effects. Only a few cases have reported concomitant SARS-CoV-2 infection and manic episodes, often with an apparent relationship with steroid withdrawal syndrome. In this case, we considered psychotic vulnerability a condition that is often underestimated. In consideration of the SARS-CoV-2 pandemic, the case may represent an underlying trigger for psychotic decompensation, which, in concert with neuroinflammation, may induce a manic episode.

The popularity of fourth generation (4G) cellular communication technology, and the concurrent predominance of second (2G) and third generation (3G) systems have made multi-standard wireless transceivers a necessity. This paper describes the system level planning, the architectural design, and the VLSI implementation of a reconfigurable discrete-time $\Delta \Sigma $ ADC for a multi-standard 2G/3G/4G wireless receiver. We present an optimized switched-capacitor loop filter implementation that maximizes the achievable sampling rate by deploying an early regeneration of the quantizer. Reconfigurability is mainly realized at the architectural level by adapting the oversampling ratio and the quantizer resolution, depending on the mode, to achieve the required dynamic range. Implemented in a 130 nm CMOS technology, and occupying an area of 0.31 ${\hbox {mm}}^{2}$ , the modulator runs at a maximum sampling rate of 450 MHz. The ADC achieves 87 dB and 63 dB DR in a 100 kHz and 25 MHz bandwidth, respectively. The effective resolution ranges from 13.2 bit to 9.7 bit at a scalable power consumption between 3.4 mW and 56.7 mW from a single 1.2 V supply. An open loop reference buffer is embedded on-chip to generate the required reference voltage levels (without the need for external components) making the modulator suitable for fully integrated cellular transceivers.

article i nfo Introduction: Although long-term video-EEG monitoring (LVEM) is routinely used to investigate paroxysmal events, short-term video-EEG monitoring (SVEM) lasting b24 h is increasingly recognized as a cost-effective tool. Since, however, relatively few studies addressed the yield of SVEM among different diagnostic groups, we undertook the present study to investigate this aspect. Methods: We retrospectively analyzed 226 consecutive SVEM recordings over 6 years. All patients were referred because routine EEGs were inconclusive. Patients were classified into 3 suspected diagnostic groups: (1) group with epileptic seizures, (2) group with psychogenic nonepileptic seizures (PNESs), and (3) group with other or undetermined diagnoses. We assessed recording lengths, interictal epileptiform discharges, epileptic seizures, PNESs, and the definitive diagnoses obtained after SVEM. Results: The mean age was 34 (±18.7) years, and the median recording length was 18.6 h. Among the 226 patients, 127 referred for suspected epilepsy — 73 had a diagnosis of epilepsy, none had a diagnosis of PNESs, and 54 had other or undetermined diagnoses post-SVEM. Of the 24 patients with pre-SVEM suspected PNESs, 1 had epilepsy, 12 had PNESs, and 11 had other or undetermined diagnoses. Of the 75 patients with other diag- noses pre-SVEM, 17 had epilepsy, 11 had PNESs, and 47 had other or undetermined diagnoses. After SVEM, 15 patients had definite diagnoses other than epilepsy or PNESs, while in 96 patients, diagnosis remained unclear. Overall, a definitive diagnosis could be reached in 129/226 (57%) patients. Conclusions: This study demonstrates that in nearly 3/5 patients without a definitive diagnosis after routine EEG, SVEM allowed us to reach a diagnosis. This procedure should be encouraged in this setting, given its time- effectiveness compared with LVEM.

Magnetic Resonance Imaging (MRI) is a widely used medical imaging technique. It employs a strong static magnetic field (1.5 to 10.5T for human imaging) to split the spin states of the 1H nuclei in the body, and RF excitation to induce transitions and coherence among them. Gradient fields are superimposed to modulate the 1H resonance frequency, which enables spatially distinguishable signals to be picked up by RF receive coils. A high-field MRI provides better sensitivity and resolution but requires better receivers (RX), as signal DR and 1H resonance increase (128MHz for 3T, 300MHz for 7T). Overall sensitivity and imaging speed can be enhanced by closely surrounding the target anatomy with tens of RX coils (as in MIMO) [1], at the expense of as many shielded RF cables to carry the information out of the field. Progress in PCB size has allowed multi-channel RX to be placed inside the magnetic field (in-bore), reducing the RF cable length to less than 1m [2,3]. Ultimately, the RX should be placed directly on-coil to avoid bulky coaxial cables and improve patient comfort and safety by acquiring data in-bore and sending them digitally to the MRI scanner via an optical fiber link. The latter is cheap, flexible and insensitive to magnetic fields. The immediate vicinity of the coils and the patient is, however, a hostile as well as sensitive electromagnetic environment, which tolerates only the smallest of PCBs and virtually no magnetic material in its components. Integration of the full RX chain in a CMOS chip, which is small, non-magnetic and low power, holds the key to the next wave of compact MRI coil arrays for advanced medical imaging. This paper presents a fully integrated dual-receiver RFIC for coil arrays intended for (ultra-) high field (1.5 to 10.5T and 64 to 450MHz) scanners for clinical MRI, where requirements are considerably stricter than previously reported transceiver ICs [4,5] on palm-held NMR devices for spectroscopy or lab-on-chip applications.

A 4 Mb embedded phase change memory macro has been developed in a 90 nm 6-ML CMOS technology. The storage element has been integrated using 3 additional masks with respect to process baseline. The cell selector is implemented by a standard LV nMOS device, achieving a cell size of 0.29 μm2. A dual-voltage row decoder and a double-path column decoder are introduced, enabling a completely low voltage read operation. A 20b-parallelism write scheme is embedded in the digital controller in order to maximize throughput. In alternative, a power-saving low-parallelism write algorithm can be employed. The macro features a 1.2 V 12 ns read access time and a write throughput of 1 MB/s. Set and reset current distributions showing a good read window are presented and robust reliability results are demonstrated.

This work aims at estimating and comparing the power limits of ΔΣ and charge-redistribution successive-approximation register (CR-SAR) analog-to-digital converters (ADCs), in order to identify which topology is the most power-efficient for a target resolution. A power consumption model for mismatch-limited SAR ADCs and for discrete-time (DT) ΔΣ modulators is presented and validated against experimental data. SAR ADCs are found to be the best choice for low-to-medium resolutions, up to roughly 80 dB of dynamic range (DR). At high resolutions, on the other hand, ΔΣ modulators become more power-efficient. This is due to the intrinsic robustness of the ΔΣ modulation principle against circuit imperfections and non-idealities. Furthermore, a comparison of the area occupation of such topologies reveals that, at high resolutions and for a given dynamic range, ΔΣ ADCs result more area-efficient as well. © 2015 IEEE.

Spectral activity detection in wideband radio-frequency (RF) signals for cognitive-radio applications typically necessitates expensive and energy-inefficient analog-to-digital converters (ADCs). In this paper, we present a novel compressive sensing (CS)-based analog front-end, which is able to sample sparse wideband RF signals at low cost and low power. The analog front-end consists of a pseudo-random non-uniform clock generator unit offering the possibility to configure the (average) undersampling factor at run-time, and a low-cost, wideband 1.9GS/s 4bit flash ADC. The spectral information acquired at sub-Nyquist rates can be recovered off-line via a novel sparse signal dequantization algorithm. The developed analog front-end is implemented in 28nm CMOS, and enables the recovery of spectrally sparse RF signals up to 3.8GHz by means of CS, which corresponds to a Nyquist-equivalent sampling rate of 7.6GS/s. The ADC and pseudo-random clock generator together occupy less than 0.1mm2, and consume an estimated 4.1mW to 5.4mW for undersampling factors between 4 and 11.5.

A 90 nm 4 Mb embedded phase-change memory (PCM) is presented, demonstrating the feasibility of PCM integration with 3 masks overhead in a 6-ML standard CMOS process. Using a low-voltage NMOS transistor as a cell selector leads to a 0.29 ?m2 cell size. A 1.2 V low-voltage read operation achieves a 12 ns access time. The 3 mm2 macro features a random write throughput of 1 MB/s and a mode to increase write throughput to 4 MB/s.

A flexible program circuit for chalcogenide non-volatile memories was developed within a 4Mb ePCM (embedded phase change memory) implemented in 90 nm CMOS technology. The proposed architecture ensures adaptability with respect to process variations and is fully compatible with a single pulse approach or a multiple pulse algorithm for multi-level operation. In the former a write throughput of 2 MB/s is achieved.