227 results on '"Loan, Sajad A."'
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2. A Charge Plasma Based Dual Buried Gates Power MOSFET with Improved Figure of Merits
3. Design and analysis of 4-bit low-power, high-performance current steering DAC implemented using CNT-GDI logic
4. Performance Analysis of AlGaN MOSHEMT Based Biosensors for Detection of Proteins
5. Performance Analysis of GaN/AlGaN/AlN/GaN MIS-MODFETs with High-κ as Gate Dielectric Insulator Layer
6. CNTFET based comparators: design, simulation and comparative analysis
7. CNTFET based 4-bit thermometer current steering digital to analog converter: design and analysis
8. Germanium pocket based tunnel FET with underlap: design and simulation
9. Pocketed dual metal gate TFET: Design and simulation
10. Drain-Engineered Reconfigurable Transistor Exhibiting Complementary Operation
11. A Uni-gate vertical power MOSFET with improved figure of Merits: Design and analysis
12. A Charge Balanced Vertical Power MOSFET with Record High Balliga’s Figure of Merit: Design and Investigation
13. A FinBOX Based Ge FinEHBTFET: Design and Investigation
14. Germanium Source Metal Drain Tunnel FET with Dual Dielectric Underlap
15. Leakage mitigation in NW FET using negative Schottky junction drain and its process variation analysis
16. Metal Drain Double-Gate Tunnel Field Effect Transistor with Underlap: Design and Simulation
17. Metal Strip Implanted Tunneling Field-Effect Transistor Biosensor as a Label-Free Biosensor.
18. A Charge Plasma Based Dual Buried Gates Power MOSFET With Improved Figure of Merits
19. Charge Plasma Based Dual Buried Gates Power MOSFET: Design and Analysis
20. Drain-engineered vertically stacked junctionless FET exhibiting complementary operation
21. Design and Simulation of Dual-Metal-Gate Tunnel Field Effect Transistor with Biomolecule Sensing Applications.
22. Design and analysis of 4-bit low-power, high-performance Current Steering DAC implemented using CNT-GDI logic
23. Polarization engineered enhancement mode GaN HEMT: Design and investigation
24. A normally OFF GaN CAVET and its thermal and trap analysis
25. CNTFET based Single Ended Fractional Order Colpitts Oscillator: Design, Simulation and Comparative Analysis
26. A novel nanoscaled Schottky barrier based transmission gate and its digital circuit applications
27. Simulation Study of a Novel High Performance Oxide Engineered Schottky Collector Bipolar Transistor
28. Charge Plasma Based Bipolar Junction Transistor on Silicon on Insulator
29. Carbon Nanotube Based Operational Transconductance Amplifier: A Simulation Study
30. Ambipolar leakage suppression in electron–hole bilayer TFET: investigation and analysis
31. Design and simulation of a doping-less charge plasma based enhancement mode GaN MOSFET
32. Design of a novel high performance Schottky barrier based compact transmission gate
33. A novel double gate metal source/drain Schottky MOSFET as an inverter
34. Design and Simulation of High Performance Carbon Nanotube Based Three Stage Operational Amplifiers
35. Design and simulation of oxide and doping engineered lateral bipolar junction transistors for high power applications
36. Design of Error Tolerant Subtractor using Truncation Approximation Technique
37. Novel carbon nanotube field effect transistor based dual output second‐generation current conveyor: Design and applications
38. High Performance Hybrid Conduction Enhancement Mode High Electron Mobility Transistors
39. CNTFET based 2-bit Unary weighted Current Steering Digital to Analog Converter using Cascode Current Mirror Technique
40. Performance evaluation of electrical properties of GaN MOS-HEMTs based biosensors for rapid detection of viruses
41. A Novel High performance D-latch using Gate Engineered Schottky device
42. Implementation of CNFET based Negative Gain Digitally Programmable Current Conveyor
43. Germanium pocket based tunnel FET with underlap: design and simulation
44. Investigation of Switching and Figure of Merits in New Charge Balanced n-Vertical Trench Epilayer p⁺ -Shield Super Junction Accumulation Mode MOSFET
45. Investigation of a Multizone Drift Doping Based Lateral Bipolar Transistor on Buried Oxide Thick Step
46. Investigation of the Electrical Characteristics of AlGaN/AlN/GaN Heterostructure MOS-HEMTs with TiO2 High-k Gate Insulator.
47. New n-Vertical Trench Epilayer P+ -Shield Accumulation Mode MOSFET with Enhanced Switching and FOMs
48. A high performance gate engineered charge plasma based tunnel field effect transistor
49. Reliability and sensitivity analysis of double inverted-T nano-cavity label-free Si:HfO2 ferroelectric junctionless TFET biosensors
50. Design and Simulation of Carbon Nanotube Based Current Source Load Differential Amplifier
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