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InAs pyramids and platelets on a zinc-blende InAs substrate are found to exhibit a wurtzite crystal structure. induced by wurtzite InAs nanowires, wurtzite InAs thin film and its associated zinc-blende/wurtzite heterocrystalline heterostructures may open up new opportunities in band-gap engineering and related device applications.

In this paper, we report on the development of a vertical wrap-gated field-effect transistor based on epitaxially grown InAs nanowires. We discuss some of the important steps involved in the growth and processing, such as nanowire position control, in situ doping, high- kappa dielectric deposition, spacer layer formation, and metal wrap-gate fabrication. In particular, we compare a few alternative methods for deposition of materials onto vertical structures and discuss their potential advantages and limitations. Finally, we also present a comparison of transistor performance for nanowires grown using two different epitaxial techniques.

We present results on the effect of seed particle reconfiguration on the growth of short InAs and InP nanowire segments. The reconfiguration originates in two different steady state alloy compositions of the Au/In seed particle during growth of InAs and InP. From compositional analysis of the seed particle, the In content in the seed particle is determined to be 34 and 44% during InAs and InP growth, respectively. When switching between growing InAs and InP, transient effects dominate during the time period of seed particle reconfiguration. We developed a model that quantitatively explains the effect and with the added understanding we are now able to grow short period (

Quantitative structural information about epitaxial arrays of nanowires are reported for a InAs/InP longitudinal heterostructure grown by chemical beam epitaxy on an InAs (111)B substrate. Grazing incidence X-ray diffraction allows the separation of the nanowire contribution from the substrate overgrowth and gives averaged information about crystallographic phases, epitaxial relationships (with orientation distribution), and strain. In-plane strain inhomogeneities, intrinsic to the nanowires geometry, are measured and compared to atomistic simulations. Small-angle X-ray scattering evidences the hexagonal symmetry of the nanowire cross-section and provides a rough estimate of size fluctuations.

In this paper, we report on a novel approach to measure shear stress between elastic nanowires and a SiO2 surface. The method is based on the fact that the curvature of an elastically deformed nano ...

Metal-oxide-semiconductor (MOS) capacitors are formed on bulk InAs substrates by atomic-layer deposition (ALD) of HfO"2. Prior to film growth, InAs substrates receive a wet-chemical treatment of HCl, buffered HF (BHF), or (NH"4)"2S. Hafnium dioxide films are grown using 75 ALD cycles with substrate temperatures of 100, 200, and 300^oC. Substrate temperature is found to have a significant influence on the current-voltage (I-V) and capacitance-voltage (C-V) characteristics of the capacitors, while the influence of substrate pretreatment manifests itself in interface trap density, D"i"t, as measured by the Terman method.

We present results on the effects of inserting a heterostructure barrier along the channel of vertical wrapped insulator-gate field-effect transistors (WIGFETs). Two sets of devices were fabricated, one InAs WIGFET and one with a 50-nm-long InAs0.8P0.2 segment in the channel. This addition of P induces a barrier in the conduction band of 130 mV, measured from the Fermi-level. The barrier blocks the diffusion current through the channel and reduces the feedback gating of holes created from band-to-band tunneling, resulting in improvements in on/off current ratio, and subthreshold characteristics. The heterosegment also induces a shift in the threshold voltage and provides an additional parameter for threshold voltage control in nanowire III-V MOSFETs.

The thermal conductivity of wurtzite and zinc blende indium arsenide nanowires was measured using a microfabricated device, with the crystal structure of each sample controlled during growth and determined by transmission electron microscopy. Nanowires of both phases showed a reduction of the thermal conductivity by a factor of 2 or more compared to values reported for zinc blende indium arsenide bulk crystals within the measured temperature range. Theoretical models were developed to analyze the measurement results and determine the effect of phase on phonon transport. Branch-specific phonon dispersion data within the discretized first Brillouin zone were calculated from first principles and used in numerical models of volumetric heat capacity and thermal conductivity. The combined results of the experimental and theoretical studies suggest that wurtzite indium arsenide possesses similar volumetric heat capacity, weighted average group velocity, weighted average phonon-phonon scattering mean free path, and anharmonic scattering-limited thermal conductivity as the zinc blende phase. Hence, we attribute the differing thermal conductivity values observed in the indium arsenide nanowires of different phases to differences in the surface scattering mean free paths between the nanowire samples.

In the highly competitive R&D-field aimed at extensions or replacements of standard transistors and integrated circuits, two primary approaches are envisioned: either as modifications to today's technology (e.g. via development of high-k dielectrics), or as the development of more radically approaches on the device and integration level. One of these non-disruptive technologies involves the use of vertical transistors in the form of monolithically grown, one-dimensional III–V transistor channels, with a coaxial configuration of a metal-insulator-semiconductor field-effect transistor (MISFET) implementation. This geometry and material choice promises a competitive new technology that may extend the scaling roadmap. The main benefits are the ideal terms of electrostatics, as well as down-scaling offered in the coaxial configuration and the possibility of increasing the drive current and enhancing device performance with the addition of designed heterostructures as part of the transistor technology. In this chapter, the state-of-the-art vertical wrap-gate nanowire-based transistor is described, and this family of transistors as wrapped-insulator-gate field-effect transistors (abbreviated as WIGFET) is outlined. Keywords: nanowires; InAs; wrap gate; field-effect transistor (FET); epitaxy; heterostructure

The electrical and structural properties of 111B-oriented InAs nanowires grown using metal-organic precursors have been studied. On the basis of electrical measurements it was found that the trends in carbon incorporation are similar to those observed in the layer growth, where an increased As/In precursor ratio and growth temperature result in a decrease in carbon-related impurities. Our results also show that the effect of non-intentional carbon doping is weaker in InAs nanowires compared to bulk, which may be explained by lower carbon incorporation in the nanowire core. We determine that differences in crystal quality, here quantified as the stacking fault density, are not the primary cause for variations in resistivity of the material studied. The effects of some n-dopant precursors (S, Se, Si, Sn) on InAs nanowire morphology, crystal structure and resistivity were also investigated. All precursors result in n-doped nanowires, but high precursor flows of Si and Sn also lead to enhanced radial overgrowth. Use of the Se precursor increases the stacking fault density in wurtzite nanowires, ultimately at high flows leading to a zinc blende crystal structure with strong overgrowth and very low resistivity.

We investigate the Au-assisted growth of InAs nanowires on two different kinds of heterostructured substrates: GaAs/AlGaAs structures capped by a 50 nm thick InAs layer grown by molecular beam epitaxy and a 2 μm thick InAs buffer layer on Si(111) obtained by vapor phase epitaxy. Morphological and structural properties of substrates and nanowires are analyzed by atomic force and transmission electron microscopy. Our results indicate a promising direction for the integration of III-V nanostructures on Si-based electronics as well as for the development of novel micromechanical structures incorporating nanowires as their active elements.

A study was conducted to perform friction measurements of InAs nanowires (NW) on silicon nitride (Si 3N 4) through atomic force microscopy (AFM) manipulation. The investigations revealed the friction force per unit length for sliding and static friction over a range of nanowire diameters. It was found that there is a significant difference between the coefficients of the two sliding modes for large wires. It was also found that the difference between the two sliding modes disappears at smaller diameters and the sliding friction becomes equal with the static friction. The AFM investigations were performed on a Nanoscope IIIa Dimension 3100, using rectangular cantilevers, with a nominal spring constant of 30 N m -1. The nanowires were manipulated, using the 'Retrace Lift' mode of the AFM controller. The friction force per unit length was gathered from the local curvature of the NWs, using standard elasticity theory.

We have succeeded in direct atomic scale imaging of the exterior surfaces of III−V nanowires by scanning tunneling microscopy (STM). By using atomic hydrogen, we expose the crystalline surfaces of InAs nanowires with regular InP segments in vacuum while retaining the wire morphology. We show images with atomic resolution of the two major types of InAs wurtzite nanowire surface facets and scanning tunneling spectroscopy (STS) data. Ab initio calculations of the lowest energy surface structures and simulated STM images, agree very well with experiments.

Nanowire heterostructures define high-quality few-electron quantum dots for nanoelectronics, spintronics, and quantum information processing. We use a cooled scanning probe microscope (SPM) to image and control an InAs quantum dot in an InAs/InP nanowire using the tip as a movable gate. Images of dot conductance vs tip position at T=4.2 K show concentric rings as electrons are added, starting with the first electron. The SPM can locate a dot along a nanowire and individually tune its charge, abilities that will be very useful for the control of coupled nanowire dots.

We investigate electrical properties of self-assembled branched InAs nanowires. The branched nanowires are catalytically grown using chemical beam epitaxy, and three-terminal nanoelectronic devices are fabricated from the branched nanowires using electron-beam lithography. We demonstrate that, in difference from conventional macroscopic junctions, the fabricated self-assembled nanowire junction devices exhibit tunable nonlinear electrical characteristics and a signature of ballistic electron transport. As an example of applications, we demonstrate that the self-assembled three-terminal nanowire junctions can be used to implement the functions of frequency mixing, multiplication, and phase-difference detection of input electrical signals at room temperature. Our results suggest a wide range of potential applications of branched semiconductor nanostructures in nanoelectronics.

In this work, the first investigation of Au/Ti/HfO2/InAs metal-oxide-semiconductor capacitors is reported. The HfO2 is deposited by atomic layer deposition and characterized by current-voltage and capacitance-voltage measurements. The effects of surface treatment, deposition temperature, post-deposition anneal, and film thickness on breakdown field, leakage current, capacitance, and frequency dispersion are studied with the aim of producing HfO2-InAs interfaces suitable for use in InAs-channel MOSFETs.

We have grown Au seeded InAs nanowires using chemical beam epitaxy and report on the growth rate dependence on nanowire diameter. We find a maximum of the growth rate at a nanowire diameter of 25 nm, below which the growth rate decreases due to the Gibbs-Thomson effect. Above the maximum, the growth rate decreases with increasing diameter due to the effect of material diffusion to the growth point. A unified model, which accounts for both the Gibbs-Thomson effect and material diffusion, is presented and successfully compared to the experiments. From the comparison, we extract the diffusion length on the substrate surface and a critical diameter, below which nanowire growth ceases, and show that these physical parameters can be tuned by controlling the supersaturation. (Less)

We report on fabrication of double quantum dots in catalytically grown InAs/InP nanowire heterostructures. In the few-electron regime, starting with both dots empty, our low-temperature transport measurements reveal a clear shell structure for sequential charging of the larger of the two dots with up to 12 electrons. The resonant current through the double dot is found to depend on the orbital coupling between states of different radial symmetry. The charging energies are well described by a capacitance model if next-neighbor capacitances are taken into account.

Strained nanowires with varying InAs/InP core-shell thicknesses were grown using Chemical Beam Epitaxy. Microphotoluminescence spectroscopy, performed at low temperature, was then used to study the optical properties of single wires. Emission from the InAs core was observed and its dependence on the shell thickness/core diameter ratio was investigated. We found that it is possible to tune the emission energy towards 0.8 eV by controlling this ratio. We have compared the measured energies with calculated energies. Our findings are consistent with the wires having a hexagonal crystal structure., 9 pages, 5 figures, Proceedings of the Eighth International Conference on Atomically Controlled Surfaces, Interfaces and Nanostructures and the Thirteenth International Congress on Thin Films - ACSIN-8/ICTF-13

We report tunneling spectroscopy measurements of the Zeeman spin splitting in InAs few-electron quantum dots. The dots are formed between two InP barriers in InAs nanowires with a wurtzite crystal structure grown by chemical beam epitaxy. The values of the electron g-factors of the first few electrons entering the dot are found to strongly depend on dot size and range from close to the InAs bulk value in large dots |g^*|=13 down to |g^*|=2.3 for the smallest dots. These findings are discussed in view of a simple model., Comment: 4 pages, 3 figures

We have investigated friction between InAs nanowires and three different substrates: SiO2, fluorosilanized SiO2, and Si3N4. The nanowires were pushed laterally with the tip of an atomic force microscope and the friction force per unit length for both static and sliding friction was deduced from the equilibrium shape of the bent wires. On all three substrates, thick wires showed a difference between sliding and static friction of up to three orders of magnitude. Furthermore, all substrates display a transition to stick-slip motion for nanowires with a diameter of less than about 40 nm. Hydrophobic and hydrophilic substrates display similar friction behavior suggesting that a condensed water layer does not strongly influence our results. The patterns and trends in the friction data are similar for all three substrates, which indicates that they are more fundamental in character and not specific to a single substrate.

Nanowires are important candidates for use in future electronics, photonics and thermoelectrics applications. We focus here in particular on nanowires for use in thermoelectric power generation and present a method of fabricating dense uniform InAs nanowire arrays amenable to future incorporation of advanced heterostructures that could further increase the thermoelectric performance of these nanowires. In these applications it will be important to have the nanowires densely packed in order to give an appreciable amount of power output. Here we present the fabrication of such dense arrays, using metal-particle seeded growth and chemical beam epitaxy, where the metal particles are defined by electron beam lithography, metal evaporation and lift-off. We evaluate the potential of chemical beam epitaxy for the growth of dense, freestanding InAs nanowire arrays and describe the process that enabled us to achieve areal packing densities of up to 19% with a variation of only a few per cent in nanowire diameter and height. We close by discussing how even higher areal packing densities can be achieved.

Wrap-gate (111) InAs nanowires (NWs) were studied after HfO2 dielectric coating and Cr metallic deposition by a combination of grazing incidence x-ray techniques. In-plane and out-of-plane x-ray diffraction (crystal truncation rod analysis) allow determining the strain tensor. The longitudinal contraction, increasing with HfO2 and Cr deposition, is significantly larger than the radial dilatation. For the Cr coating, the contraction along the growth axis is quite large (−0.95%), and the longitudinal/radial deformation ratio is >10, which may play a role on the NW transport properties. Small angle x-ray scattering shows a smoothening of the initial hexagonal bare InAs NW shape and gives the respective core/shell thicknesses, which are compared to flat surface values.

A controlled method of manipulation of nanowires was found using the tip of an Atomic Force Microscope (AFM). Manipulation is done in the ‘Retrace Lift’ mode, where feedback is turned off for the reverse scan and the tip follows a nominal path. The effective manipulation force during the reverse scan can be changed by varying an offset in the height of the tip over the surface. Using this method, we have studied InAs nanowires on different substrates. We have also investigated interactions between wires and with gold features patterned onto the substrates.

Results on fabrication and DC-characterisation of vertical InAs nanowire wrap-gate field-effect transistor arrays with a gate length of 50 nm are presented. Each nanowire array was processed into a transistor with a systematic variation in a number of wires and wire diameter over the sample. Extensive studies have been performed on the influence of wire number and diameter on the transistor characteristics due to a high device yield (84%). In particular it is shown that the threshold voltage depends on the wire diameter, with a change in the order of 5 mV/nm. These results show the possibility of changing the transistor characteristics on the sample by altering the wire dimensions, still using only one patterning and growth sequence.

The authors demonstrate operation of a charge readout scheme for quantum dots in a semiconductor nanowire using a quantum point contact defined in a GaAs∕AlGaAs two-dimensional electron gas beneath the nanowire. The quantum dots were fabricated by epitaxial growth of InP barriers along a n-type InAs nanowire. Applying negative voltages to two split-gate electrodes aligned to the nanowire induces a quantum point contact in the two-dimensional electron gas such that charging of quantum dots in the nanowire modulates the quantum point contact transmission, thus resulting in the desired detector response.

Surface processes play a large role in the growth of semiconductor nanowires by chemical beam epitaxy. In particular, for III-V nanowires the surface diffusion of group-III species is important to understand in order to control the nanowire growth. In this paper, we have grown InAs-based nanowires positioned by electron beam lithography and have investigated the dependence of the diffusion of In species on temperature, group-III and -V source pressure and group-V source combinations by measuring nanowire growth rate for different nanowire spacings. We present a model which relates the nanowire growth rate to the migration length of In species. The model is fitted to the experimental data for different growth conditions, using the migration length as fitting parameter. The results show that the migration length increases with decreasing temperature and increasing group-V/group-III source pressure ratio. This will most often lead to an increase in growth rate, but deviations will occur due to incomplete decomposition and changes in sticking coefficient for group-III species. The results also show that the introduction of phosphorous precursor for growth of InAs1−xPx nanowires decreases the migration length of the In species followed by a decrease in nanowire growth rate. (Less)

The strain distribution in heterostructured wurtzite InAs/InP nanowires is measured by a peak finding technique using high resolution transmission electron microscopy images. We find that nanowires with a diameter of about 20 nm show a 10 nm strained area over the InAs/InP interface and the rest of the wire has a relaxed lattice structure. The lattice parameters and elastic properties for the wurtzite structure of InAs and InP are calculated and a nanowire interface is simulated using finite element calculations. Both the method and the experimental results are validated using a combination of finite element calculations and image simulations.

The authors propose and demonstrate an alternative memory concept in which a storage island is connected to a nanowire containing a stack of nine InAs quantum dots, each separated by thin InP tunnel barriers. Transport through the quantum dot structure is suppressed for a particular biasing window due to misalignment of the energy levels. This leads to hysteresis in the charging/discharging of the storage island. The memory operates for temperatures up to around 150K and has write times down to at least 15ns. A comparison is made to a nanowire memory based on a single, thick InP barrier.