1. A Novel Energy-Efficient Salicide-Enhanced Tunnel Device Technology Based on 300mm Foundry Platform Towards AIoT Applications
- Author
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Wang, Kaifeng, Huang, Qianqian, Wu, Yongqin, Ren, Ye, Wei, Renjie, Wang, Zhixuan, Yang, Libo, Zhang, Fangxing, Geng, Kexing, Li, Yiqing, Yang, Mengxuan, Luo, Jin, Liu, Ying, Zheng, Kai, Kang, Jin, Ye, Le, Zhang, Lining, Bu, Weihai, and Huang, Ru
- Subjects
Condensed Matter - Mesoscale and Nanoscale Physics - Abstract
This work demonstrates a novel energy-efficient tunnel FET (TFET)-CMOS hybrid foundry platform for ultralow-power AIoT applications. By utilizing the proposed monolithic integration process, the novel complementary n and p-type Si TFET technology with dopant segregated source junction and self-aligned drain underlap design is successfully integrated into a 300mm CMOS baseline process without CMOS performance penalty and any new materials, experimentally demonstrating the large Ion and record high Ion/Ioff ratio of 10^7 among TFETs by industry-manufacturers. The device performance and variability are also co-optimized for high-volume production. Further circuit-level implementations are presented based on the calibrated compact model. The proposed TFET-CMOS hybrid logic and SRAM topologies show significant energy efficiency improvement with comparable operation speed compared with standard CMOS circuits, indicating its great potential for power-constraint AIoT applications.
- Published
- 2024