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A reliable and scalable transfer of 2D-TMDCs (two-dimensional transition metal dichalcogenides) from the growth substrate to a target substrate with high reproducibility and yield is a crucial step for device integration. In this work, we have introduced a scalable dry-transfer approach for 2D-TMDCs grown by MOCVD (metal-organic chemical vapor deposition) on sapphire. Transfer to a silicon/silicon dioxide (Si/SiO$_2$) substrate is performed using PMMA (poly(methyl methacrylate)) and TRT (thermal release tape) as sacrificial layer and carrier, respectively. Our proposed method ensures a reproducible peel-off from the growth substrate and better preservation of the 2D-TMDC during PMMA removal in solvent, without compromising its adhesion to the target substrate. A comprehensive comparison between the dry method introduced in this work and a standard wet transfer based on potassium hydroxide (KOH) solution shows improvement in terms of cleanliness and structural integrity for dry-transferred layer, as evidenced by X-ray photoemission and Raman spectroscopy, respectively. Moreover, fabricated field-effect transistors (FETs) demonstrate improvements in subthreshold slope, maximum drain current and device-to-device variability. The dry-transfer method developed in this work enables large-area integration of 2D-TMDC layers into (opto)electronic components with high reproducibility, while better preserving the as-grown properties of the layers., Comment: 29 pages

Metal-halide perovskites (MHPs) have exciting optoelectronic properties and are under investigation for various applications, such as photovoltaics, light-emitting diodes, and lasers. An essential step toward exploiting the full potential of this class of materials is their large-scale, on-chip integration with high-resolution, top-down patterning. The development of such patterning methods for perovskite films is challenging because of their ionic behavior and adverse reactions with the solvents used in standard lithography processes. Here, we introduce a versatile and precise method comprising photolithography and reactive ion etching (RIE) processes that can be tuned to accommodate different perovskite compositions and morphologies, including 3D, quasi-2D, and quasi-0D structures. Our method utilizes conventional photoresists at reduced temperatures to create micron-sized features down to 1 $\mu$m, providing high reproducibility from chip to chip. The patterning technique is validated through atomic force microscopy (AFM), X-ray diffraction (XRD), optical spectroscopy, and scanning electron microscopy (SEM). It enables the scalable and high-throughput on-chip monolithic integration of MHPs., Comment: 30 pages

Graphene is being increasingly used as an interesting transducer membrane in micro- and nanoelectromechanical systems (MEMS and NEMS, respectively) due to its atomical thickness, extremely high carrier mobility, high mechanical strength and piezoresistive electromechanical transductions. NEMS devices based on graphene feature increased sensitivity, reduced size, and new functionalities. In this review, we discuss the merits of graphene as a functional material for MEMS and NEMS, the related properties of graphene, the transduction mechanisms of graphene MEMS and NEMS, typical transfer methods for integrating graphene with MEMS substrates, methods for fabricating suspended graphene, and graphene patterning and electrical contact. Consequently, we provide an overview of devices based on suspended and nonsuspended graphene structures. Finally, we discuss the potential and challenges of applications of graphene in MEMS and NEMS. Owing to its unique features, graphene is a promising material for emerging MEMS, NEMS and sensor applications.

Membrane-based sensors are an important market for microelectromechanical systems (MEMS). Two-dimensional (2D) materials, with their low mass, are excellent candidates for suspended membranes to provide high sensitivity, small footprint sensors. The present work demonstrates pressure sensors employing large-scale-synthesized 2D platinum diselenide (PtSe${_2}$) films as piezoresistive membranes supported only by a thin polymer layer. We investigate three different synthesis methods with contrasting growth parameters and establish a reliable high yield fabrication process for suspended PtSe${_2}$/PMMA membranes across sealed cavities. The pressure sensors reproducibly display sensitivities above 6 x 10${^4}$ kPa${^{-1}}$. We show that the sensitivity clearly depends on the membrane diameter and the piezoresistive gauge factor of the PtSe${_2}$ film. Reducing the total device size by decreasing the number of membranes within a device leads to a significant increase in the area-normalized sensitivity. This allows the manufacturing of pressure sensors with high sensitivity but a much smaller device footprint than the current state-of-the-art MEMS technology. We further integrate PtSe${_2}$ pressure sensors with CMOS technology, improving the technological readiness of PtSe${_2}$-based MEMS and NEMS devices., Comment: 42 pages

Suspended membranes of monoatomic graphene exhibit great potential for applications in electronic and nanoelectromechanical devices. In this work, a "hot and dry" transfer process is demonstrated to address the fabrication and patterning challenges of large-area graphene membranes on top of closed, sealed cavities. Here, "hot" refers to the use of high temperature during transfer, promoting the adhesion. Additionally, "dry" refers to the absence of liquids when graphene and target substrate are brought into contact. The method leads to higher yields of intact suspended monolayer CVD graphene and artificially stacked double-layer CVD graphene membranes than previously reported. The yield evaluation is performed using neural-network-based object detection in SEM images, ascertaining high yields of intact membranes with large statistical accuracy. The suspended membranes are examined by Raman tomography and AFM. The method is verified by applying the suspended graphene devices as piezoresistive pressure sensors. Our technology advances the application of suspended graphene membranes and can be extended to other two-dimensional (2D) materials., Comment: 30 pages of manuscript plus 17 pages of Supporting Information

We report the fabrication and characterization of photonic waveguides from sputtered aluminum nitride (AlN). The AlN films were deposited on 6" silicon substrates with a 3 $\mu$m buried silicon oxide layer using reactive DC magnetron sputtering at a temperature of 700{\deg}C. The resulting uncladded polycrystalline waveguides exhibit propagation losses of 0.137 $\pm$ 0.005 dB/cm at wavelengths of 1310 nm and 0.154 $\pm$ 0.008 dB/cm at a wavelength of 1550 nm in the TE polarization. These results are the best reported for sputtered AlN waveguides in the C-band and the first report in the O-band. These performances are comparable to those of the best-reported AlN waveguides, which are epitaxially grown by metal-organic chemical vapor deposition (MOCVD) on sapphire substrates. Our findings highlight the potential of sputtered AlN for photonic platforms working in the telecom spectrum., Comment: 12 pages

Layered two-dimensional (2D) semiconductors have shown enhanced ion migration capabilities along their van der Waals (vdW) gaps and on their surfaces. This effect can be employed for resistive switching (RS) in devices for emerging memories, selectors, and neuromorphic computing. To date, all lateral molybdenum disulfide (MoS${_2}$)-based volatile RS devices with silver (Ag) ion migration have been demonstrated using exfoliated, single-crystal MoS${_2}$ flakes requiring a forming step to enable RS. Here, we present volatile RS with multilayer MoS${_2}$ grown by metal-organic chemical vapor deposition (MOCVD) with repeatable forming-free operation. The devices show highly reproducible volatile RS with low operating voltages of approximately 2 V and fast switching times down to 130 ns considering their micrometer scale dimensions. We investigate the switching mechanism based on Ag ion surface migration through transmission electron microscopy, electronic transport modeling, and density functional theory. Finally, we develop a physics-based compact model and explore the implementation of our volatile memristors as artificial neurons in neuromorphic systems., Comment: 43 pages

Two-dimensional materials (2DMs) have been widely investigated because of their potential for heterogeneous integration with modern electronics. However, several major challenges remain, such as the deposition of high-quality dielectrics on 2DMs and the tuning of the 2DM doping levels. Here, we report a scalable plasma-enhanced atomic layer deposition (PEALD) process for direct deposition of a nonstoichiometric aluminum oxide (AlOX) dielectric, overcoming the damage issues associated with conventional methods. Furthermore, we control the thickness of the dielectric layer to systematically tune the doping level of 2DMs. The experimental results demonstrate successful deposition without detectable damage, as confirmed by Raman spectroscopy and electrical measurements. Our method enables tuning of the Dirac and threshold voltages of back-gated graphene and MoS${_2}$ field-effect transistors (FETs), respectively, while also increasing the charge carrier mobility in both device types. We further demonstrate the method in top-gated MoS${_2}$ FETs with double-stack dielectric layers (AlOX+Al${_2}$O${_3}$), achieving critical breakdown field strengths of 7 MV/cm and improved mobility compared with the back gate configuration. In summary, we present a PEALD process that offers a scalable and low-damage solution for dielectric deposition on 2DMs, opening new possibilities for precise tuning of device characteristics in heterogeneous electronic circuits., Comment: 28 pages

Cryogenic field-effect transistors (FETs) offer great potential for a wide range of applications, the most notable example being classical control electronics for quantum information processors. In the latter context, on-chip FETs with low power consumption are a crucial requirement. This, in turn, requires operating voltages in the millivolt range, which are only achievable in devices with ultra-steep subthreshold slopes. However, in conventional cryogenic metal-oxide-semiconductor (MOS)FETs based on bulk material, the experimentally achieved inverse subthreshold slopes saturate around a few mV/dec due to disorder and charged defects at the MOS interface. FETs based on two-dimensional materials offer a promising alternative. Here, we show that FETs based on Bernal stacked bilayer graphene encapsulated in hexagonal boron nitride and graphite gates exhibit inverse subthreshold slopes of down to 250 ${\mu}$V/dec at 0.1 K, approaching the Boltzmann limit. This result indicates an effective suppression of band tailing in van-der-Waals heterostructures without bulk interfaces, leading to superior device performance at cryogenic temperature., Comment: 22 pages, 18 figures

Graphene flake-based dispersions are attractive materials for various applications in microelectronics because of their ease of fabrication and the potential to deposit them on diverse substrates. The integration of these materials into conductive networks and microdevices requires thorough knowledge of their mechanical material properties, including adhesion. This paper presents quantitative adhesion measurements of graphene flake networks on silicon dioxide (SiO${_2}$) via button shear testing (BST). In this method, shear forces are applied to prefabricated micrometric buttons until they delaminate, providing information about the shear strength of the underlying graphene. We applied BST to graphene flake networks with different flake structures and defect densities. Flat flakes, a flat network structure, and a high flake defect density improve adhesion. We further demonstrate that graphene flake networks have stronger adhesion than chemical vapor deposited monolayer graphene grown on copper and transferred to SiO${_2}$. Hexamethyldisilazane (HMDS) increases the total adhesion force by improving flake network formation. Finally, we provide flake-type-specific delamination patterns by combining BST, optical microscopy, and Raman spectroscopy. We establish BST as a quantitative technique for measuring the adhesion of graphene dispersions and show the crucial role of interflake junctions in the overall adhesion of graphene flake networks., Comment: 34 pages

A method for assessing the quality of electronic material properties of thin-film metal oxide semiconductor field-effect transistors (MOSFETs) is presented. By investigating samples with MOCVD-grown MoS${_2}$ channels exposed to atmospheric conditions, the existence of electron traps in MoS${_2}$ and at the interface between the gate insulator and the thin-film MoS${_2}$ are revealed. Differential conductance and capacitance data of the transistor channels are plotted as 3D surfaces on a base plane spanned by the measurement frequency versus the gate voltage. The existence of defects is confirmed by comparison with ideal results from a theoretical model., Comment: 24 pages

The fields of machine learning and artificial intelligence drive researchers to explore energy-efficient, brain-inspired new hardware. Reservoir computing encompasses recurrent neural networks for sequential data processing and matches the performance of other recurrent networks with less training and lower costs. However, traditional software-based neural networks suffer from high energy consumption due to computational demands and massive data transfer needs. Photonic reservoir computing overcomes this challenge with energy-efficient neuromorphic photonic integrated circuits or NeuroPICs. Here, we introduce a reservoir NeuroPIC used for modulation format identification in C-band telecommunication network monitoring. It is built on a silicon-on-insulator platform with a 4-port reservoir architecture consisting of a set of physical nodes connected via delay lines. We comprehensively describe the NeuroPIC design and fabrication, experimentally demonstrate its performance, and compare it with simulations. The NeuroPIC incorporates non-linearity through a simple digital readout and achieves close to 100% accuracy in identifying several configurations of quadrature amplitude modulation formats transmitted over 20 km of optical fiber at 32 GBaud symbol rate. The NeuroPIC performance is robust against fabrication imperfections like waveguide propagation loss, phase randomization, etc. and delay line length variations. Furthermore, the experimental results exceeded numerical simulations, which we attribute to enhanced signal interference in the experimental NeuroPIC output. Our energy-efficient photonic approach has the potential for high-speed temporal data processing in a variety of applications., Comment: 32 pages, including supporting information

Plasmonic refractive index sensors are essential for detecting subtle variations in the ambient environment through surface plasmon interactions. Current efforts utilizing CMOS-compatible, plasmo-photonic Mach-Zehnder interferometers with active power balancing exhibit high sensitivities at the cost of fabrication and measurement complexity. Alternatively, passive bimodal plasmonic interferometers based on SU-8 waveguides present a cost-effective solution with a smaller device footprint, though they currently lack opto-mechanical isolation due to exposed photonic waveguides. In this work, we introduce innovative polymer-core and polymer-cladded bimodal plasmonic refractive index sensors with high refractive index contrast. Our sensors feature an aluminum stripe, a bilayer SU-8 photonic waveguide core, and the experimental optical cladding polymer SX AR LWL 2.0. They achieve a sensitivity of (6300 $\pm$ 460) nm/RIU (refractive index unit), surpassing both traditional and polymer-based plasmo-photonic sensors. This approach enables integrated, wafer-scale, CMOS-compatible, and low-cost sensors and facilitates plasmonic refractive index sensing platforms for various applications., Comment: 30 pages

The clock speed of electronic circuits has been stagnant at a few gigahertz for almost two decades because of the breakdown of Dennard scaling, which states that by shrinking the size of transistors they can operate faster while maintaining the same power consumption. Optical computing could overcome this roadblock, but the lack of materials with suitably strong nonlinear interactions needed to realize all-optical switches has, so far, precluded the fabrication of scalable architectures. Recently, microcavities in the strong light-matter interaction regime enabled all-optical transistors which, when used with an embedded organic material, can operate even at room temperature with sub-picosecond switching times, down to the single-photon level. However, the vertical cavity geometry prevents complex circuits with on-chip coupled transistors. Here, by leveraging silicon photonics technology, we show exciton-polariton condensation at ambient conditions in micrometer-sized, fully integrated high-index contrast grating microcavities filled with an optically active polymer. By coupling two resonators and exploiting seeded polariton condensation, we demonstrate ultrafast all-optical transistor action and cascadability. Our experimental findings open the way for scalable, compact all-optical integrated logic circuits that could process optical signals two orders of magnitude faster than their electrical counterparts.

Graphene has been extensively studied for a variety of electronic and optoelectronic applications. The reported contact resistance between metal and graphene, or rather its specific contact resistance (R{_C}), ranges from a few tens of {\Omega} {\mu}m up to a few k{\Omega} {\mu}m. Manufacturable solutions for defining ohmic contacts to graphene remain a subject of research. Here, we report a scalable method based on laser irradiation of graphene to reduce the R{_C} in nickel-contacted devices. A laser with a wavelength of {\lambda} = 532 nm is used to induce defects at the contact regions, which are monitored \textit{in-situ} using micro-Raman spectroscopy. Physical damage is observed using \textit{ex-situ} atomic force and scanning electron microscopy. The transfer line method (TLM) is used to extract R{_C} from back-gated graphene devices with and without laser treatment under ambient and vacuum conditions. A significant reduction in R{_C} is observed in devices where the contacts are laser irradiated, which scales with the laser power. The lowest R{_C} of about 250 {\Omega} {\mu}m is obtained for the devices irradiated with a laser power of 20 mW, compared to 900 {\Omega} {\mu}m for the untreated devices. The reduction is attributed to an increase in defect density, which leads to the formation of crystallite edges and in-plane dangling bonds that enhance the injection of charge carriers from the metal into the graphene. Our work suggests laser irradiation as a scalable technology for R{_C} reduction in graphene and potentially other two-dimensional materials., Comment: 30 pages

Dispersion-based graphene materials are promising candidates for various sensing applications. They offer the advantage of relatively simple and fast deposition via spin-coating, Langmuir-Blodgett deposition, or inkjet printing. Film uniformity and reproducibility remain challenging in all of these deposition methods. Here, we demonstrate, characterize, and successfully apply a scalable structuring method for graphene dispersions. The method is based on a standard lift-off process, is simple to implement, and increases the film uniformity of graphene devices. It is also compatible with standard semiconductor manufacturing methods. We investigate two different graphene dispersions via Raman spectroscopy and Atomic Force Microscopy and observe no degradation of the material properties by the structuring process. Furthermore, we achieve high uniformity of the structured patterns and homogeneous graphene flake distribution. Electrical characterizations show reproducible sheet resistance values correlating with material quantity and uniformity. Finally, repeatable humidity sensing is demonstrated with van der Pauw devices, with sensing limits of less than 1% relative humidity., Comment: 35 pages

Two-dimensional (2D) materials are popular candidates for emerging nanoscale devices, including memristors. Resistive switching (RS) in such 2D material memristors has been attributed to the formation and dissolution of conductive filaments created by the diffusion of metal ions between the electrodes. However, the area-scalable fabrication of patterned devices involves polymers that are difficult to remove from the 2D material interfaces without damage. Remaining polymer residues are often overlooked when interpreting the RS characteristics of 2D material memristors. Here, we demonstrate that the parasitic residues themselves can be the origin of RS. We emphasize the necessity to fabricate appropriate reference structures and employ atomic-scale material characterization techniques to properly evaluate the potential of 2D materials as the switching layer in vertical memristors. Our polymer-residue-based memristors exhibit RS typical for a filamentary mechanism with metal ion migration, and their performance parameters are strikingly similar to commonly reported 2D material memristors. This reveals that the exclusive consideration of electrical data without a thorough verification of material interfaces can easily lead to misinterpretations about the potential of 2D materials for memristor applications., Comment: 30 pages

Graphene is a promising material for applications as a channel in graphene field-effect transistors (GFETs) which may be used as a building block for optoelectronics, high-frequency devices and sensors. However, these devices require gate insulators which ideally should form atomically flat interfaces with graphene and at the same time contain small densities of traps to maintain high device stability. Previously used amorphous oxides, such as SiO2 and Al2O3, however, typically suffer from oxide dangling bonds at the interface, high surface roughness and numerous border oxide traps. In order to address these challenges, here we use for the first time 2nm thick epitaxial CaF2 as a gate insulator in GFETs. By analyzing device-to-device variability for over 200 devices fabricated in two batches, we find that tens of them show similar gate transfer characteristics. Our statistical analysis of the hysteresis up to 175C has revealed that while an ambient-sensitive counterclockwise hysteresis can be present in some devices, the dominant mechanism is thermally activated charge trapping by border defects in CaF2 which results in the conventional clockwise hysteresis. We demonstrate that both the hysteresis and bias-temperature instabilities in our GFETs with CaF2 are comparable to similar devices with SiO2 and Al2O3. In particular, we achieve a small hysteresis below 0.01 V for equivalent oxide thickness (EOT) of about 1 nm at the electric fields up to 15 MV/cm and sweep times in the kilosecond range. Thus, our results demonstrate that crystalline CaF2 is a promising insulator for highly-stable GFETs.

Two-dimensional (2D) materials are considered for numerous applications in microelectronics, although several challenges remain when integrating them into functional devices. Weak adhesion is one of them, caused by their chemical inertness. Quantifying the adhesion of 2D materials on three-dimensional surfaces is, therefore, an essential step toward reliable 2D device integration. To this end, button shear testing is proposed and demonstrated as a method for evaluating the adhesion of 2D materials with the examples of graphene and hexagonal boron nitride (hBN), molybdenum disulfide, and tungsten diselenide on silicon dioxide (SiO${_2}$) and silicon nitride substrates. We propose a fabrication process flow for polymer buttons on the 2D materials and establish suitable button dimensions and testing shear speeds. We show with our quantitative data that low substrate roughness and oxygen plasma treatments on the substrates before 2D material transfer result in higher shear strengths. Thermal annealing increases the adhesion of hBN on SiO${_2}$ and correlates with the thermal interface resistance between these materials. This establishes button shear testing as a reliable and repeatable method for quantifying adhesion of 2D materials., Comment: 51 pages

Cost-efficient and easily integrable broadband mid-infrared (mid-IR) sources would significantly enhance the application space of photonic integrated circuits (PICs). Thermal incandescent sources are superior to other common mid-IR emitters based on semiconductor materials in terms of PIC compatibility, manufacturing costs, and bandwidth. Ideal thermal emitters would radiate directly into the desired modes of the PIC waveguides via near-field coupling and would be stable at very high temperatures. Graphene is a semi-metallic two-dimensional material with comparable emissivity to thin metallic thermal emitters. It allows maximum coupling into waveguides by placing it directly into their evanescent fields. Here, we demonstrate graphene mid-IR emitters integrated with photonic waveguides that couple directly into the fundamental mode of silicon waveguides designed for a wavelength of 4,2 {\mu}m relevant for CO${_2}$ sensing. High broadband emission intensity is observed at the waveguide-integrated graphene emitter. The emission at the output grating couplers confirms successful coupling into the waveguide mode. Thermal simulations predict emitter temperatures up to 1000{\deg}C, where the blackbody radiation covers the mid-IR region. A coupling efficiency {\eta}, defined as the light emitted into the waveguide divided by the total emission, of up to 68% is estimated, superior to data published for other waveguide-integrated emitters., Comment: 24 pages

Intensive research is carried out on two-dimensional materials, in particular molybdenum disulfide, towards high-performance transistors for integrated circuits. Fabricating transistors with ohmic contacts is challenging due to the high Schottky barrier that severely limits the transistors' performance. Graphene-based heterostructures can be used in addition or as a substitute for unsuitable metals. We present lateral heterostructure transistors made of scalable chemical vapor-deposited molybdenum disulfide and chemical vapor-deposited graphene with low contact resistances of about 9 k${\Omega}$${\mu}$m and high on/off current ratios of 10${^8}$. We also present a theoretical model calibrated on our experiments showing further potential for scaling transistors and contact areas into the few nanometers range and the possibility of a strong performance enhancement by means of layer optimizations that would make transistors promising for use in future logic circuits., Comment: 39 pages

A 200 mm processing platform for the large-scale production of graphene field-effect transistor-quantum dot (GFET-QD) hybrid photodetectors is demonstrated. Comprehensive statistical analysis of electric data shows a high yield (96%) and low variation of the 200 mm scale fabrication. The GFET-QD devices deliver responsivities of 10${^5}$ - 10${^6}$ V/W in a wavelength range from 400 to 1800 nm, at up to 100 frames per second. Spectral sensitivity compares well to that obtained using similar GFET-QD photodetectors. The device concept enables gate-tunable suppression or enhancement of the photovoltage, which may be exploited for electric shutter operation by toggling between the signal capture and shutter states. The devices show good stability at a wide operation range and external quantum efficiency of 20% in the short-wavelength infrared range. Furthermore, an integration solution with complementary metal-oxide-semiconductor technology is presented to realize image-sensor-array chips and a proof-of-concept image system. This work demonstrates the potential for the volume manufacture of infrared photodetectors for a wide range of imaging applications., Comment: 29 pages

The two-dimensional (2D) insulating material hexagonal boron nitride (h BN) has attracted much attention as the active medium in memristive devices due to its favorable physical properties, among others, a wide bandgap that enables a large switching window. Metal filament formation is frequently suggested for h-BN devices as the resistive switching (RS) mechanism, usually supported by highly specialized methods like conductive atomic force microscopy (C-AFM) or transmission electron microscopy (TEM). Here, we investigate the switching of multilayer hexagonal boron nitride (h-BN) threshold memristors with two nickel (Ni) electrodes through their current conduction mechanisms. Both the high and the low resistance states are analyzed through temperature-dependent current-voltage measurements. We propose the formation and retraction of nickel filaments along boron defects in the h-BN film as the resistive switching mechanism. We corroborate our electrical data with TEM analyses to establish temperature-dependent current-voltage measurements as a valuable tool for the analysis of resistive switching phenomena in memristors made of 2D materials. Our memristors exhibit a wide and tunable current operation range and low stand-by currents, in line with the state of the art in h-BN-based threshold switches, a low cycle-to-cycle variability of 5%, and a large On/Off ratio of 10${^7}$., Comment: 39 pages

Titanium dioxide (TiO$_2$) thin films are commonly used as photocatalytic materials. Here, we enhance the photocatalytic activity of devices based on TiO$_2$ by combining nanostructured glass substrates with metallic plasmonic nanostructures. We achieve a three-fold increase of the catalyst's surface area through nanoscale three-dimensional patterning of periodic conical grids, which creates a broadband optical absorber. The addition of aluminum and gold activates the structures plasmonically and improves the optical absorption in the TiO$_2$ films to above 70% in the visible and NIR spectral range. We demonstrate the resulting enhancement of the photocatalytic activity with organic dye degradation tests under different light sources. Furthermore, the pharmaceutical drug Carbamazepine, a common water pollutant, is reduced in aqueous solution by up to 48% in 360 minutes. Our approach is scalable and potentially enables future solar-driven wastewater treatment., Comment: 36 pages

We report on electronic transport in dual-gate, artificially stacked bilayer graphene field effect transistors (BiGFETs) fabricated from large-area chemical vapor deposited (CVD) graphene. The devices show enhanced tendency to current saturation, which leads to reduced minimum output conductance values. This results in improved intrinsic voltage gain of the devices when compared to monolayer graphene FETs. We employ a physics based compact model originally developed for Bernal stacked bilayer graphene FETs (BSBGFETs) to explore the observed phenomenon. The improvement in current saturation may be attributed to increased charge carrier density in the channel and thus reduced saturation velocity due to carrier-carrier scattering.

A chip to wafer scale, CMOS compatible method of graphene device fabrication has been established, which can be integrated into the back end of the line (BEOL) of conventional semiconductor process flows. In this paper, we present experimental results of graphene field effect transistors (GFETs) which were fabricated using this wafer scalable method. The carrier mobilities in these transistors reach up to several hundred cm$^2$V$^{-1}$s$^{-1}$. Further, these devices exhibit current saturation regions similar to graphene devices fabricated using mechanical exfoliation. The overall performance of the GFETs can not yet compete with record values reported for devices based on mechanically exfoliated material. Nevertheless, this large scale approach is an important step towards reliability and variability studies as well as optimization of device aspects such as electrical contacts and dielectric interfaces with statistically relevant numbers of devices. It is also an important milestone towards introducing graphene into wafer scale process lines.

In this study, the contact resistance of various metals to chemical vapour deposited (CVD) monolayer graphene is investigated. Transfer length method (TLM) structures with varying widths and separation between contacts have been fabricated and electrically characterized in ambient air and vacuum condition. Electrical contacts are made with five metals: gold, nickel, nickel/gold, palladium and platinum/gold. The lowest value of 92 {\Omega}{\mu}m is observed for the contact resistance between graphene and gold, extracted from back-gated devices at an applied back-gate bias of -40 V. Measurements carried out under vacuum show larger contact resistance values when compared with measurements carried out in ambient conditions. Post processing annealing at 450{\deg}C for 1 hour in argon-95% / hydrogen-5% atmosphere results in lowering the contact resistance value which is attributed to the enhancement of the adhesion between metal and graphene. The results presented in this work provide an overview for potential contact engineering for high performance graphene-based electronic devices.

Laser resonators have outputs with Gaussian spatial beam profiles. In laser interference lithography (LIL), using such Gaussian shaped beams leads to an inhomogeneous exposure of the substrate. As a result, dimensions of lithography defined features vary significantly across the substrate. In most LIL setups, pinholes are used as filters to remove optical noise. Following a concept proposed by Hariharan et. al. a phase mask can be added to these pinholes. In theory, this modification results in a more uniform beam profile, and, if applied as spatial filters in LIL, in improved exposure and hence feature size uniformity. Here, we report on the first successful fabrication of such elements and demonstrate their use in an LIL setup to reduce feature dimension variations from 47.2% to 27.5% using standard and modified pinholes, respectively.

Graphene is an attractive material for communications in the THz range due to its ability to support surface plasmon polaritons. This enables a graphene antenna to be smaller in size than its metallic counterpart. In addition, the possibility to control the graphene conductivity during operation by an applied bias leads to the tunability of the resonant frequency of graphene antennas. Graphene-based antennas integrated into transceivers working at THz frequencies may lead to faster and more efficient devices. In this work, we design and simulate a graphene patch antenna that can be integrated into transceivers by through-substrate vias. The tuning of the resonant frequency is also studied by simulations., Comment: Published in: 2022 47th International Conference on Infrared, Millimeter and Terahertz Waves (IRMMW-THz)

Graphene is a promising candidate for future electronic applications. Manufacturing graphene-based electronic devices typically requires graphene transfer from its growth substrate to another desired substrate. This key step for device integration must be applicable at the wafer level and meet the stringent requirements of semiconductor fabrication lines. In this work, wet and semidry transfer (i.e. wafer bonding) are evaluated regarding wafer scalability, handling, potential for automation, yield, contamination and electrical performance. A wafer scale tool was developed to transfer graphene from 150 mm copper foils to 200 mm silicon wafers with-out adhesive intermediate polymers. The transferred graphene coverage ranged from 97.9% to 99.2% for wet transfer and from 17.2% to 90.8% for semidry transfer, with average cop-per contaminations of 4.7x10$^{13}$ (wet) and 8.2x10$^{12}$ atoms/cm$^2$ (semidry). The corresponding electrical sheet resistance extracted from terahertz time-domain spectroscopy varied from 450 to 550 ${\Omega}/sq$ for wet transfer and from 1000 to 1650 ${\Omega}/sq$ for semidry transfer. Although wet transfer is superior in terms of yield, carbon contamination level and electrical quality, wafer bonding yields lower copper contamination levels and provides scalability due to existing in-dustrial tools and processes. Our conclusions can be generalized to all two-dimensional (2D) materials.

The deposition of dielectric materials on graphene is one of the bottlenecks for unlocking the potential of graphene in electronic applications. In this paper we demonstrate the plasma enhanced atomic layer deposition of 10 nm thin high quality Al$_2$O$_3$ on graphene using a monolayer of hBN as protection layer. Raman spectroscopy was performed to analyze possible structural changes of the graphene lattice caused by the plasma deposition. The results show that a monolayer of hBN in combination with an optimized deposition process can effectively protect graphene from damage, while significant damage was observed without an hBN layer. Electrical characterization of double gated graphene field effect devices confirms that the graphene did not degrade during the plasma deposition of Al$_2$O$_3$. The leakage current densities were consistently below 1 nA/mm for electric fields across the insulators of up to 8 MV/cm, with irreversible breakdown happening above. Such breakdown electric fields are typical for Al$_2$O$_3$ and can be seen as an indicator for high quality dielectric films.

Particle contamination of extreme ultraviolet (EUV) photomasks is one of the numerous challenges in nanoscale semiconductor fabrication, since it can lead to systematic device failures when disturbed patterns are projected repeatedly onto wafers during EUV exposure. Understanding adhesion of particle contamination is key in devising a strategy for cleaning of photomasks. In this work, particle contamination is treated as a particle-plane problem in which surface roughness and the interacting materials have major influences. For this purpose, we perform vacuum atomic force microscopy (AFM) contact measurements to quantify the van der Waals (vdW) forces between tip and sample. We introduce this as a vacuum AFM-based methodology that combines numerical Hamaker theory and Blind Tip Reconstruction (BTR). We have determined the Hamaker constants of $15x10^{-20} J$ and $13x10^{-20} J$ for the material systems of a silicon (Si) tip with both aluminum oxide ($Al_{2}O_{3}$) and native silicon dioxide ($SiO_{2}$) on Si substrates, respectively. Our methodology allows an alternative, quick and low-cost approach to characterize the Hamaker constant within the right order of magnitude for any material combination.