121 results on '"Lee, Tzung-Je"'
Search Results
2. High efficiency active rectifier with low-power self-biased comparator for low-frequency piezoelectric vibration energy harvesting of AUV
3. A 16-nm FinFET 28.8-mW 800-MHz 8-Bit All-N-Transistor Logic Carry Look-Ahead Adder
4. A 2xVDD digital output buffer with gate driving stability and non-overlapping signaling control for slew-rate auto-adjustment using 16-nm FinFET CMOS process
5. An adaptive constant current and voltage mode P&O-based Maximum Power Point Tracking controller IC using 0.5-[formula omitted] HV CMOS
6. A metastable RNG using interleaved NAND- and NOR-based TEROs
7. Single-Inductor Dual Outputs Buck-Boost Converter with Dual Switches
8. 2×VDD 500 MHz Digital Output Buffer with Optimal Driver Transistor Sizing for Slew Rate Self-adjustment and Leakage Reduction Using 28-nm CMOS Process
9. A 1-6.5 Gbps Dual-Loop Cdr Design with Coarse-Fine Tuning Vco and Modified Dqfd
10. A 2.6-GHz I/O Buffer for DDR4 & DDR5 SDRAMs in 16-nm FinFET CMOS Process
11. High Bandwidth Efficiency FPGA-based Underwater Acoustic Transceiver with Adaptive-SFDR DDFS
12. 10-bit 250-KS/s M-2M Digital-to-Analog Converter with 4-4-2 Segmentation for Sonar System
13. High-Sensitivity PTAT Current Generator Using PTAT and CTAT Current Subtraction Method for Temperature Sensor With Frequency Output
14. On-Chip Current-Mode Communication Circuits for Stackable Li-ion Battery Management System Using 0.18μm BCD HV Process
15. Single-Inductor Dual Outputs Buck-Boost Converter with Dual Switches
16. 500 MHz 90 nm CMOS 2 × VDD Digital Output Buffer Immunity to Process and Voltage Variations
17. Real-time IR Image Processing Interface on FPGA with Histogram Equalization and Non-Uniform Correction
18. ±3 A Bidirectional Current Sensor for 57.6 V Li-ion Battery Management System of AUV
19. A High Dynamic-Range Readout Circuit with Differential Resistance-to-Time Conversion for Gas Sensor
20. 3.2 Gbps Output Driver With Dual Low Voltage Modes and Low Power PVT Compensation Circuit
21. 91.282% Efficiency SIDO Buck-Buck Converter with Separate Positive and Negative Output Voltage in 40 nm CMOS Process
22. A 2.71 fJ/conversion-step 10-bit 50 MSPS split-capacitor array SAR ADC for FOG systems.
23. PVT-independent dB-linear reconfigured local-feedback digital variable gain amplifier
24. VCT Protection IC for Li-Ion Battery
25. A ±3.07% frequency variation clock generator implemented using HV CMOS process
26. A 16-nm FinFET 28.8-mW 800-MHz 8-Bit All-N-Transistor Logic Carry Look-Ahead Adder
27. Delay-Time-Compensated Peak Detector for Medium-Frequency Band
28. Wide Dynamic Range Temperature Sensor Using High Sensitivity PTAT Current Generator
29. Fast-Transient LDO Regulator with RC-less Low-Impedance Buffer and PVT Compensation
30. A 2.71 fJ/conversion-step 10-bit 50 MSPS split-capacitor array SAR ADC for FOG systems
31. Wide Lock-in Range CDR with Modified DQFD and Coarse-fine Tuning Technique
32. On-chip Wide Range Bidirectional Current Sensor for Li-ion Battery Management System
33. An adaptive constant current and voltage mode P&O-based Maximum Power Point Tracking controller IC using 0.5-μm HV CMOS
34. A 20 GHz 8-bit All-N-Transistor Logic CLA Using 16-nm FinFET Technology
35. A 2.5-GHz 2×VDD 16-nm FinFET Digital Output Buffer with Slew Rate and Duty Cycle Self-Adjustment
36. 9.9 V ASK Demodulator Using Differential Shaper for High-Impedance Electrode
37. 12 V PZE Harvesting Circuit For AUV Using Boost Converter with Resistor Matching Controller
38. A 10-bit 50-MS/s SAR ADC with Split-Capacitor Array Using Unity-Gain Amplifiers Applied in FOG Systems
39. A 570-kbps ASK demodulator without external capacitors for low-frequency wireless bio-implants
40. High-PSR sync separator for TV signals
41. Wide-range 5.0/3.3/1.8-V I/O buffer using 0.35-[micro]m 3.3-V CMOS technology
42. Voltage-to-frequency converter with high sensitivity using all-MOS voltage window comparator
43. An all-MOS high-linearity voltage-to-frequency converter chip with 520-kHz/V sensitivity
44. 2$$\times $$VDD 500 MHz Digital Output Buffer with Optimal Driver Transistor Sizing for Slew Rate Self-adjustment and Leakage Reduction Using 28-nm CMOS Process
45. A Slew Rate Enhanced 2 x VDD I/O Buffer With Precharge Timing Technique
46. 4.15 W SIDO Buck Converter with Low Cross Regulation Using Adaptive PCCM Control
47. 20V HV Energy Harvesting Circuit with ACC/CV Mode and MPPT Control for a 5 W Solar Panel
48. A PVDF-film Energy Harvesting Circuit Using 40-nm CMOS Process
49. High-sensitivity and high-mobility compact DVB-T receiver for in-car entertainment
50. High-Accuracy Impedance Read-out Circuit for BIA-type Biomedical Sensors.
Catalog
Books, media, physical & digital resources
Discovery Service for Jio Institute Digital Library
For full access to our library's resources, please sign in.