68 results on '"Kyuho Jason Lee"'
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2. 20.6 LSPU: A Fully Integrated Real-Time LiDAR-SLAM SoC with Point-Neural-Network Segmentation and Multi-Level kNN Acceleration.
3. A Real-Time Sparsity-Aware 3D-CNN Processor for Mobile Hand Gesture Recognition.
4. An Energy-Efficient, Unified CNN Accelerator for Real-Time Multi-Object Semantic Segmentation for Autonomous Vehicle.
5. A Ternary Neural Network Computing-in-Memory Processor With 16T1C Bitcell Architecture.
6. An Energy-Efficient Deep Neural Network Accelerator Design.
7. 17.3 A -58dBc-Worst-Fractional-Spur and -234dB-FoMjitter, 5.5GHz Ring-DCO-Based Fractional-N DPLL Using a Time-Invariant-Probability Modulator, Generating a Nonlinearity-Robust DTC-Control Word.
8. The Development of Silicon for AI: Different Design Approaches.
9. An ultra-low-power and mixed-mode event-driven face detection SoC for always-on mobile applications.
10. A Real-Time and Energy-Efficient Embedded System for Intelligent ADAS with RNN-Based Deep Risk Prediction using Stereo Camera.
11. A 590MDE/s semi-global matching processor with lossless data compression.
12. A 9.02mW CNN-stereo-based real-time 3D hand-gesture recognition processor for smart mobile devices.
13. A 82nW chaotic-map true random number generator based on sub-ranging SAR ADC.
14. A 82-nW Chaotic Map True Random Number Generator Based on a Sub-Ranging SAR ADC.
15. A 502-GOPS and 0.984-mW Dual-Mode Intelligent ADAS SoC With Real-Time Semiglobal Matching and Intention Prediction for Smart Automotive Black Box System.
16. A 1.4-m $\Omega$ -Sensitivity 94-dB Dynamic-Range Electrical Impedance Tomography SoC and 48-Channel Hub-SoC for 3-D Lung Ventilation Monitoring System.
17. Intelligent task scheduler with high throughput NoC for real-time mobile object recognition SoC.
18. An energy-efficient parallel multi-core ADAS processor with robust visual attention and workload-prediction DVFS for real-time HD stereo stream.
19. A CMOS Image Sensor-Based Stereo Matching Accelerator With Focal-Plane Sparse Rectification and Analog Census Transform.
20. A 79 pJ/b 80 Mb/s Full-Duplex Transceiver and a 42.5µW 100 kb/s Super-Regenerative Transceiver for Body Channel Communication.
21. A 2.71 nJ/Pixel Gaze-Activated Object Recognition System for Low-Power Mobile Smart Glasses.
22. A keypoint-level parallel pipelined object recognition processor with gaze activation image sensor for mobile smart glasses system.
23. 18.1 A 2.71nJ/pixel 3D-stacked gaze-activated object-recognition system for low-power mobile HMD applications.
24. A Vocabulary Forest Object Matching Processor With 2.07 M-Vector/s Throughput and 13.3 nJ/Vector Per-Vector Energy for Full-HD 60 fps Video Object Recognition.
25. A 1.22 TOPS and 1.52 mW/MHz Augmented Reality Multicore Processor With Neural Network NoC for HMD Applications.
26. A multi-modal and tunable Radial-Basis-Funtion circuit with supply and temperature compensation.
27. A task-level pipelined many-SIMD augmented reality processor with congestion-aware network-on-chip scheduler.
28. An Augmented Reality Processor with a Congestion-Aware Network-on-Chip Scheduler.
29. A multi-granularity parallelism object recognition processor with content-aware fine-grained task scheduling.
30. 14.2 A 502GOPS and 0.984mW dual-mode ADAS SoC with RNN-FIS engine for intention prediction in automotive black-box system.
31. The Development of Silicon for AI: Different Design Approaches
32. A 9.52 ms Latency, and Low-power Streaming Depth-estimation Processor with Shifter-based Pipelined Architecture for Smart Mobile Devices
33. An intelligent ADAS processor with real-time semi-global matching and intention prediction for 720p stereo vision.
34. A Vocabulary Forest-based object matching processor with 2.07M-vec/s throughput and 13.3nJ/vector energy in full-HD resolution.
35. 10.4 A 1.22TOPS and 1.52mW/MHz augmented reality multi-core processor with neural network NoC for HMD applications.
36. Tunnelling-based ternary metal–oxide–semiconductor technology
37. A Low-power, Mixed-mode Neural Network Classifier for Robust Scene Classification
38. A 646GOPS/W multi-classifier many-core processor with cortex-like architecture for super-resolution recognition.
39. Architecture of neural processing unit for deep neural networks
40. An Energy-Efficient Deep Neural Network Accelerator Design
41. 17.3 A −58dBc-Worst-Fractional-Spur and −234dB-FoMjitter, 5.5GHz Ring-DCO-Based Fractional-N DPLL Using a Time-Invariant-Probability Modulator, Generating a Nonlinearity-Robust DTC-Control Word
42. A 1.4-m $\Omega$ -Sensitivity 94-dB Dynamic-Range Electrical Impedance Tomography SoC and 48-Channel Hub-SoC for 3-D Lung Ventilation Monitoring System
43. A 82-nW Chaotic Map True Random Number Generator Based on a Sub-Ranging SAR ADC
44. A 502-GOPS and 0.984-mW Dual-Mode Intelligent ADAS SoC With Real-Time Semiglobal Matching and Intention Prediction for Smart Automotive Black Box System
45. A CMOS Image Sensor-Based Stereo Matching Accelerator With Focal-Plane Sparse Rectification and Analog Census Transform
46. A 2.71 nJ/Pixel Gaze-Activated Object Recognition System for Low-Power Mobile Smart Glasses
47. A 79 pJ/b 80 Mb/s Full-Duplex Transceiver and a 100 kb/s Super-Regenerative Transceiver for Body Channel Communication
48. A 9.02mW CNN-stereo-based real-time 3D hand-gesture recognition processor for smart mobile devices
49. A Vocabulary Forest Object Matching Processor With 2.07 M-Vector/s Throughput and 13.3 nJ/Vector Per-Vector Energy for Full-HD 60 fps Video Object Recognition
50. A 1.22 TOPS and 1.52 mW/MHz Augmented Reality Multicore Processor With Neural Network NoC for HMD Applications
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