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Recently, the number of drones for personal leisure as well as Unmanned Aerial Vehicles (UAVs) for such as military, commercial, agricultural, disaster response is increasing rapidly. When a large number of UAVs fly simultaneously in airspace, collision problems between UAVs can occur, which is likely to lead directly to human accidents or economic loss. Accordingly, there are growing needs for UAS Traffic Management (UTM) systems. In this phenomenon, various communication protocols for UTM are emerging. In this paper, especially, the application of UTM system based on Wireless Access in Vehicular Environment (WAVE) protocol is introduced as one of most efficient and stable protocols in environments with high-speed mobility and dynamic changing topology. Furthermore, we design a network architecture that supports direct communication among UAVs as well as UAV and ground station within the UTM framework. By applying WAVE protocol in the UTM system, it is possible to transmit messages promptly and accurately to prevent collision in the event of an emergency, and to configure the UTM system to manage all UAVs by applying a WAVE-based ad-hoc network.

All of the government, private enterprises, and local governments are promoting the spread of electric vehicles to reduce carbon emissions depending on the green growth policy of the government that began in 2009. Due to this background, the prevalence of electric cars is being spread. However, the efficient management and operation through the exchanging information between electric vehicles and charging infrastructure, as well as the development of electric vehicles are essential to disseminate them. In this paper, we present a service framework for exchange of information between electric vehicles and charging infrastructure, and propose a communication method to meet it. To do this, we propose the most appropriate communication method through the performance evaluation by identifying and comparing the existing wireless communication methods can be applied to exchange information between electronic vehicles and EV charging infrastructure.

A novel compact model for a five-port transformer balun is proposed for the efficient circuit design of hybrid balun. Compared to the conventional model, the proposed model provides much faster computation time and more reasonable values for the extracted parameters. The hybrid balun, realized in 0.18 ㎛ CMOS, achieves 2.8 ㏈ higher gain and 1.9 ㏈ lower noise figure than its passive counterpart only at a current consumption of 0.67 ㎃ from 1.2 V supply. By employing the hybrid balun, a differential zero-IF receiver is designed in 0.18 ㎛ CMOS for IEEE 802.15.4 ZigBee applications. It is composed of a differential cascode LNA, passive mixers, and active RC filters. Comparative investigations on the three receiver designs, each employing the hybrid balun, a simple transformer balun, and an ideal balun, clearly demonstrate the advantages of the hybrid balun in fully differential CMOS RF receivers. The simulated results of the receiver with the hybrid balun show 33 ㏈ of conversion gain, 4.2 ㏈ of noise figure with 20 ㎑ of 1/f noise corner frequency, and -17.5 ㏈m of IIP3 at a current consumption of 5 ㎃ from 1.8 V supply.

This paper presents a time synchronized forwarding protocol for remotely controlling home appliances connected to wireless sensor networks (WSNs) that have extremely large latency for transferring data to another node. The protocol basically uses distributed time division multiple access (TDMA) and provides scalability by a self-organization function based on a virtual sensor line. Time synchronized forwarding and self organization protocols using virtual sensor lines achieve not only low latency but also low power consumption for future consumer applications .

An inductor library for efficient low cost RFIC design has been developed based on a standard digital 0.18 CMOS process. The developed library provides four structural variations that are most popular in RFIC design; standard spiral structure, patterned ground shield(PGS) structure to enhance quality factor, stacked structure to enable high inductance values in a given silicon area, multilayer structure to lower series resistance. Electromagnetic simulation, equivalent circuit, and parameter extraction processes have been verified based on measurement results. The extensive measurement and simulation results of the inductor library can be a great asset for low cost RFIC design and development.

This paper presents a front-end passive circuit module for ZigBee applications using low-temperature co-fired ceramic technology. The front-end part consists of an antenna, a bandpass filter, a switch, and two baluns. In antenna design, the solenoid shape is employed for reducing the size of the antenna, resulting in an overall size of 9times16.4times1.82 mm3 and a gain of -1.4 dBi. As for the filter, two types of filters are suggested. First, the lumped-type filter employing a high-Q spiral inductor has more than 20-dB attenuation at both stopbands, very near to the passband. Secondly, the semilumped-type filter adopting an edge coupled line and a loading capacitor provides a group delay of below 5 ns and is adequate for the full module structure due to the structure flexibility. A balun is evaluated using lumped components instead of a transmission line and, thus, it provides an insertion loss of only 0.3 dB and a phase difference of 180deg between balanced signals. Based on these components, an RF front-end module including attaching pads for an RF integrated circuit (IC) and baseband IC is implemented. In case of using the lumped-type filter, the insertion loss of the front-end module is 6.5 dB, and the group delay is below 7 ns. In case of adopting the semilumped-type filter, the insertion loss is 6.2 dB, and the group delay is below 4 ns. The overall size of the former and latter is 25.14times28.5times0.68 mm3 and 25.66times25.58times1.17 mm3, respectively

A fully CMOS integrated RF transceiver for ubiquitous sensor networks in sub-gigahertz industrial, scientific, and medical (ISM)-band applications is implemented and measured. The integrated circuit is fabricated in 0.18-mum CMOS technology and packaged in leadless plastic chip carrier (LPCC) package. The fully monolithic transceiver consists of a receiver, a transmitter, and an RF synthesizer with on-chip voltage-controlled oscillator. The chip fully complies with the IEEE 802.15.4 wireless personal area network in sub-gigahertz mode. The cascaded noise figure of the overall receiver is 9.5 dB and the overall transmitter achieves less than 6.3% error vector magnitude for 40 kb/s mode. The chip uses 1.8-V power supply and the power consumption is 25 mW for reception mode and 29 mW for transmission mode

In a low dropout (LDO) linear regulator whose reference voltage is supplied by a bandgap reference, double stacked diodes increase the effective junction area ratio in the bandgap reference, which significantly lowers the output spectral noise of the LDO. A low noise LDO with the area-efficient bandgap reference is implemented in 0.18 8 μm CMOS. An effective diode area ratio of 105 is obtained while the actual silicon area is saved by a factor of 4.77. As a result, a remarkably low output noise of 186nV/sqrt(Hz) is achieved at 1 kHz. Moreover, the dropout voltage, line regulation, and load regulation of the LDO are measured to be 0.3 V, 0.04%/V, and 0.46%, respectively.

This paper describes a low-voltage and low-power channel selection analog front end with continuous-time low pass filters and highly linear programmable-gain amplifier(PGA). The filters were realized as balanced Gm-C biquadratic filters to achieve low current consumption. High linearity and constant wide bandwidth are achieved by using a new transconductance(Gm) cell. The POA has a voltage gain varying from 0 to 65 dB, while maintaining a constant bandwidth. A filter tuning circuit that requires an accurate time base but no external components is presented. Both the filter and PGA were implemented in a 0.18um 1P6M n-well CMOS process. They consume 3.2 mW from a 1.8 V power supply and occupy an area of 0.19 mm2.

The wireless sensor network (WSN) node is required to operate for several months with the limited system resource such as memory and power. A general WSN node operates in the active state during less than 1% of the several-month lifetime and waits an event in the inactive state during 99% of the same lifetime. This paper suggests a power adjust dual priority scheduler (PA-DPS) for low-power, which has a structure to meet the requirements for the WSN by estimating power consumption in the WSN node. PA-DPS has been designed based on an event-driven approach and is based on the dual-priority scheduling structure, which has been conventionally suggested in the real-time system field. From experimental results, PA-DPS reduced the inactive mode current up to 40% under the 1% duty cycle.

This paper describes a low-voltage and low-power channel selection analog front end with continuous-time low pass filters and highly linear programmable-gain amplifier (PGA). The filters were realized as balanced Gm-C biquadratic filters to achieve low current consumption. High linearity and constant wide bandwidth are achieved by using a new transconductance (Gm) cell. The PGA has a voltage gain varying from 0 to 65dB, while maintaining a constant bandwidth. A filter tuning circuit that requires an accurate time base but no external components is presented. With a 1-Vrms differential input and output, the filter achieves -85dB THD and a 78dB signal-to-noise ratio. Both the filter and PGA were implemented in a 0.18mum 1P6M n-well CMOS process. They consume 3.2mW from a 1.8V power supply and occupy an area of 0.19mm2

A fully CMOS integrated radio frequency (RF) transceiver for wireless sensor networks in sub-GHz ISM-band applications is implemented and measured. The IC is fabricated in 0.18-mum CMOS technology and packaged in LPCC package. The fully monolithic transceiver consists of a receiver, a transmitter and a RF synthesizer with on-chip VCO. The chip fully complies with the IEEE 802.15.4 WPAN standard in sub-GHz mode. The receiver sensitivity is -98dBm and the transmitter achieves less than 6.3% error vector magnitude (EVM) for 40kbps mode. The chip uses 1.8V power supply and the current consumption is 14mA for reception mode and 16mA for transmission mode

A fully CMOS integrated radio frequency (RF) transceiver for wireless sensor networks in sub-GHz ISM-band applications is implemented and measured. The IC is fabricated in 0.18-mum CMOS technology and packaged in LPCC package. The fully monolithic transceiver consists of a receiver, a transmitter and a RF synthesizer with on-chip VCO. The chip fully complies with the IEEE 802.15.4 WPAN standard in sub-GHz mode. The receiver sensitivity is -98 dBm and the transmitter achieves less than 6.3% error vector magnitude (EVM) for 40 kbps mode. The chip uses 1.8 V power supply and the current consumption is 14 mA for reception mode ad 16 mA for transmission mode

This paper describes a low-voltage and low-power channel selection analog front end with continuous-time low pass filters and highly linear programmable-gain amplifier (PGA). The filters were realized as balanced Gm-C biquadratic filters to achieve a low current consumption. High linearity and a constant wide bandwidth are achieved by using a new transconductance (Gm) cell. The PGA has a voltage gain varying from 0 to 65 dB, while maintaining a constant bandwidth. A filter tuning circuit that requires an accurate time base but no external components is presented. With a 1-Vrms differential input and output, the filter achieves -85 dB THD and a 78 dB signal-to-noise ratio. Both the filter and PGA were implemented in a 0.18 mum 1P6M n-well CMOS process. They consume 3.2 mW from a 1.8 V power supply and occupy an area of 0.19 mm 2

This paper describes the analysis for implementation of a radio frequency (RF) receiver for low-rate wireless personal area networks (LR-WPANs), namely IEEE 802.15.4, for coexistence with various wireless devices in 2.4 GHz ISM-band. With IEEE 802.15.4 standard specification, it provides analysis of receiver performance requirements containing the system noise figure (NF), system third-order intercept point (IIP3 ), local oscillator phase noise and selectivity. With some assumption, it illustrates the relationship between minimum detectable signal (MDS) and various situations considering for the effects of noise generated from other wireless devices according to communication distance. Here, we can infer the necessity of much tighter specification requirements than that of the standard's for various communication field environments

Recently, the advancement of the development technologies for the smart sensor nodes that are small, low-power devices with abilities of environment sensing, data computing and wireless communication facilitates research for the wireless sensor network. Wireless sensor networks (WSN) are networks composed of such sensor nodes that have abilities to monitor and control the physical environment from the remote locations. Such networks make many applications possible in the scientific, medical, commercial, and military domains, for example, surveillance, smart home and offices, environment monitoring, and many others. We present wireless sensor network architecture. It's basic operations, sensor ID assignment scheme and ID creation algorithm, and mobility protocol for the management of the sensor or relay nodes movement. We also suggest a power management scheme of our wireless sensor network architecture.