Search

In this paper, a dielectric pocket-induced double-gate tunnel field-effect transistor is presented for improving the ON state current and suppressing the ambipolar conduction of the device. Introduction of dielectric pocket at the junction of both source and drain helps to tune the tunnelling barrier and subsequently controls the tunnelling current. A physics-based analytical model of surface potential and electric field is deduced by solving 2D Poisson's equation.Tunnelling current is then derived using Kane's model. The performance of this structure is then studied by varying the dielectric material of the pocket at source/drain junctions. Analytical results have been compared with the SILVACO ATLAS simulated results for verification of our model. [ABSTRACT FROM AUTHOR]

This paper presents the 2-D analytical modeling of a front high-K gate stack triple-material gate Schottky Barrier Silicon-On-Nothing MOSFET. Using the two-dimensional Poisson’s equation and considering the popular parabolic potential approximation, expression for surface potential as well as the electric field has been considered. In addition, the response of the proposed device towards aggressive downscaling, that is, its extent of immunity towards the different short-channel effects, has also been considered in this work. The analytical results obtained have been validated using the simulated results obtained using ATLAS, a two-dimensional device simulator from SILVACO. [ABSTRACT FROM AUTHOR]