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The aggressive reduction of the channel length in transistors needs the high doping of the channel region, while the contact area requires doping beyond 1020 cm-3 to ensure low-resistance ohmic contacts. Similar problems apply to wide-band gap semiconductors where the p-type doping is challenging, mainly due to the high activation energy for acceptors, low equilibrium solid solubility and deactivation of acceptors by the formation of acceptor-vacancy clusters. Recently, we have shown that ultra-doped n-type and p-type Ge with a carrier concentration above 1020 cm-3 can be achieved by applying non-equilibrium methods like ion implantation followed by millisecond-range flash-lamp annealing (FLA) [1-3]. The n-type doping of Ge is a self-limiting process due to the formation of vacancy-donor complexes (DnV with n ≤ 4) that deactivates the donors [4]. Based on data density functional theory calculations, at temperature higher than 850 K, the concentration of D4V clusters progressively decreases liberating unbounded vacancies and donor atoms. The same effect is observed for p-type Ge and in III-V semiconductors. Here, we report on experiments and theoretical calculations solving the basic problem of donors and acceptors deactivation in heavily doped semiconductors. The dissolution of donor/acceptor-vacancy clusters in heavily doped semiconductors is achieved by ms-range FLA with a peak temperature close to the melting point of the semiconductor. Positron annihilation lifetime spectroscopy (PALS) reveals that dopant-vacancy clusters are the main defect centers deactivating both acceptors and donors. Millisecond-range high-temperature treatment dissociates the dopant-V clusters and, as shown by SIMS, fully suppresses the dopant diffusion in both group IV semiconductors and III-V compound semiconductors. For the first time, using structural characterization (PALS, SIMS) and electrochemical capacitance-voltage profiling combined with DFT calculations, we were able to address, understand, and solve the fundamental problem hindering the doping of semiconductors above the solid solubility limit.

Harvesting the full potential of single-crystal semiconductor nanowires (NWs) for advanced nanoscale field-effect transistors (FETs) requires a smart combination of charge control architecture and functional semiconductors. In this article, high-performance vertical gate-all-around NW p-type FETs (p-FETs) are presented. The device concept is based on advanced Ge0.92Sn0.08/Ge group IV epitaxial heterostructures, employing quasi–one-dimensional semiconductor NWs fabricated with a top-down approach. The advantage of using a heterostructure is the possibility of electronic band engineering with band offsets tunable by changing the semiconductor stoichiometry and elastic strain. The use of a Ge0.92Sn0.08 layer as the source in GeSn/Ge NW p-FETs results in a small subthreshold slope of 72 mV/dec and a high ION/IOFF ratio of 3 × 106. A ∼32% drive current enhancement is obtained compared to the vertical Ge homojunction NW control devices. More interestingly, the drain-induced barrier lowering is much smaller with GeSn instead of Ge as the source. The general improvement of the transistor’s key figures of merits originates from the valence band offset at the Ge0.92Sn0.08/Ge heterojunction, as well as from a smaller NiGeSn/GeSn contact resistivity.

During the last 1-2 decades semiconductor nanowires (NWs) have received significant academic and commercial attention due to their attractive electrical and mechanical properties and large surface area to volume ratios. They have a variety of possible applications including nanoelectronics, nanophotonics, photovoltaics, sensorics, etc. Among all semiconductor NWs the ones based on group IV materials have the advantage of being the most silicon (Si) compatible. This is very important since their integration into the existing semiconductor technology platform can be relatively easy. We will give a general overview of our activities on group IV nanowires. We will first present the NWs that we are working with, including top-down fabricated Si and germanium (Ge) NWs having widths down to 6-7 nm as well as bottom-up grown alloyed germanium-tin (Ge1-xSnx) NWs with x = 0.07-0.1, diameters of 50-70 nm and lengths of 1 to 3 µm. We are currently working also on the fabrication of alloyed SiGe and SiGeSn NWs with varying content of the different materials. Next, we will discuss the innovative nanoelectronic devices that we are working on, namely junctionless nanowire transistors (JNTs) and reconfigurable field effect transistors (RFETs). In particular, we are fabricating Si JNTs for sensing application as well as Ge and GeSn JNTs for digital logic. Concerning RFETs, we are currently working on Si RFETs and commencing activities on SiGe and GeSn RFETs, which are expected to outperform the Si RFETs. Finally, we will briefly present a novel device concept that we recently invented: a specific group IV heterostructure band-to-band tunnel FET (TFET). The fabrication process of this device is scalable and fully CMOS compatible and should allow the achievement of high on-current Ion together with low off-current Ioff, hence steep subthreshold slope.

The n-type doping of Ge and Ge-based alloys is a self-limiting process due to the formation of vacancy-donor complexes (DnV with n ≤ 4) that deactivate the donors. This work clearly demonstrates that the dissolution of the DnV clusters in a heavily n-doped Ge, GeSn and SiGeSn layers can be achieved by millisecond-flash lamp annealing. This DnV cluster dissolution results in a considerable increase of the electrical activation together with a suppression of donor diffusion. Using electrical measurements and positron annihilation lifetime spectroscopy, combined with theoretical calculations, it is possible to address, understand and solve the fundamental problem of achieving ultra-high doping level in Ge, that has hindered so far the full integration of Ge and Ge-based alloys with complementary-metal-oxide-semiconductor technology.

The n-type doping of Ge is self-limiting process due to formation of the vacancy-donor complexes (Dn V with n≤4). Here we report on experiments and density functional theory (DFT) calculations solving the basic problem of donor deactivation in heavily doped Ge. The self-healing process of heavily doped n-type Ge is achieved by rear-side flash lamp annealing (r-FLA) for 20 ms with the peak temperature of about 1050 K. The positron-annihilation lifetime spectroscopy (PALS) reveals that the P4V clusters are main defects in the as-grown Ge:P samples. Millisecond range high-temperature treatment dissociates the phosphorus-vacancy cluster (P4V) and, as shown by SIMS, fully supress the P diffusion. The electrochemical capacitance-voltage (ECV) profiling shows that the effective carrier concentration in P doped Ge (P concentration - 1×1020 cm-3) increases from about 3×1019 cm-3 in as-grown sample to above 8×1019 cm-3 after r-FLA. For the first time using structural (PALS, SIMS) and electrical (ECV) characterization combined with DFT calculations we were able to addressed, explained and solved the fundamental problem hindering the full integration of Ge with CMOS technology.