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Gwanghwamun Gate of Gyeongbokgung Palace was dismantled and relocated during the Japanese colonial period, destroyed during the Korean War, reconstructed with reinforced concrete in 1968, and finally erected at its present location in 2010. A pair of Haechi statues located in front of Gwanghwamun was dismantled and relocated several times, and the statues have yet to be returned precisely to their original positions. This study assesses the historical accuracy of their current placement under the Gwanghwamun Square Restructuring Project of the Seoul Metropolitan Government and the Cultural Heritage Administration based on archival photos from the early 1900s, and proposes a method to estimate the original positions of the Haechi through image analysis of contemporary photographs and recent digital camera photos. We estimated the original position of the Haechi before the Japanese colonial period by identifying the shooting location of the archival photo and reproducing contemporary photographs by calculating the angle and distance to the Haechi from the shooting location. The leftmost and rightmost Haechi were originally located about 9.6 m to the east and 7.4 m to the north and about 1.9 m to the west and 8.0 m to the north, respectively, of their current location indicators. As the first attempt to determine the original location of a building and its accessories using archival photos, this study launches a new scientific methodology for the restoration of cultural properties.

For advanced application specific devices, combinations of Si/Ge, Ge/Si, Si1-xGex/Si are frequently introduced in the device fabrication process. Epitaxy, condensation and annealing processes are commonly used for controlling the Ge content to a desired level. Strain and crystallinity can be affected by a small variation in composition or Ge content, which can result in device performance deterioration or failure. Thus, the composition, strain and crystallinity must be carefully monitored and controlled throughout the manufacturing process. The electrode formation process is also very critical for successful device fabrication. Any spikes and/or electrically active defects near junctions can be fatal to the device yield. Silicidation processes and resulting silicides must be investigated as much as possible using various non-invasive material characterization techniques. In this study, we report the thermal silicidation characteristics of Ni/Si1-xGex with various Ge content under different annealing temperatures in the range of 225oC ~ 400oC in N2 ambient. Thermal silicidation was performed in a stacked hotplate-based SAO-302LP system designed for 300mm wafers. For resulting silicide characterization, measurements of sheet resistance, Raman spectra, X-ray diffraction curves as well as scanning electron microscopy (SEM) observations were performed. We have studied Ge content and annealing temperature dependence on the resulting electrical and crystallographic silicide characteristics. Figure 1 shows 647nm excited Raman spectra and X-ray diffraction (XRD) curves from reference Si, and resulting silicide from Ni/Si0.75Ge0.25 before and after annealing under at 235oC, 310oC and 400oC. Raman spectra and sheet resistance measurements showed silicide formation and silicide layer thickening with increasing annealing temperature. XRD curves clearly indicated the change of crystalline phase of resulting silicide with annealing temperature increase. Various aspects of thermal silicidation and its characterization will be discussed at the conference. Figure 1

There has been a strong and urgent demand to diagnose community transmission-driven coronavirus disease 2019 (COVID-19) after it crossed borders. A large number of rapid and accurate tests and diagnoses are required at drive-through test stations, community clinics and hospitals. Isothermal amplification technology, such as loop-mediated isothermal amplification (LAMP) and recombinase polymerase amplification (RPA), provides excellent alternatives for resource limited test environments. LAMP has been shown to be comparable with polymerase chain reaction (PCR) and can be performed in less than 30 min by non-laboratory staff without ribonucleic acid (RNA) extractions commonly associated with PCR. LAMP tests on assays with SARS-CoV-2 and other pathogenic microorganisms, such as Dengue, Malaria, and Influenza viruses and Helicobacter pylori show color changes allowing test results to be interpreted by the color change of the assays. However, visual inspection of a large number of assays is prone to human error and manual record keeping makes test result tracking for an epidemiologic investigation very difficult and inefficient. The epidemiologic investigation is an essential part of the fight against community transmission-driven viruses. We have developed a very accurate and reliable, human error free, tablet PC-based portable device for colorimetric determination of assays including SARS-CoV-2 and other pathogenic microorganisms.

Colour is a primary characteristic of visual perception and a very important characteristic to describe cultural heritage works in a variety of shapes, sizes and materials. To quantify colours, portable colorimeters are often carried and used for measuring colour of interest. Spatial resolution of colorimeters is manufacturer and model dependent and typically worse than 3 - 10 mm in diameter. The colour measurement has to be done on site at the time of interest. It poses very significant limitations in colorimetric characterization of cultural heritages. In this paper, the possibility of extraction of colour information from digital photographs, scanned images and video files using customized image processing/analysis software (PicMan) was investigated for cultural heritage characterization applications. As colour information extraction examples, a commercial Gouache paint colour card, a digital photograph, a portrait of a Korean scholar of Joseon Dynasty and a severely deteriorated old medical text book before and after restoration were examined. Colour information from various digital images was successfully extracted from points and regions of interest in RGB, HSV, L*a*b*, Munsell colour and hexadecimal colour code formats. The spatial resolution of colour information extraction is as small as a single pixel in a digital image.

To investigate the effect of implantation temperature on the damage to a Si lattice, room temperature photoluminescence (PL) spectra were measured from highly-channeled MeV 11B+ implanted Si wafers with different implant temperatures (25 °C and 450 °C) after annealing at 950 °C for 3 min in N2. Small pieces from the wafers were used for PL characterization. The implanted Si wafer piece at the elevated temperature resulted in higher overall PL intensity under both excitation wavelengths suggesting lesser lattice damage than the Si wafer implanted at room temperature. Unexpectedly large PL intensity variations were observed from PL area mapping of both wafer pieces. In addition, strange behaviors of localized PL intensity variations, with opposite trends between 670 nm and 827 nm excitation PL measurements were observed near the scribe lines and sample number markings on the backside. The PL intensity was increased under 670 nm excitation while it was decreased under 827 nm excitation. Possible reasons for this strange behavior were discussed based on experimental results and analysis. PL measurement is verified to be very sensitive to the surface condition, interface, bulk and backside conditions of the Si. For reliable PL measurement, backside contamination and scratches, such as scribe lines, should be avoided.

Formation of high integrity junctions with low junction leakage and defects is essential for fabricating high performance devices with advanced node devices. Understanding of implant activation and implant damage recovery mechanisms during annealing process steps is limited. Development of noncontact implant activation and residual damage monitoring techniques would be beneficial.

Thermal silicidation characteristics of Ni/Si1-xGexwith various Ge content was studied under different annealing temperatures in the range of 225 °C ∼ 400 °C in 100% N2ambient. TiN capped Ni/Si1-xGex/Si/SiO2/Si wafers with x values in the range of 0.15 and 0.30 in 0.05 intervals were used. Thermal silicide formation was performed in a stacked hotplate-based annealing system designed for industrial 300 mm wafer fabs. For silicide characterization, measurements of spectral reflectance, sheet resistance, Raman spectra as well as X-ray diffraction curves were performed to investigate changes of optical properties, electrical properties, crystallographic phases during silicide formation. Effects of Ge content and annealing temperature on the electrical and crystallographic properties of the resulting thermal silicides (nickel germanosilicides) were investigated. Reaction mechanisms were discussed based on the characterization results. Multiwavelingth micro-Raman spectroscopy was found to be very promising as a non-contact, in-line silicidation process monitoring technique. For production worthiness verification of the thermal silicidation process, temperature sensitivity curves of sheet resistance, its uniformity and detailed sheet resistance maps were investigated using 8 nm thick Ni films on 300 mm diameter, epitaxial Si0.8Ge0.2/p−-Si wafers without a capping layer. Manufacturability of Ni/Si0.80Ge0.20/Si wafers were also verified using a stacked hotplate-based, nearly isothermal, annealing system.

To meet various physical property requirements of materials for advanced high performance devices, combinations of Si1-xGex and Si:C have been introduced for strain control in PMOS and NMOS regions of devices. Two types of carbon (C) doping techniques have been explored for tensile stress generation in the NMOS device region. Carbon-doped Si epitaxial growth with C doping and C-implantation into Si are two major approaches. Carbon implanted Si requires annealing for recrystallization, damage recovery and tensile strain control. Strain characterization, monitoring and control are as important as material preparation. Non-contact, non-destructive strain and crystallinity characterization techniques with high spatial resolution and virtual depth profiling capability are strongly desired for in-line monitoring. In this study, we report the micro-Raman characterization results on cluster C-implanted Si for tensile strain generation before and after various rapid thermal annealing (RTA) techniques and conditions. Phosphorous ion clusters (P4) (8 keV, 4x1015 cm-2) were implanted with carbon ion clusters (C7) targeting 1.3% and 1.5% flat C profile (~50 nm from the surface). Various excitation wavelength laser beams were used in Raman characterization for virtual strain depth profiling. Flash anneal (fRTP) at 1200oC and impulse spike anneal (iRTP) at 1000oC and 1050oC were used as annealing conditions. As-implanted Si wafers showed almost no Raman signal due to the crystalline lattice damage from high dose cluster ion beam implantation. After RTA of implanted Si wafers under different techniques and conditions, significant broadening and shift of Raman peaks towards the lower wavenumber side was measured, indicating the presence of tensile strain and crystallinity alterations. X-ray diffraction (XRD), secondary ion mass spectroscopy (SIMS) depth profiling and transmission electron microscopy (TEM) analysis results will be reported along with multiwavelength micro-Raman characterization results. Figure 1 shows 363.8nm excited micro-Raman spectra from reference Si and cluster C implanted Si wafers before and after rapid thermal annealing (RTA). Figure 1

Formation of low resistivity junctions is essential for fabricating high performance devices with advanced device modes. Significant effort has been expended, industry wide, to develop low resistivity junctions, over the years. However, the understanding of implant activation and implant damage recovery process is not sufficient. Development of noncontact implant residual damage monitoring techniques would be beneficial in process development for advanced node devices. In this study, we have investigated the effect of annealing temperature and time on the sheet resistance (Rs) of dual (P+ 1.0MeV, 4.0 x 1013 cm-2 + B+ 10keV, 3.0 x 1014cm-2) implanted p--Si(100) wafers using a single wafer furnace-based (hot wall) rapid thermal annealing (RTA) system over a wide range of annealing conditions (350-800oC, 60-150s). Room temperature photoluminescence (RTPL) spectra were measured from all wafers under two different excitation wavelengths (650 and 785 nm) for additional clues on electrical properties of pn junctions, which cannot be obtained from the Rs measurements. Multiwavelength (457.9, 488.0 and 514.5 nm) Raman characterization was done on all wafers for additional insights on the degree of residual lattice damage, after RTA, under different conditions. After all on wafer measurements were completed, secondary ion mass spectroscopy (SIMS) dopant (P and B) depth profiling was done to assess dopant diffusion during the annealing process. Rs values showed strong and systematic change with RTA temperature and time, as expected. RTPL spectra also showed large variations in intensity and wavelength distribution corresponding to the RTA temperature and time. Multiwavelength Raman characterization results showed gradual increase of intensity with the RTA temperature. Three regions of different Raman shift values, corresponding to the Si lattice stress and possibly the degree of residual implant damage, were also noted. SIMS P and B depth profiles did not show significant changes. Correlation among characterization results from various techniques and RTA conditions will be presented.

Wafer-to-wafer bonding is implemented in fabrication of backside illuminated (BSI) complimentary metal-oxide-semiconductor image sensor (CIS) devices in volume manufacturing. A wafer with illuminated imager and a wafer with readout and image processing electronics are fabricated separately and assembled using wafer-to-wafer bonding. Since the illuminated imager and a wafer with readout and image processing electronics are facing each other at the bonded interface, the quality of wafer-to-wafer bonding interface can affect the performance of finished devices. Room temperature photoluminescence (RTPL) technique was studied as a non-contact, in-line characterization technique for assessing bonding interface quality. Ordinary and bonded, 200 mm Si wafers, with different surface finishing conditions, were characterized by RTPL under two different excitation wavelengths (650 nm and 827 nm) to investigate the effects of surface finishing conditions. Significant variations in RTPL spectra and intensity, suggesting potential electrical property variations, were observed from bonded wafers. RTPL characterization results on ordinary and bonded wafers are introduced as a potential technique for in-line bonding interface quality monitoring. © The Author(s) 2015. Published by ECS. This is an open access article distributed under the terms of the Creative Commons Attribution 4.0 License (CC BY, http://creativecommons.org/licenses/by/4.0/), which permits unrestricted reuse of the work in any medium, provided the original work is properly cited. [DOI: 10.1149/2.0111604jss] All rights reserved.

A surface heat-treatment method for semiconductor wafers using a xenon arc lamp is described. High absorption coefficients of silicon wafers in ultra violet (UV) region and short process time made selective surface heating possible. The surface melting of entire 150 mm diameter Si wafers was demonstrated in less than 2 s at a lamp power of 15 kW. By focusing UV light into a limited area on Si wafer surface, surface melting of a selectively exposed area was demonstrated at a much lower lamp power. The surface temperature ramp rate is estimated to be on the order of 1000◦C/s. Si wafers, with various implanted species (P+ ,A s + ,B + and BF2 +) and energies (1 keV‐70 keV), were annealed for implant damage recovery and electrical activation using the Xe lamp under different scanning speeds. Sheet resistance and secondary ion mass spectroscopy (SIMS) depth profiling measurement results from the scanning rapid thermal annealing (RTA) successfully demonstrated the feasibility of the technique in semiconductor RTA processing applications. Electrical activation with desired levels of dopant diffusion can be achieved by optimizing process variables such as lamp power, distance between the lamp and Si wafer, area of light exposure and scanning speed. © The Author(s) 2015. Published by ECS. This is an open access article distributed under the terms of the Creative Commons Attribution 4.0 License (CC BY, http://creativecommons.org/licenses/by/4.0/), which permits unrestricted reuse of the work in any

We have developed a multi-wavelength, room temperature photoluminescence (RTPL) characterization technique and applied it for very low energy and low dose ion implantation process and equipment monitoring. We have tested the sensitivity and stability of the RTPL technique using 200mm p-type Si (100) wafers with 300eV F+ implantation in the dose range of 1.0 × 1011 cm−2 and 1.0 × 1012 cm−2 and found excellent correlation between RTPL intensity and F+ implant dose. We also verified that F+ implantation damage can be cured by subsequent thermal annealing. The RTPL technique is very promising as a practical means of very low energy and low dose ion implant process and equipment monitoring.

Wafer geometry and residual stress go through significant changes at different points in the semiconductor manufacturing process flow. Precise wafer geometry measurement is very important to assess process induced wafer geometry change (PIWGC) and minimize pattern overlay in lithography steps of advanced node devices and 3-D (3-dimensional) packaged devices. However, the precise wafer geometry measurement is very difficult due to gravitational wafer sag and interaction between the anisotropy of mechanical properties of Si and wafer supporting configurations. Effects of anisotropy and supporting configuration on 300 mm Si (001) wafer profile measurements were investigated for pattern overlay estimation and process optimization. © The Author(s) 2015. Published by ECS. This is an open access article distributed under the terms of the Creative Commons Attribution 4.0 License (CC BY, http://creativecommons.org/licenses/by/4.0/), which permits unrestricted reuse of the work in any medium, provided the original work is properly cited. [DOI: 10.1149/2.0011512ssl] All rights reserved.

Various types of stacked dielectric films are used in complimentary metal-oxide-semiconductor (CMOS) devices in gates, capacitors and device isolation structures. They are also used as insulating materials between conductors, as inter-metal dielectrics (IMD) and inter-layer dielectrics (ILD). The preparation technique, structure and properties of dielectrics strongly influence the quality of the dielectrics/Si interface. Nominally, similar dielectrics/Si structures, even prepared by the same technique, often show different electrical properties depending on subtle differences in process conditions (hidden variables). Monitoring of physical dimensions and chemical compositions of dielectrics often miss unexpected variations in electrical properties. Non-contact electrical property characterization techniques lack lateral resolution and often results in impairment of the dielectrics/Si interface due to strong external electric fields from the measurement process. Alternative dielectrics/Si interface characterization techniques, which can provide insights into electrical properties without external electric field, would be very useful as a complimentary process and material quality monitoring technique. In this study, we have investigated the effect of SiN film deposition techniques on the interface quality of the resulting SiN/SiO2/Si using spectroscopic room temperature photoluminescence (RTPL) under multiwavelength excitation. The sample preparation procedures are as follows. First, ultra thin (~2.2 nm thick), gate oxide quality, thermal oxide films were grown on 300 mm Si(100) wafers. Nominally 5.0 nm thick SiN films were grown on ~2.0 nm thick SiO2/Si wafers using conventional low pressure chemical vapor deposition (LPCVD) and atomic layer deposition (ALD) under various nitrogen source flow conditions. The film thickness was measured (after SiO2 film deposition) before and after SiN deposition using ellipsometry. Figure 1 (a) and (b) show RTPL spectra measured at the center of seven different SiN/SiO2/Si wafers under 650 nm excitation and showing maximum RTPL intensity under 650 nm and 827 nm excitation. Significantly large RTPL intensity variations were measured among the seven SiN/SiO2/Si wafers. The SiN film deposition conditions have modified the underlying SiO2/Si interface characteristics. Non-contact RTPL measurements are very sensitive to the thin film deposition techniques and conditions. It is effective as a complimentary dielectrics/Si process and interface characterization and monitoring technique. Figure 1

Slight differences between supposedly identical process chambers are a well known problem in semiconductor manufacturing. In particular, individual plasma-aided process chambers are difficult to characterize and tune to match each other because plasma is a non-equilibrium state and can leave its “footprint” in subtle ways on a wafer. This process chamber mismatching phenomena was investigated in a dual chamber, commercial, high density plasma chemical vapor deposition system by monitoring SiO2/Si interface quality using multiwavelength room temperature photoluminescence and Raman spectroscopy. Effects on the SiO2/Si interface quality, from altering the gas flow pattern in the plasma process chamber, are also studied. © The Author(s) 2015. Published by ECS. This is an open access article distributed under the terms of the Creative Commons Attribution 4.0 License (CC BY, http://creativecommons.org/licenses/by/4.0/), which permits unrestricted reuse of the work in any medium, provided the original work is properly cited. [DOI: 10.1149/2.0161508jss] All rights reserved.

The effect of annealing temperature and time on the resulting resistivity of CoSi2 contacts with P-doped poly-Si was investigated using a single wafer furnace-based (hot wall) rapid thermal annealing (RTA) system. To achieve low resistivity contacts, CoSi2 formation process optimization was done by detailed design of experiment (DOE). Sheet resistance (Rs) response surface plots as a function of annealing temperature and time for 1st step and 2nd step RTA processes showed a very wide process window. The hot wall RTA resulted in significantly (>20%) lower Rs, over a very wide process window, compared to the equivalent RTA process using conventional tungsten halogen lamp-based (cold wall) RTA systems. Dopant (P) depth profiling results by secondary ion mass spectroscopy (SIMS) revealed that the P atoms in the CoSi2 film and at the CoSi2/P-doped poly-Si interface, redistribute very differently under different RTA conditions. The CoSi2 formation process was optimized utilizing characteristics of P pile-up near the CoSi2/P-doped poly-Si interface to suppress P depletion from the P-doped poly-Si layer for contact resistance minimization. © The Author(s) 2015. Published by ECS. This is an open access article distributed under the terms of the Creative Commons Attribution 4.0 License (CC BY, http://creativecommons.org/licenses/by/4.0/), which permits unrestricted reuse of the work in any medium, provided the original work is properly cited. [DOI: 10.1149/2.0171507jss] All rights reserved.

Room temperature photoluminescence (RTPL) spectroscopy and Raman spectroscopy were examined as in-line monitoring techniques for characterizing the interface characteristics of ultra-thin (∼7.2 nm) stacked dielectric films (SiN/SiO2) on 300 mm Si wafers. To investigate the effect of the stacked dielectric films on electronic properties and lattice stress of Si beneath the films, RTPL and Raman signals were measured under various excitation wavelengths with different probing depths. Changes of interface characteristics (mainly, electronic properties and lattice stress of Si beneath the films) of the stacked dielectric films and the Si wafer were investigated using various specimens prepared by different deposition techniques and conditions. The overall interface characteristics of the SiN/SiO2/Si specimens was found to be very dependent on the SiN deposition technique and process conditions. As the stoichiometry of SiN films change from N-rich to Si-rich conditions, the RTPL signal becomes weaker, indicating the change of electronic properties at the SiN/SiO2/Si interface. Within-wafer and wafer-to-wafer variations of the SiN/SiO2/Si interface characteristics were successfully characterized by RTPL and Raman spectroscopy under various excitation wavelengths. Other characterization results such as film thickness from ellipsometry, film stress from wafer curvature and film composition from Auger electron spectroscopy (AES) were also discussed. © The Author(s) 2015. Published by ECS. This is an open access article distributed under the terms of the Creative Commons Attribution 4.0 License (CC BY, http://creativecommons.org/licenses/by/4.0/), which permits unrestricted reuse of the work in any medium, provided the original work is properly cited. [DOI: 10.1149/2.0291507jss] All rights reserved.

Photoluminescence (PL) spectra from lightly boron (B) doped p − -Si(100) under 488.0 nm Ar + ion laser excitation over the temperature range of 22 K–290 K is presented. Change of PL peak height (maximum intensity), peak position, peak area (areal intensity), full-width-at-half-maximum (FWHM: peak width) were determined as a function of temperature. PL intensity was sharply decreased with temperature increase in the temperature range of 22 K – 170 K and then slowly increased again in the temperature range of 170 K–290 K. Phonon replicas of a relatively sharp band-to-band (or band edge (BE)) PL peak were clearly measured at low temperatures (≤90 K). PL spectra became broader and the phonon replicas were barely distinguishable as the temperature was increased. The envelope of the main PL peak and the broadening of peak width with the Si temperature were qualitatively in good agreement with the Maxell-Boltzmann probability distribution function. The direction of peak position shift with Si temperature change was also in good agreement with the temperature dependence of the Si bandgap. All measured PL spectra were curve fitted using combinations of modified Gaussian function(s) and standard Gaussian function(s). A simplified curve fitting method for broad PL spectra, consisting of the BE peak and band tail peak, using an exponentially modified Gaussian (EMG or ExGaussian) function and a number of standard Gaussian functions, was proposed from a practical usage point of view. Radiative recombination processes in Si and potential industrial applications of the PL characterization technique were discussed. © The Author(s) 2015. Published by ECS. This is an open access article distributed under the terms of the Creative Commons Attribution 4.0 License (CC BY, http://creativecommons.org/licenses/by/4.0/), which permits unrestricted reuse of the work in any

Phosphorous (P+ 1.0 MeV, 4.0 × 1013 cm−2) and boron (B+ 10 keV, 3.0 × 1014 cm−2) implanted p−-Si(100) wafers were annealed with a wide range of annealing conditions (350–800◦C, 60–150 s) in a commercially available hot wall-based, rapid thermal annealing (RTA) system. Significant variations in sheet resistance were observed in different RTA conditions. Secondary ion mass spectroscopy (SIMS) P and B depth profiles did not show significant change. Room temperature photoluminescence (RTPL) spectra were measured from all wafers under two different excitation wavelengths (650 and 785 nm). RTPL spectra showed large variations in intensity and wavelength distribution corresponding to the sheet resistance. © The Author(s) 2015. Published by ECS. This is an open access article distributed under the terms of the Creative Commons Attribution 4.0 License (CC BY, http://creativecommons.org/licenses/by/4.0/), which permits unrestricted reuse of the work in any medium, provided the original work is properly cited. [DOI: 10.1149/2.0191512jss] All rights reserved.

Unexpected residual effects of ultraviolet (UV) based measurements on SiO2/Si interface were studied using room temperature photoluminescence (RTPL) under various excitation wavelengths. Modulation (either increase or decrease) of RTPL intensity was measured from the UV exposed areas. Effects are investigated by controlled exposure with selected wavelength ranges and subsequent thermal treatments at 400◦C and 800◦C for 5 min in forming gas (96% N2 + 4% H2). Significant enhancement in RTPL intensity was observed and the residual effects were characterized after the thermal treatments. The mechanisms for RTPL intensity degradation after UV exposure and recovery after forming gas anneal are discussed. © 2014 The Electrochemical Society. [DOI: 10.1149/2.011403ssl] All rights reserved.

Multiwavelength room temperature photoluminescence (RTPL) and Raman spectroscopy were proposed as in-line monitoring techniques for characterizing the dielectric/Si interface. As an application example, ∼7.0 nm thick ultra-thin SiO2 films on 300 mm Si wafers, prepared by various oxidation techniques and conditions, were characterized using multiwavelength RTPL and Raman spectroscopy.Specifically,overallqualityoftheultra-thinSiO2/Siinterface(includingpassivationcharacteristics)andSilatticestress beneath SiO2 films are investigated. The overall SiO2/Si interface quality was seen to be very dependent on oxidation technique and process conditions. Within wafer and wafer-to-wafer variations of SiO2/Si interface quality were successfully characterized by RTPL and Raman spectra measurements. For electrical analysis of SiO2/Si-based structures, non-contact corona charge-based, in-line (capacitance-voltage (C-V) and stress induced leakage current (SILC)) measurements were performed and compared with RTPL and Raman characterization results. Surprisingly, significant variations in RTPL intensity at and near the corona charge-based measurement sites, indicated that the corona-based electrical measurement technique, though non-contact, was indeed invasive. The effect of corona-charge based electrical measurements on SiO2/Si interface was permanent and even clearly visible from the back

Undoped and B-doped epitaxial Si1−x Ge x layers on Si(100) were characterized using a long-focal-length, polychromator-based, multiwavelength micro- Raman spectroscopy system. The peak position and full-width at half-maximum of the Si–Si signal from Si1−x Ge x correlates very strongly with Ge content and B concentration. The intensity ratio of the Si–Si peak from the epitaxial layer to the Si peak from the substrate indicates the thickness of the epitaxial Si1−x Ge x layer. Raman characterization results were confirmed by both high-resolution x-ray diffraction and secondary-ion mass spectroscopy. Multiwavelength Raman spectroscopy was used as a practical, noncontact, in-line monitoring technique for Si1−x Ge x epitaxial processes during device manufacture.

Pseudomorphically grown Si:C thin films on Si(100), with a carbon content ranging from 0.9 to 1.5 at% and thickness from 45 to 84 nm, were prepared by ultrahigh vacuum (UHV) and low pressure (LP) chemical vapor deposition (CVD) and characterized by various non-invasive and non-destructive characterization techniques including high resolution X-ray diffraction (HRXRD), multi-wavelength high resolution Raman spectroscopy, and room temperature (RT) multi-wavelength photoluminescence (PL). Benefits and limitations of these characterization techniques are discussed. Results are shown for similar thicknesses, LP-CVD sample has less total C and remains pseudomorphic while UHV-CVD has higher amount of interstitial C and exhibits the onset of relaxation.

Boron-doped, single (∼54 nm) or double (∼21 + 54 nm) Si1−xGex layers were epitaxially grown on 300-mm-diameter p−-Si(100) device wafers with 20 nm technology node design features, by ultrahigh vacuum chemical vapor deposition. The Si1−xGex/Si wafers were annealed in the temperature range of 950–1050 °C for 60 s to investigate the effect of annealing on possible changes of Ge content and Si stress near the Si1−xGex/Si interface. High spectral resolution, micro-Raman spectroscopy was used as a nondestructive characterization technique with five excitation wavelengths of 363.8, 441.6, 457.9, 488.0, and 514.5 nm. Ge diffusion and generation of compressive stress at the Si1−xGex/Si interface were measured on all annealed wafers. Ge diffusion and the accumulation of compressive Si stress after annealing showed significantly different behaviors between single- and double-layer Si1−xGex/Si wafers. Raman characterization results were compared with secondary ion mass spectroscopy and high-resolution x-ray diffraction results.

Stress in Si adjacent to W-filled TSVs has been measured by multiwavelength Raman spectroscopy (probe depth ranging from 290 to 645 nm) and compared to finite element modeling. The stress in Si from the TSVs increases with TSV width and is almost constant at the different depths probed in this study. The Raman signal is mainly due to the sum of the Sx and Sy stress components, perpendicular and parallel to the TSV bars. The Sx component is tensile and the Sy component is compressive, with the Sy component dominant in between the TSVs. However, ~10 um from the edge of the TSV array, the two components are equal in magnitude so that the stress measured by Raman is zero, even though the individual Sx and Sy stresses are considerable. Hence, it is important to use finite element modeling in conjunction with Raman spectroscopy to characterize stresses in TSVs.

The possibility and suitability of micro-Raman spectroscopy as a noncontact, in-line measurement technique for boron (B) concentration in ultrathin (20~35 nm thick) Si1–xGex layers epitaxially grown on 300 mm diameter p−-Si(100) wafers, by ultrahigh vacuum chemical vapor deposition, was investigated. Raman spectra from Si1–xGex/Si(100) wafers were measured under 363.8, 457.9, 488.0, and 514.5 nm excitation. Strong correlation was found between B content and characteristics of the Si–Si Raman peak from the Si1–xGex films. As B concentration increased from undoped to 9.1 × 1020 atoms/cm3, the Si–Si Raman peak broadened and the peak height became smaller for a given Ge content. The B concentration in Si1–xGex film estimated from Raman measurement was in good agreement with secondary ion mass spectroscopy analysis results. Boron concentration as low as 8.7 × 1017 atoms/cm3 can be detected by Raman spectroscopy, which is ~30 times more sensitive than the detection limit (2.7 × 1019 atoms/cm3) of high-resolution x-ray diffraction.

The process results on blanket Si and patterned Si wafers are often very different. Process variations in conventional lamp- based rapid thermal processing (RTP) systems due to pattern size, density and structure dependence under nearly identical process conditions are well known as the pattern effect , but without identifying the root cause. As device dimensions shrink, pattern-induced variability of process results increases which significantly affects the process window, device yield and manufacturability. Understanding the underlying physical causes of the pattern effect is very important to systematically improve device performance, yields and manufacturability. In this paper, the impact of device pattern size and density on process variations in RTP steps was analyzed. According to the analysis, diffraction of light from the periodicity of the nanometer scale device features can result in significant local heating near the critical depths for junctions and contacts.

Significant variations in electrically active defects, traps, and contaminants, at or near the dielectric/Si interface, were found from multiwavelength RTPL spectroscopic studies of ultra-thin SiO2 films on Si prepared by various oxidation techniques and of Si with native oxide. Non-contact, multiwavelength RTPL spectroscopy was able to reveal process induced, electrically active defects and characteristics which cannot be properly investigated using conventional dielectric/Si interface characterization techniques because of their surprising invasive tendencies.

Raman spectroscopy was used for characterizing poly-Si after thermal annealing of chemical vapor deposited (CVD) thin a-Si films in the vertical channel region of 3D V-NAND device wafers using various annealing conditions and techniques. Raman spectra, indicating crystallization of a-Si films and grain growth of poly-Si with respect to annealing conditions and techniques, was measured using a multiwavelength Raman spectroscopy system.

Ultra-shallow ion implanted Si wafers, both with and without Ge pre-amorphization, were annealed using xenon arc flash lamps. The duration of flash illumination was controlled between 1 ms and 20 ms. Changes in sheet resistance and dopant profiles after flash anneal were measured and investigated, along with crystal defect densities. Sheet resistance was measured using a four-point probe. Dopant depth profiling and defect characterization were done using secondary ion mass spectroscopy (SIMS) and cross-sectional transmission electron microscopy (XTEM). Sheet resistance values of 250–350 Ω/sq. at a junction depth of 24 nm (at B concentration of 1.0 × 10 18 cm −3 ) were achieved. No significant dopant diffusion was observed after the Xe arc flash lamp annealing.

Thermal behavior of 200-mm- and 300-mm-diameter Si (100) wafers during high-temperature rapid thermal processing (RTP) in a single wafer furnace (SWF) is investigated as a function of temperature, pressure, process time, wafer handling method and speed. Significant elastic wafer shape deformation was observed during wafer temperature ramp-up. Slip generation was frequently observed in wafers processed above 1050°C. Size, shape and spatial distribution of crystal defects generated during RTP were characterized using an optical microscope and X-ray topography. The wafer handling method and speed are found to be very important in reducing defect generation during RTP at the given process conditions. Highly reproducible, slip-free RTP results were achieved in 200-mm- and 300-mm-diameter Si (100) wafers processed at 1100°C by optimizing the wafer handling method and speed.

Performance variations and yield loss in advanced Si devices are closely related to the quality of the semiconductor surface and interfaces. These are very significant factors for successful development of advanced devices. In addition, proper implementation of manufacturing processes is critical as devices scale to smaller size and complexity of device structures increase. The importance of proper understanding and control of surface cleaning and passivation of silicon and dielectric/Si interface quality, is more important than ever. Characterization techniques for determining the effectiveness of Si cleaning, surface passivation and the dielectric/Si interface include Auger electron spectroscopy (AES), X-ray photoelectron spectroscopy (XPS), secondary ion mass spectroscopy (SIMS), high resolution cross-sectional transmission electron microscopy (HRXTEM), non-contact I-V, C-V and carrier lifetime measurements. Various chemical analysis techniques are also used for determining contamination sources in manufacturing. While the conventional characterization techniques have been providing useful information on the properties of the dielectric/Si interface, they cannot sufficiently provide substantive clues for many puzzling problems of Si surface cleanliness, Si surface passivation and the dielectric/Si interface. In this paper, overall quality of the Si surface and dielectric/Si interface (including cleanness, passivation and surface recombination characteristics) were characterized using room temperature photoluminescence (PL) spectroscopy. The spatial resolution of PL spectroscopy is tens of microns. To understand the depth distribution of electrically active defects/traps, at or near the Si surface and the dielectric/Si interface, different excitation wavelengths (with different probing depths) were used as the light source. Significant variations in electrically active defects, traps, and contaminants, at or near the surface, and the dielectric/Si interface were found from multiwavelength PL spectroscopic studies of Si with native oxide. Non-contact, multiwavelength PL spectroscopy was able to reveal electrically active defects and characteristics induced by the cleaning process used, which cannot be properly investigated using conventional chemical analysis and dielectric/Si interface characterization techniques.

Epitaxial Si wafers are widely used for high performance advanced memory devices and CMOS image sensor (CIS) device manufacturing. Surface morphology observation and resistivity measurements are frequently done as quick in-line quality monitoring of epitaxial Si layers. High resolution X-ray diffraction (HRXRD) and etch pit characterizations are done for randomly selected wafers. However, these conventional characterization techniques are not sensitive enough to detect small quality variations in epitaxial Si wafers. For Si wafers with multiple epitaxial layers and different dopant concentrations, the conventional characterization techniques are even less useful. Introduction of new epitaxial characterization techniques is strongly desired for effective in-line process monitoring. A non-contact, in-line characterization technique, with virtual depth profiling capability, would be beneficial for proper characterization of Si wafers with multiple epitaxial layers. In this study, we have characterized 200 mm and 300 mm Si wafers with triple epitaxial layers using multiwavelength, high resolution Raman spectroscopy. Ninety three (93)-point wafer mapping measurements were performed on all wafers, Statistics of Raman signal intensity, shift and full-width-at-half-maximum (FWHM) values, under different excitation wavelengths, were extracted and compared with two types of reference Si wafers (prime Si wafers and reclaimed Si wafers). Significant variations in Raman signal intensity, shift and FWHM were measured between reference wafers and epitaxial wafers, indicating potential Si lattice stress and crystallinity. Excitation wavelength dependence of Raman signal intensity, shift and FWHM also indicated variations in Si lattice stress and crystallinity of epitaxial layers in the depth direction. Non-contact multiwavelength Raman measurements are very sensitive to the quality of epitaxial Si layers and are effective as a complimentary in-line process characterization and monitoring technique. Figure 1

Ion implant damage to the Si lattice was investigated using ultraviolet (UV) Raman spectroscopy under two UV excitation wavelengths (266.0 and 363.8nm) with probing depths of ∼2 and ∼5nm into the surface. Ultra-shallow implantation of B+ and BF 2 + ions with and without Ge pre-amorphization implantation (PAI) into 300mm diameter n-type Si(100) wafers were prepared. Raman peak broadening and shape change, corresponding to the degree and depth of ion implantation damage to the Si lattice, were measured. Changes of reflectance spectra in the UV and visible wavelength region caused by the ultra-shallow ion implantation were measured and correlated with Si lattice damage evaluated by UV Raman spectroscopy, secondary ion mass spectroscopy (SIMS) and high resolution transmission electron microscopy (HRXTEM). UV Raman spectroscopy is a very promising non-contact Si lattice damage characterization technique for ultra-shallow ion implanted Si and can be used as an in-line damage and electrical activation monitoring technique.

Si lattice stress at or near the surface, and overall quality of the Si surface and interface were characterized using multi-wavelength, high resolution Raman and photoluminescence (PL) spectroscopy. Depth profiling of Si lattice stress and electrically active defects/traps, at or near the Si surface and interface, was done using ultraviolet (UV) to infrared (IR) light sources, with different probing depths. Significant variations in Si lattice stress, Si bond lengths and electrically active defects/traps were found from Si wafers undergoing various process steps. Visualization of Si surface and interface quality was done on Si wafers following various device fabrication steps.

To meet various physical property requirements of materials for advanced applications for specific devices, combinations of Si/Ge, Ge/Si, Si1-xGex/Si, are frequently introduced in the device fabrication process. Epitaxy, condensation and annealing processes are commonly used. Since a small variation in composition, strain and crystallinity can result in reduced device performance or failure, the composition, strain and crystallinity must be carefully monitored and controlled throughout the manufacturing process. We have studied the dependence of Ge and Si intermixing on annealing temperature and Raman excitation wavelength. Using multiwavelength Raman spectroscopy, we found Ge and Si intermixing in epitaxially grown Ge(100)/Si(100) after successive thermal anneals. Very strong dependence of signal-to-noise (S/N) ratio measurements on excitation wavelength and film structure was observed. Suitable excitation wavelengths must be chosen to properly characterize Si and Ge-based heteroepitaxial layers based on the thickness, stacking order and composition of epitaxial films having different optical properties at different wavelengths. © The Author(s) 2014. Published by ECS. This is an open access article distributed under the terms of the Creative Commons Attribution 4.0 License (CC BY, http://creativecommons.org/licenses/by/4.0/), which permits unrestricted reuse of the work in any medium, provided the original work is properly cited. [DOI: 10.1149/2.0041502jss] All rights reserved.

Ultra-violet (UV) Raman and multiwavelength photoluminescence (PL) characterization techniques are examined as potential in-line, non-contact dopant activation and diffusion process monitoring techniques for ion implanted silicon in implant activation process steps. Excellent correlations among sheet resistance (Rs), B depth profiles, UV Raman and multiwavelength PL characterization results were achieved. The UV Raman and multiwavelength PL technologies can be used as promising non-contact dopant activation and diffusion process monitoring techniques.

Higher failure rates have been observed for devices at or adjacent to areas that have been measured or inspected by in-line x-ray during front end of line process steps. The failures are thought to be related to SiO2/Si interface damage caused by x-ray radiation during routine in-line element, material, and process monitoring. This issue has been noted for highly advanced integrated semiconductor devices following device failure mode analysis of Si wafers, with and without x-ray in-line inspection. A multiwavelength room-temperature photoluminescence (RTPL) study was performed to identify the presence of such damage in x-ray irradiated wafers from various types of x-ray inspection steps during device fabrication processes. It was found that x-ray radiation as low as 16 keV induced damage at the SiO2/Si interface. The damage to the SiO2/Si interface was successfully observed by using multiwavelength RTPL wafer mapping.

Arsenic (As+) implanted p-type wafers for n+ junction were prepared and annealed in a resistively heated, single wafer rapid thermal furnace in N2. The wafers were non-destructively characterized by multi-wavelength Raman spectroscopy and multi-wavelength photoluminescence (PL) spectroscopy before and after rapid thermal annealing (RTA). Sheet resistance and dopant profiles of n+/p junctions were measured using a four point probe and secondary ion mass spectroscopy (SIMS). Strong correlation among Raman, PL spectra, sheet resistance, dopant profile and RTA conditions were observed. Approximate dopant profiles, crystal quality, junction integrity, dopant activation/deactivation rates, and approximate profiles (location and density) of non-radiative recombination centers of As+ implanted wafers were successfully characterized by multi-wavelength Raman and PL measurements without making contact. Multi-wavelength Raman and PL can provide advantages as in-line, non-contact/non-destructive process and material monitoring techniques, and complement conventional invasive characterization techniques.