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This paper presents a comparative study between two input adapter circuits. The concepts are analysed based on input current consumption, fast propagation delay with low propagation distortion and input level hysteresis. The proposed methods were implemented in a standard 0.25µm BCD technology and the comparison was performed by means of simulations results and measurements.

This paper investigates the root cause of the latch on failure by a short turn-on input signal with a negative VS surge and proposes a new 1200 V HVIC with a high side edge trigger in order to solve the latch on failure. The proposed HVIC is fabricated using a 1.2 μm 1200 V BCDMOS process. The experimental results show the latch on failure no longer occurs on the new 1200 V HVIC because it doesn't overlap the VS recovery period and the RESET pulse period. The proposed HVIC can be applied to IPM modules (intelligent power modules) and APM modules (automotive power modules) which require a more robust HVIC solution.

This paper proposes an Under Voltage Lock Out (UVLO) with zero static power consumption Power-on Reset (POR) circuit in a High-Voltage Integrated Circuit (HVIC). The HVIC with the proposed UVLO and POR circuit is fabricated using a 1.2 μm 650 V BCDMOS process. Experimental results show that the UVLO with POR circuit consumes very low static power; 411 μW at 15 V power supply. Moreover, the newly designed POR circuit works nicely regardless of high-side floating power supply rise time. The proposed circuit has good performance in terms of high-peak pulsating noise immunity. Therefore, this design is suitable for embedding in an HVIC with an integrated bootstrap diode for low power motor application and intelligent power modules.

In this paper, a half bridge convert driver IC with novel common mode rejection technique is designed and implemented in [email protected] high voltage (650V) Dielectric Isolation MOS (DIMOS) process. The Designed IC is suitable for medium power (under 500W) applications such as consumer electronics. Half bridge converter driver IC with a novel common mode rejection technique, which is composed of noise filter and set inhibitor, shows high dv/dt noise immunity up to 66.67V/ns. Spectre simulation was performed to verify the electrical characteristics of the designed IC.

In this paper, High brightness LED (light-emitting diodes) driver IC (integrated circuit) using new current sensing circuit is proposed. This LED driver IC can provide a constant current with high current precision over a wide input voltage range. The proposed current-sensing circuit is composed of a cascode current sensor and a current comparator with only one reference voltage. This IC minimizes the voltage stress of the MOSFET (metal oxide semiconductor field effect transistor) from the maximum input voltage and has low power consumption and chip area by using simple-structured comparator and minimum bias current. To confirm the functioning and characteristics of our proposed LED driver IC, we designed a buck converter. The LED current ripple of the designed IC is in and a tolerance of the average LED current is lower than 2.43%. This shows much improved feature than the previous method. Also, protections for input voltage and operating temperature are designed to improve the reliability of the designed IC. Designed LED driver IC uses 1.0 X-Fab. BiCMOS process parameters and electrical characteristics and functioning are verified by spectre (Cadence) simulation.

In this paper, we propose a novel shoot-through protection circuit and pulse generator for half-bridge driver IC. We designed a robust half-bridge driver IC over a variation of processes and power supplies. The proposed circuit is composed a delay circuit using a beta-multiplier reference. The proposed circuit has a lower variation rate of dead time and pulse-width over variation of processes and supply voltages than the conventional circuit. Especially, the proposed circuit has more excellent pulse-width matching of set and reset signals than the conventional circuit. Also, the proposed pulse generator is prevented from fault operations using a logic gate. Dead time and pulse-width of the proposed circuit are typical 250 ns, respectively. The variation ratio is 68%(170 ns) of maximum over variation of processes and supply voltages. The proposed circuit is designed using 1 μm 650 V BCD (Bipolar, CMOS, DMOS) process parameter, and the simulations are carried out using Spectre simulator of Cadence corporation.

In this paper, we designed driving IC for 500 V resonant half-bridge type power converter, In this single-ended level shifter, chip area and power dissipation was decreased by 50% and 23.5% each compared to the conventional dual-ended level shifter. Also, this newly designed circuit solved the biggest problem of conventional flip-flop type level shifter in which the power MOSFET were turned on simultaneously due to the large dv/dt noise. The proposed high side level shifter included switching noise protection circuit and schmmit trigger to minimize the effect of displacement current flowing through LDMOS of level shifter when power MOSFET is operating. The designing process was proved reasonable by conducting Spectre and PSpice simulation on this circuit using 1 BCD process parameter.