Search

As the demand for high-density, high-performance technologies in semiconductor systems increases, efforts are being made to mitigate and optimize the issues of high current density and heat generation within interconnects to ensure reliability. While interconnects are the most fundamental pathways for transmitting current signals, there has been relatively little research conducted on them compared to individual unit devices from the perspective of overall system performance. However, as integration density increases, the amount of loss in interconnects also rises, necessitating research and development to minimize these losses. In this study, we propose a method to analyze power efficiency by utilizing the differences between simulation results and measured results of interconnect structures. We confirmed that the difference between theoretical resistance values and actual measured values varies with the contact area ratio between metal lines and vias, and we analyzed the power efficiency based on these differences. Using the findings, we proposed and validated a structure that can improve power efficiency. This study presents a method to analyze power efficiency and suggests ways to achieve higher power efficiency within the limited specifications of interconnects. This contributes to enhancing power efficiency and ensuring reliability, thereby preserving the performance of the overall system in highly integrated semiconductor systems. [ABSTRACT FROM AUTHOR]

With the recent rapid development of IT technology, the demand for multifunctional semiconductor devices capable of high performance has increased rapidly, and the miniaturization of such devices has also faced limitations. To overcome these limitations, various studies have investigated three-dimensional packaging methods of stacking devices, and among them, hybrid bonding is being actively conducted during the bonding process. studies of hybrid bonding during the bonding process are active. In this study, Cu bonding using a nano passivation layer was carried out for Cu/SiO2 hybrid bonding applications, with Au and Ag deposited on Cu at the nano level and used as a protective layer to prevent Cu oxidation and to achieve low-temperature Cu bonding. Au was deposited at about 12 nm, and Ag was deposited at about 15 nm, with Cu bonding carried out at 180 °C for 30 min, after which an annealing process was conducted at 200 °C for one hour. After bonding, the specimen was diced into a 1 cm × 1 cm chip, and the bonding interface was analyzed using SEM and TEM. Additionally, the 1 cm × 1 cm chip was diced into 2 mm × 2 mm specimens to measure the shear strength of the bonded chip, and the average shear strength of Au and Ag was found to be 5.4 and 6.6 MPa, respectively. The degree of diffusion between Au-Cu and Ag-Cu was then investigated; the diffusion activation energy when Au diffuses to Cu was 6369.52 J/mol, and the diffusion activation energy when Ag diffuses to Cu was 17,933.21 J/mol. [ABSTRACT FROM AUTHOR]