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The self-consistent solutions of ultrathin body device structures are presented to understand the influence of quantum-mechanical confinement on the predictions of classical scaling theory. The 2-D electrostatics considerations are at least as important as quantum-mechanical ones in understanding the subthreshold scaling behavior of ultrathin body devices, as shown through numerical simulations.

Complete gate silicidation is an excellent technique for the integration of metal gates into MOSFETs, and NiSi is the most scalable silicide gate material. A versatile method, which relies on doping the poly-Si with various impurities prior to silicidation, for controlling the workfunction of a NiSi gate is presented.

High-performance metal-gate FinFETs were developed using complete gate silicidation with Ni, combining the advantages of metal-gate and double-gates transistors. NiSi-gate workfunction control is presented using silicide induced impurity segregation of As, P, and B over a range of 400 mV.

Research involving fabrication of high-performance FinFET devices is described and discussed.

The thin-body p-channel MOS transistors with a SiGe/Si heterostructure channel were fabricated on silicon-on-insulator (SOI) substrates. A novel lateral solid-phase epitaxy process was employed to form the thin-body for the suppression of short-channel effects.

A study of high performance PMOSFETs having sub-50-nm gate-length is reported.

MOSFETS with gate length of 17 nm are described, and a novel self-aligned double gate FinFET is proposed.

This study investigates electrical conduction across lipid bilayers that self-assemble in oil between a water drop and a hafnium oxide surface. Morphology and electrical properties of two bilayers formed from equal molar concentrations of sorbitan monooleate (Span 80) and sorbitan trioleate (Span 85) in dodecane are quantified and compared. The molecular structures of the two surfactants are quite similar, except that sorbitan monooleate contains one unsaturated lipid tail per molecule, whereas sorbitan trioleate contains three. We find that the leakage current density across both bilayers increases exponentially with electric field. The relative leakage current densities across the two bilayers scale with the packing density of lipid tails in the bilayers. This correlation provides evidence that the lipid tail interactions through thermal fluctuations provide a pathway of electrical conduction across the membrane. [ABSTRACT FROM AUTHOR]

Ultralow-power electronics will expand the technological capability of handheld and wireless devices by dramatically improving battery life and portability. In addition to innovative low-power design techniques, a complementary process technology is required to enable the highest performance devices possible while maintaining extremely low power consumption. Transistors optimized for subthreshold operation at 0.3 V may achieve a 97% reduction in switching energy compared to conventional transistors. The process technology described in this article takes advantage of the capacitance and performance benefits of thin-body silicon-on-insulator devices, combined with a workfunction engineered mid-gap metal gate. [ABSTRACT FROM AUTHOR]

We present self-consistent solutions of ultrathin body device structures to understand the influence of quantum-mechanical confinement on the predictions of classical scaling theory. We show that, two-dimensional (2-D) electrostatics considerations play a more dominant role than quantum-mechanical effects in the subthreshold behavior of ultrathin fully depleted silicon-on-insulator structures. We also show how modifications to the doping profile can be used to alleviate 2-D short-channel effects. [ABSTRACT FROM AUTHOR]

Investigates design consideration of FinFET by three-dimensional (3-D) simulation and analytical modeling. Short-channel effects by 3-D distributive simulation; Short-channel effects by 3-D analytical modeling; Insights into device design; Conclusion.

Reports the concept, design and demonstration of 50 nanometer thin-body silicon-on-insulator p-channel metal oxide semiconductor field effect transistors. Enhancement in drive current due to the incorporation of silicon-germanium in the channel; Device design considerations; Device fabrication; Device characterization.

We have developed an implantable fuel cell that generates power through glucose oxidation, producing 3.4 \(\mu\)W cm\(^{-2}\) steady-state power and up to 180 \(\mu\)W cm\(^{-2}\) peak power. The fuel cell is manufactured using a novel approach, employing semiconductor fabrication techniques, and is therefore well suited for manufacture together with integrated circuits on a single silicon wafer. Thus, it can help enable implantable microelectronic systems with long-lifetime power sources that harvest energy from their surrounds. The fuel reactions are mediated by robust, solid state catalysts. Glucose is oxidized at the nanostructured surface of an activated platinum anode. Oxygen is reduced to water at the surface of a self-assembled network of single-walled carbon nanotubes, embedded in a Nafion film that forms the cathode and is exposed to the biological environment. The catalytic electrodes are separated by a Nafion membrane. The availability of fuel cell reactants, oxygen and glucose, only as a mixture in the physiologic environment, has traditionally posed a design challenge: Net current production requires oxidation and reduction to occur separately and selectively at the anode and cathode, respectively, to prevent electrochemical short circuits. Our fuel cell is configured in a half-open geometry that shields the anode while exposing the cathode, resulting in an oxygen gradient that strongly favors oxygen reduction at the cathode. Glucose reaches the shielded anode by diffusing through the nanotube mesh, which does not catalyze glucose oxidation, and the Nafion layers, which are permeable to small neutral and cationic species. We demonstrate computationally that the natural recirculation of cerebrospinal fluid around the human brain theoretically permits glucose energy harvesting at a rate on the order of at least 1 mW with no adverse physiologic effects. Low-power brain–machine interfaces can thus potentially benefit from having their implanted units powered or recharged by glucose fuel cells.

Graphene transistors are made by transferring a thin graphene film grown on Ni onto an insulating SiO2 substrate. The properties and integration of these graphene-on-insulator transistors are presented and compared to the characteristics of devices made from graphitized SIC and exfoliated graphene flakes. [ABSTRACT FROM AUTHOR]

It has been shown that few-layer graphene films can be grown by atmospheric chemical vapor deposition using deposited Ni thin films on SiO(2)/Si substrates. In this paper we report the correlation between the thickness variations of the graphene film with the grain size of the Ni film. Further investigations were carried out to increase the grain size of a polycrystalline nickel film. It was found that the minimization of the internal stress not only promotes the growth of the grains with (111) orientation in the Ni film, but it also increases their grain size. Different types of SiO(2) substrates also affect the grain size development. Based upon these observations, an annealing method was used to promote large grain growth while maintaining the continuity of the nickel film. Graphene films grown from Ni films with large versus small grains were compared for confirmation.