Search

Your search keyword '"Kang, Ga Eon"' showing total 10 results
Start Over Author "Kang, Ga Eon"
10 results on '"Kang, Ga Eon"'

3. Simulation of capacitorless DRAM based on polycrystalline silicon with a vertical underlap structure and a separated channel layer

Author

BAE, SEUNGJI, primary, Lee, Sang Ho, additional, Park, Jin, additional, Kang, Ga Eon, additional, Heo, Jun Hyeok, additional, Jeon, So Ra, additional, Kim, Min Seok, additional, Hong, Jeong Woo, additional, Jang, Jaewon, additional, Bae, Jin-Hyuk, additional, Lee, Sin-Hyung, additional, and Kang, In Man, additional

Published
2024
Full Text
View/download PDF

7. Bulk-fin field-effect transistor-based capacitorless dynamic random-access memory and its immunity to the work-function variation effect

Author

Lee, Sang Ho, primary, Park, Jin, additional, Kim, Geon Uk, additional, Kang, Ga Eon, additional, Heo, Jun Hyeok, additional, Jeon, So Ra, additional, Yoon, Young Jun, additional, Seo, Jae Hwa, additional, Jang, Jaewon, additional, Bae, Jin-Hyuk, additional, Lee, Sin-Hyung, additional, and Kang, In Man, additional

Published
2023
Full Text
View/download PDF

9. Simulation of Capacitorless DRAM Based on the Polycrystalline Silicon Nanotube Structure with Multiple Grain Boundaries.

Author

Park, Jin, Lee, Sang-Ho, Kang, Ga-Eon, Heo, Jun-Hyeok, Jeon, So-Ra, Kim, Min-Seok, Bae, Seung-Ji, Hong, Jeong-Woo, Jang, Jae-won, Bae, Jin-Hyuk, Lee, Sin-Hyung, and Kang, In-Man

Subjects
POLYCRYSTALLINE silicon, CRYSTAL grain boundaries, RF values (Chromatography), GRAIN, COMPUTER-aided design, FIELD-effect transistors
Abstract

In this study, a capacitorless one-transistor dynamic random-access memory (1T-DRAM), based on polycrystalline silicon (poly-Si) nanotube structure with a grain boundary (GB), is designed and analyzed using technology computer-aided design (TCAD) simulation. In the proposed 1T-DRAM, the 1T-DRAM cell exhibited a sensing margin of 422 μA/μm and a retention time of 213 ms at T = 358 K with a single GB. To investigate the effect of random GBs, it was assumed that the number of GB is seven, and the memory characteristics depending on the location and number of GBs were analyzed. The memory performance rapidly degraded due to Shockley–Read–Hall recombination depending on the location and number of GBs. In the worst case, when the number of GB is 7, the mean of the sensing margin was 194 µA/µm, and the mean of the retention time was 50.4 ms. Compared to a single GB, the mean of the sensing margin and the retention time decreased by 59.7% and 77.4%, respectively. [ABSTRACT FROM AUTHOR]

Published
2023
Full Text
View/download PDF

10. Bulk fin-type field-effect transistor-based capacitorless dynamic random-access memory with strong resistance to geometrical variations

Author

Kim, Min Seok, Lee, Sang Ho, Park, Jin, Kang, Ga Eon, Heo, Jun Hyeok, Jeon, So Ra, Bae, Seung Ji, Hong, Jeong Woo, Jang, Jaewon, Bae, Jin-Hyuk, Lee, Sin-Hyung, and Kang, In Man

Abstract

In this study, a bulk fin-type FET (FinFET)-based capacitorless one-transistor dynamic random-access memory (1T-DRAM) was proposed. The fabrication process of the proposed 1T-DRAM was similar to that of a typical junctionless bulk FinFETs, except that the p-type doped body fin region operated as a charge storage region. The effects of the geometrical variations, such as the fin angle (θfin) variation and line edge roughness (LER), which are inevitable in fabrication, on the transfer characteristics and memory performance of the proposed 1T-DRAM were studied. θfinwas varied from 90° to 80°, and 200 samples with the LER were analyzed. Results revealed that the transfer characteristics and memory performance were affected by geometrical variations. However, the proposed 1T-DRAM exhibited an excellent retention time in all cases because the charge storage region was separated from the region of operation.

Published
2024
Full Text
View/download PDF

Catalog

Books, media, physical & digital resources
See catalog results