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In this work, thermal conductivities of gas diffusion layer (GDL) under controlled temperature, humidity and stress are measured. Additionally, we investigated the anisotropic thermal conductivity of GDLs. The experimental results showed that thermal conductivity of in-plane direction was much higher than that of trough-plane direction for all the samples that were measured. This result indicated thermal conductivity of GDLs to be strongly anisotropic since GDL is a highly porous material which contains large amount of air inside the GDL. Moreover, we found that thermal conductivity of GDL in the through-plane direction increased as the compression on the GDL was increased.

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An architecture for a single-chip functional tester which reduces the cost of testing application-specific integrated circuits (ASICs) is presented. The data generator/receiver (DGR) contains a large RAM to store the test vectors, an address sequencer for implementing simple testing loops, and a flexible set of drivers/receivers for the device-under-test (DUT) pins. A prototype design has been fabricated in 3-/spl mu/m CMOS double-level-metal technology, and contains 65 K transistors in a 9.2/spl times/7.9-mm/SUP 2/ die. A minimum operating cycle time of 90 ns (11 MHz), and a power dissipation of 300 mW was obtained for 5-V operation. A 2-/spl mu/m version of this design, just a shrink of the original chip, has been fabricated and operates over 16 megavector/s.