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Amorphous oxide semiconductor transistors control the illuminance of pixels in an ecosystem of displays from large-screen TVs to wearable devices. To satisfy application-specific requirements, oxide semiconductor transistors of various cation compositions have been explored. However, a comprehensive study has not been carried out where the influence of cation composition, oxygen, and hydrogen on device characteristics and stability is systematically quantified, using commercial-grade process technology. In this study, we fabricate self-aligned top-gate structure thin-film transistors with three oxide semiconductor materials, InGaZnO (In/Ga/Zn = 1:1:1), In-rich InGaZnO, and InZnO, having mobility values of 10, 27, and 40 cm

The structural, chemical, and electrical properties of amorphous indium gallium zinc oxide (a-IGZO) films by magnetron sputtering and atomic layer deposition (ALD) were investigated where both a-IGZO films had a comparable cation composition. The ALD-derived a-IGZO film exhibited the higher atomic packing density, the effective suppression of trap-like oxygen vacancy defect (VO), and the enhancement in the hybridization of the sp orbital of In, Ga, and Zn cations compared to those of the sputtered a-IGZO film. Hence, a significant improvement in terms of the field-effect mobility was observed for the thin-film transistors with an In0.50Ga0.34Zn0.16O channel by ALD (36.6 cm $^{\textsf {2}}/\text{V}\cdot \text{s}$ ) compared to that of the sputtered In0.48Ga0.38Zn0.14O transistor (20.1 cm $^{\textsf {2}}/\text{V}\cdot \text{s}$ ); the ${I}_{\text {ON/OFF}}$ ratios for both were ~107. Simultaneously, the gate bias stress stability and photobias stress stability were also improved for the IGZO transistors with an ALD-derived channel, which can be explained by its reduced trap-like VO density.

The electrical properties and the device reliability under positive/negative bias stress with/without illumination regarding amorphous indium gallium zinc oxide (a-IGZO) thin-film transistors (TFTs) are evaluated as a function of the nitrogen partial pressure in the sputter deposition. Interestingly, it is easy to control the carrier concentration through the incorporation of nitrogen into IGZO, whereby the device performance is changed. In addition, when nitrogen is introduced during the conventional IGZO deposition, the device reliability of N-doped IGZO TFTs is considerably improved compared to that of undoped-IGZO TFTs due to the reduced amount of defects. It is also interesting that such an improvement of the device reliability regarding IGZO is easily obtainable through the simple addition of nitrogen to the conventional deposition process. It is, therefore, strongly believed that this simple nitrogen-doping process for IGZO is very effective regarding the achievement of highly durable devices, and it can be immediately applied to the current mass production of the high-performance displays for which the oxide semiconductor is used.

This letter reports the fabrication of high-performance amorphous indium gallium zinc oxide (a-IGZO) thin-film transistors (TFTs) via atomic layer deposition at a substrate temperature of 250 °C. The film thickness of In2O3, Ga2O3, and ZnO varied linearly with the number of deposition cycles. The cation composition of the IGZO film was controlled by an alternate stacking of In2O3, Ga2O3, and ZnO atomic layers. The fabricated a-IGZO TFTs exhibited a high electron mobility of 22.1 cm2/Vs, threshold voltage of 2.41 V, subthreshold gate swing of 0.30 V/decade, and an ${I}_{{ \mathrm{\scriptscriptstyle ON}}/{ \mathrm{\scriptscriptstyle OFF}}}$ ratio of $> \textsf {1} \times \textsf {10}^{\textsf {8}}$ .

This paper proposes a new defect engineering concept for low-cost In- and Ga-free zinc tin oxide (ZTO) thin-film transistors (TFTs). This concept is comprised of capping ZTO films with tantalum (Ta) and a subsequent modest thermal annealing treatment at 200 °C. The Ta-capped ZTO TFTs exhibited a remarkably high carrier mobility of 70.8 cm2/Vs, low subthreshold gate swing of 0.18 V/decade, threshold voltage of −1.3 V, and excellent ION/OFF ratio of 2 × 108. The improvement (> two-fold) in the carrier mobility compared to the uncapped ZTO TFT can be attributed to the effective reduction of the number of adverse tailing trap states, such as hydroxyl groups or oxygen interstitial defects, which stems from the scavenging effect of the Ta capping layer on the ZTO channel layer. Furthermore, the Ta-capped ZTO TFTs showed excellent positive and negative gate bias stress stabilities.

Decomposition of the positive gate-bias temperature stress (PBTS)-induced instability into contributions of distinct mechanisms is experimentally demonstrated in top-gate self-aligned coplanar amorphous InGaZnO thin-film transistors and validated by reproducing the PBTS time-evolution of I-V characteristics through the TCAD simulation into which the extracted density-of-states and charge trapping are incorporated.

An internal compensation type OLED display with high mobility oxide TFT is presented. The pixel circuit for self-compensation of threshold voltage variation and the integrated gate drivers (GIP) were fabricated using coplanar-structure oxide TFTs on both glass and PI substrates. The 5.5-in. FHD display panels show marked uniformity and durability to image sticking with compensation. The circuits have sufficient stability during operation at 60oC for over 1,000 hours.

We propose an experimental method to decompose the positive gate-bias stress (PBS)-induced threshold voltage shift ( $\Delta {V}_{\mathsf {th}})$ of amorphous InGaZnO (a-IGZO) thin-film transistors (TFTs) into the contributions of distinct degradation mechanisms. Top-gate self-aligned coplanar structure TFTs are used for this letter. Stress-time-divided measurements, which combine the subgap density-of-states (DOS) extraction and the analysis on recovery characteristics, are performed to separate the $\Delta {V}_{\mathsf {th}}$ components. Change in excess oxygen ( $\text{O}_{\mathsf {ex}})$ -related DOS is clearly observed, and $\Delta {V}_{\mathsf {th}}$ by PBS is quantitatively decomposed into the contributions of the active $\text{O}_{\mathsf {ex}}$ , and the deep and shallow gate insulator traps. The quantitative decomposition of PBS-induced $\Delta {V}_{\mathsf {th}}$ provides physical insight and key guidelines for PBS stability optimization of a-IGZO TFTs.

Over last 20 years, the evolution of display has been occurred rapidly to change our life style. Nowadays we could get any information at any time and any place through various forms of displays such as smart phones, pads, laptops and TV sets. It would be interesting to see the displays are changing forms to fit into our life style and meet our interests or convenience. Transparent, rollable and foldable displays would be the typical example of the transition. To meet the speed of transition, many new technologies have been applied and no one would deny the OLED has been leading the change of display technology and contributing to the change of life style. Furthermore, the fact that the OLED could control its properties of light emitted from each pixel of display would be another change of display to the new application for healthcare. In this talk, I’d like to mainly touch the OLED technology, its merits and development direction

Decomposition of the positive gate-bias temperature stress (PBTS)-induced instability into contributions of distinct mechanisms is experimentally demonstrated at several temperatures in top-gate self-aligned coplanar amorphous InGaZnO thin-film transistors by combining the stress-time-divided measurements and the subgap density-of-states (DOS) extraction. It is found that the PBTS-induced threshold voltage shift (ΔVT) consists of three mechanisms: (1) increase of DOS due to excess oxygen in the active region; (2) shallow; and (3) deep charge trapping in the gate insulator components. Corresponding activation energy is 0.75, 0.4, and 0.9 eV, respectively. The increase of DOS is physically identified as the electron-capture by peroxide. Proposed decomposition is validated by reproducing the PBTS time-evolution of I–V characteristics through the technology computer-aided design simulation into which the extracted DOS and charge trapping are incorporated. It is also found that the quantitative decomposition of PBTS-induce ΔVT accompanied with the multiple stretched-exponential models enables an effective assessment of the complex degradation nature of multiple PBTS physical processes occurring simultaneously. Our results can be easily applied universally to any device with any stress conditions, along with guidelines for process optimization efforts toward ultimate PBTS stability.

Analysis on the light influx into a bottom-gate, etch-stopper structure thin-film transistor is presented. Reduction of the light influx by means of structural changes in the device can lead to a universal improvement in negative-bias temperature illumination stress instability of metal–oxide transistors. When the devices are illuminated by a fixed light source from below, the dominant light influx occurs in the channel-width direction, due to light reflections off the boundary between the passivation layer and the ambient. Wave propagation into the channel can be suppressed by using thinner dielectric layers or applying an overlying coating layer with a larger refractive index than that of the passivation dielectric material.

We investigate the effect of crystalline indium–gallium–zinc-oxide (c-IGZO) thin films on device performance, and evaluate the device reliability of c-IGZO under positive/negative bias stress with/without illumination. The crystal structure of deposited-IGZO thin film is controlled by annealing temperatures, and the transition from an amorphous to a crystalline structure is observed at above 800 °C. Even though the c-IGZO thin-film transistors (TFTs) exhibit lower carrier mobility, compared with amorphous IGZO (a-IGZO) TFTs, the remarkable improvement of the device reliability for the c-IGZO TFTs is observed especially under the bias stress with illumination. This comes from lower defect density compared with the a-IGZO film.

IGZO thin films were crystallized by annealing with the aim of a high device performance. The electrical properties and reliability under various stress conditions of crystalline-IGZO (c-IGZO) TFTs were investigated, compared to conventional amorphous-IGZO (a-IGZO). In addition, effects of IGZO thickness on the electrical properties of c-IGZO were also studied.

We improve the PBTS instability of top-gate coplanar amorphous InGaZnO TFTs by optimizing the buffer and gate insulator layers. The interface trap density is obtained from photonic capacitance-voltage measurements and correlated with PBTS characteristics. Inter-diffusion at the gate insulator interface lessens electron trap defects, which brings improvement in PBTS from ΔVth = 4.2 V to 0.5 V.

The gate driver circuits using the a-Si TFT and oxide TFT are reviewed. Based on the analysis of the failure behavior of a shift register circuit, various schematics designed for enhanced stability are given with the introduction of clamping voltage as a measure of the degradation of a circuit. For embedding oxide TFT circuits, the scheme for applying offset bias is suggested and its effect on stability is described. Finally, practical issues such as the circuits for smaller area and the optimum design in a confined area for better performance is discussed.

This paper examined the effects of postdeposition annealing on the electrical properties of titanium-capped (TC) indium–zinc oxide (IZO) films and their IZO thin-film transistors. The TC IZO transistor oxidized at the temperature of 300 °C exhibited a high field-effect mobility of 61.0 cm $^{2}$ /Vs, low subthreshold gate swing of 110 mV/decade, $V_{\rm th}$ of −0.4 V, and high $I_{{\mathrm{{\scriptscriptstyle ON}}/\mathrm{{\scriptscriptstyle OFF}}}}$ ratio of $2.3 \times 10^{8}$ . In addition, the positive gate bias stress-induced stability of the TC IZO transistor was better than that of the control device without metal capping treatment. This was attributed to the scavenging effect of the loosely bonded oxygen species in the IZO semiconductor by titanium thermal oxidation.

In this paper, we investigated the high mobility InGaSnO TFTs with self-aligned source/drain regions (n+−IGTO) formed by wet etch process. We compared the electrical characteristics of n+−IGTO formed by dry-etch and wet-etch. The resistivity and thermal stability of n+−IGTO by wet-etch was comparable to the conventional dry-etch, 5.3x10-3Ω·cm and 109%. The proposed IGTO TFTs exhibited high mobility of ∼20cm2/Vs, 0.47V of Vth uniformity on Gen.2 and 0.9V of PBTS 1hr reliability.

A sub-bandgap optoelectronic differential ideality factor technique is proposed for extraction of the intrinsic density-of-states (DOS) over the bandgap in amorphous semiconductor thin-film transistors (TFTs). In the proposed technique, the gate bias-dependent differential change in the difference of ideality factors (dAη(V GS )/dV GS ) between dark and sub-bandgap photonic excitation condition is employed. With the sub-bandgap photons (hν

Flexible top-gate amorphous InGaZnO thin-film transistors are fabricated on polyimide substrates. The effect of the alumina buffer layers on the device performance and stability is demonstrated using two types of atomic layer deposition reactant sources: 1) ozone and 2) water. Alumina buffers formed by water reactants have better barrier properties against the ambient than those formed by ozone. Furthermore, less charge trapping at sub-gap density-of-states occurs with higher film density of the buffer layer. Stability characteristics under negative bias temperature stress are enhanced by optimization of the buffer layer formation on flexible substrates.

This paper examined the morphological, structural, and electrical properties of thermal titanium oxide (TiOx) films as a function of the physical thickness. All the thermal TiOx films were assigned to a TiO2 chemical state irrespective of the film thickness. The thinner TiO2 films (≤ 5 nm) showed an amorphous phase, whereas the thicker TiO2 film (≥ 7 nm) had a nanocrystalline structure. This intriguing thickness-dependent crystallization behavior can be explained by the dimensional effect. The mobility of the resulting zinc tin oxide (ZTO) thin-film transistors (TFTs) with a gate-stack of silicon nitride (SiNx) and TiO2/SiNx was monotonously reduced with increasing TiO2 film thickness, which can be attributed to the enhanced Columbic scattering effect of TiO2 films. On the other hand, the negative bias illumination stress instability of the ZTO TFTs can be suppressed significantly to -2.4 V by the adoption of a 5-nm-thick TiO2 film compared with that (-14.4 V) of the ZTO device without a TiO2 film, which is discussed based on the valence band-off structure and the amorphous nature of thermal TiO2 films.

Advanced structures of oxide TFT have been studied for various display applications. Oxide TFT with etch-stopped layer has shown excellent uniformity and stability for display products. For mass production with low cost, however, back channel etched structure with/without titanium etch-stopped one has been studied and demonstrated promising electrical properties comparable to etch stop structure. Furthermore, we have developed self-aligned coplanar structure as one of ways to minimize parasitic capacitance and found excellent electrical properties and bias stability at 6 μm of channel length, which is demonstrated with 13.3 inch AMOLED.

In this study, we have successfully demonstrated a 6-inch video graphics array (VGA) electrophoretic display (EPD) driven by the all-solution-processed organic thin-film transistors (OTFTs) with industrially applicable sputtering copper electrodes. Except for the sputtering electrodes, all layers of EPD’s backplane were processed via solution processing of organic materials. The all-solution-processed OTFTs with sputtering electrode of copper represent the average field-effect mobility of 0.34cm2/Vs, a threshold voltage of -6.2V, a subthreshold gate swing of 2.3V/dec, and an on-to-off current ratio of ~105. The electrical characteristics of the OTFTs are considerably sufficient for EPD operation, and representing clear operating images.

We proposed the fabrication of Li–Zn–Sn–O (LZTO) thin film transistors (TFTs) using a magnetron co-sputtering method. To analyze the effects of Li incorporation on the amorphous LZTO TFTs, Hall measurement and X-ray photoelectron spectroscopy were performed. It was found that the increased addition of Li to the ZTO system caused the suppression of carrier creation. At an optimized condition (~ 12 at.% Li) for LZTO TFTs, we achieved a saturation mobility of ~ 10.4 cm2/V s, a subthreshold voltage of 0.25 V/decade, a threshold voltage (Vth) of 3.9 V, and an Ion/off ratio of 2 × 108. Furthermore, the optimized device exhibited much better photo-bias stability (ΔVth = − 3.3 V) than the reference ZTO device (ΔVth = − 10.8 V) under the negative bias illumination stress condition.

We demonstrate top-gate and bottom-gate structures of amorphous indium-gallium-zinc-oxide thin-film transistors and compare their device operation. A replica material stack is fabricated for depth profile characterization to correlate with device results. We mainly focus on the oxygen content at the top and bottom. Key process factors that affect device reliability are determined based on material analysis, subgap density-of-states extraction by monochromatic photonic capacitance-voltage technique, and device simulations. We found that top-gate devices are influenced by higher deep acceptor-like states under positive gate bias-temperature stress, whereas the bottom-gate devices suffer reliability degradation under negative gate bias-temperature stress due to the decrease in oxygen content at the bottom interface.

In this study an experimental research has been conducted to reduce NOx and smoke emission from diesel engine exhaust gas simultaneously by application of corona discharge type electrostatic precipitator(ESP). The ESP was installed between exhaust gas silencer and outlet terminal of exhaust gas system. The operating conditions as input parameters taken in this experiment were corona power input, gas velocity and equivalence ratio of gas. It was found that the corona discharge type ESP has notable effect on reducing smoke in exhaust gas but appeared to bring slight effect on reducing NOx.

Changes in the carrier mobility of tensile strained Si and SiGe nanowires (NWs) were examined using an electrical push-to-pull device (E-PTP, Hysitron). The changes were found to be closely related to the chemical structure at the surface, likely defect states. As tensile strain is increased, the resistivity of SiGe NWs deceases in a linear manner. However, the corresponding values for Si NWs increased with increasing tensile strain, which is closely related to broken bonds induced by defects at the NW surface. Broken bonds at the surface, which communicate with the defect state of Si are critically altered when Ge is incorporated in Si NW. In addition, the number of defects could be significantly decreased in Si NWs by incorporating a surface passivated Al2O3 layer, which removes broken bonds, resulting in a proportional decrease in the resistivity of Si NWs with increasing strain. Moreover, the presence of a passivation layer dramatically increases the extent of fracture strain in NWs, and a significant enhancement in mobility of about 2.6 times was observed for a tensile strain of 5.7%.

Oxide TFTs are becoming the mainstream backplane technology for high-resolution large screen displays, while LTPS TFTs are mostly used for high-end portable smart devices. Recent developments in oxide TFTs show high mobility exceeding 50 cm2/V·s, good stability characteristics comparable to LTPS, and integration on plastic substrates for a large range of flexible applications. With these technological advances, oxide TFTs can become a universal backplane solution for LCD and OLED displays.

Unique nanowire growth was accomplished at 575 °C by the metal-induced growth (MIG) method. This involved a spontaneous reaction between metal and Si. The deposited metal worked as a catalyst layer to grow nanowires in the solid state. Various metals (Ni, Co, and Pd) were used in MIG nanowire fabrication, and the Ni-induced case was successful in demonstrating that metal species should be the dominant factor for growing nanowires. The Ni to Si composition was studied by energy dispersive spectroscopy showing the Ni diffusion inside the nanowire as well as the Ni silicide layer. The practical application of the MIG nanowire was proved by fabricating nanoscale contacts.

We report a novel technique for simultaneous extraction of subgap donor- and acceptor-like density of states [gD(E) and gA(E)] over the subgap energy range (EV

Buffer layers on flexible substrates have strongly affected to electrical performance and instability in oxide TFTs. The oxide TFT on proper buffer layer/PI substrate showed better electrical performance than that on other buffer layers because the buffer layer with high gas diffusion barrier properties can suppress to generate defect states in semiconductor and/or interface from hydrogen and water penetration. The origins of flexible oxide TFT instabilities were systematically investigated by using in-situ/ex-situ measurement and chemical/physical analysis.

This letter examined the insertion effect of thermal TiO2 films on the device performance and photo-bias instability of zinc tin oxide (ZTO) thin-film transistors (TFTs). A 5.0-nm-thick TiOx device inserted at the ZTO/silicon nitride (SiNx) interface exhibited slightly lower mobility (9.4 cm2/V·s ) compared with that (14.1 cm2/V·s ) of the reference device with a ZTO/SiNx stack. On the other hand, the negative gate-bias-illumination-stress-induced instability of the TiOx-inserted device was strongly suppressed from 11.0 V (reference device) to 3.0 V. This was attributed to the increase in valence band offset between TiOx and ZTO films, leading to the diminished injection of photo-induced hole carriers into the underlying SiNx bulk region.

We report a technique for extraction of the intrinsic subgap density of states (gA,int(E)) by deembedding the parasitic capacitance in amorphous indium-gallium-zinc-oxide TFTs through the optical charge pumping method. As structure-dependent parameters in the proposed extraction technique, the overlap length LOV between the source/drain (S/D) and the active layer and the parasitic overlap area between the gate and the S/D metal (Cpar,S/Cpar,D) are considered under dark and subbandgap photonic states. We obtained gA,int(E) as a superposition of the exponential deep and tail states with NTA,int = 6.0 × 1016 eV-1·cm-3, kTTA,int = 0.16 eV,NDA,int = 1.8 × 1015 eV-1 · cm-3, and kTDA,int = 1.9 eV from samples with various parasitic areas.

The effect of benzotriazole (BTA) on copper electroplating for ultra large-scale integrated circuits interconnection was investigated. BTA exhibited both strong suppressing and brightening effects by modifying the nucleation and growth steps. Electroplating in the presence of BTA followed a random deposition mechanism rather than a selective or preferential deposition mechanism. As a result, the crystal orientation intensity and mean aggregates size of the electroplated copper with BTA were much smaller than those of BTA-free, which resulted in an increase in resistivity. The increased resistivity of the electroplated copper in the presence of BTA was recovered to approximately 2 μΩ-cm through annealing at 400 °C in a nitrogen atmosphere by grain growth and recrystallization. The amounts of carbon and nitrogen impurities from the BTA were below the detection limit of Auger electron spectroscopy.

Amorphous InGaZnO4 (a-IGZO) thin film transistors (TFTs) are promising devices in backplane technology. Since a-IGZO TFTs are very sensitive to the fabrication processes, they need stable process to keep their initial deposition properties. Herein we improved the stability of a-IGZO by applying N2O plasma. The stability characteristic of a-IGZO TFT was improved with N2O plasma. Vth shift was 1.5V for 10,000s under NBTS with illumination which was the best result in the world.

Tuning the process pressure at the deposition of the passivation layers has been suggested in the way of controlling the threshold voltage of a-IGZO TFTs, making it possible to employ gate driver integration. It has showed that Vth linearly changes with the pressure ΔVth/ΔPressure∼3.5V/100Pa. A 3.2 inch WVGA AMLCD with integrated gate driver circuits were successfully demonstrated using the enhancement mode BCE type bottom gate a-IGZO TFTs.

A new shift register employing bottom-gate In-Ga-Zn-O thin-film transistors (IGZO TFTs) was proposed and fabricated. Depletion-mode IGZO TFTs were successfully turned off by employing two low-voltage-level signals. The IGZO shift register exhibited a high-voltage output pulse without any distortion and a maximum clock frequency of 417 kHz. The proposed shift register would be an important building block for a depletion-mode oxide TFT display.