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In an increasingly interconnected world, the demand for smartphones, tablets, and other wireless devices in the IoT has surged over the last few years. This high demand has increased mobile data usage and wireless communication, resulting in an explosion of traffic demand in the limited 2.4 GHz frequency band. This traffic demand and the limitations of existing wireless devices operating in the same frequency range have resulted in a spectrum congestion problem. To utilize the available spectrum more efficiently, it becomes important to detect the desired signals and support flexible communications. After reviewing relevant characteristics of the protocols of interest, this article introduces a new approach for spectrum sharing with a hardware implementation to support the coexistence of WiFi, LTE, and ZigBee in the congested 2.4 GHz band using a single RF front-end. A detection method was developed to resample the preambles of both WiFi and ZigBee to the LTE sampling rate to avoid continuous resampling of the received signal. Further processing steps such as synchronization and demodulation for each protocol are described. Measurement results are provided to demonstrate the techniques showing a low symbol error rate tested over the air in a laboratory environment with interference.

Massive Multiple In and Multiple Out (MIMO) is being used in the fifth generation of wireless communication systems. As the number of antennas increases, the computational complexity grows dramatically, and this involves matrix calculations with complex numbers. We have designed and implemented a general matrix arithmetic processor to accelerate these calculations, including matrix multiplication, Singular Value Decomposition (SVD), and QR decomposition, on an FPGA. The design can be implemented in fixed-point or single-precision floating-point depending on the requirements of the application. The system behavior can be controlled by instructions such as elementary multiplication, rotation and vector projection, which allows the system to work as a coprocessor in a baseband System on a Chip (SoC). Latency for changing from one matrix computation to another is just a few clock cycles, providing the low latency required for edge processing. The design is implemented and verified on the Xilinx RFSoC development board using fixed point and single precision floating point numbers and matrix sizes of 8 × 8 and 16 × 16.

The insulation monitoring device is an important equipment in the station power supply system, which monitors the insulation of DC circuit in real time during operation. In order to fully grasp the performance of the insulation monitoring device of the DC power supply system in the substation, this paper carries out spot check test on 16 typical products of ten companies, and makes a comparative analysis. The test results show that the basic function of insulation monitoring and the function of grounding line selection of each product meet the requirements. However, the functions of the old models are not complete, and there are basically no AC and DC voltage intrusion alarm, voltage balance, ground capacitance detection and other practical functions, which affect the reliable operation of the station DC power system. It should be updated and reformed in time. By comparison, the new model products have more functions and the overall performance is obviously better than the old model products. The test products of different companies have their own characteristics and shortcomings. It is suggested to further improve the performance of the products to provide reliable equipment support for the station power system.

Strigolactones (SLs) are vital rhizosphere signals that act as phytohormones modulating plant root growth and development. After treatment for 12 days, the synthetic SLs analog GR24 significantly increased the number and density of fine root. The data indicated that different concentrations of GR24 exerted opposite effects on lateral root (LR) initiation. High concentration (10 μM) of GR24, similar to 10 μM TIS108 (a triazole-type inhibitor of SLs), acted as a positive regulator for LR initiation, whereas the treatment with a low concentration (0.1 μM) of GR24 markedly reduced LR density. In addition, root length and surface area were markedly increased by the treatment with 10 μΜ GR24, compared with those of the controls. In root samples treated with 0.1 μM GR24, 10 μM GR24, and 10 μM TIS108, 4534, 5022, and 3803 differentially expressed genes (DEGs) were identified compared to the control, respectively. The results of RNA-Seq highlighted several DEGs, such as ARF, EBF, ERF, CYCA1, and LOB, which play critical roles in hormone signaling, cell cycle, and root growth and development in grapevines. UPLC-MS analysis further demonstrated that SLs application remarkably altered the levels of endogenous hormones. In particular, indole-3-acetic acid (IAA) content in grapevine roots treated with 10 μΜ TIS108 was approximately 4.78 times higher than that in the control, whereas it was the opposite following the 0.1 μΜ or 10 μΜ GR24 treatment. Our study provides the first comprehensive description of the effect of SLs on grapevine root development caused by interacting with other phytohormone signaling, and lays a solid theoretical basis for using SLs to regulate root growth and development in grapevines.

Strigolactones (SLs) are new phytohormones that modulate plant root growth and development. Rootstocks affect horticulturally important traits of cultivars, including tree size, abiotic stress tolerance, and disease resistance. This study focused on understanding the effects of SLs on the transcriptional regulation and root system architecture of cherry rootstock. Here, we examined the morphology and profiled endogenous hormone levels, and transcript levels of key genes from the roots treated with synthetic SLs analog GR24 or SLs inhibitor TIS108. Cherry rootstock plantlets treated with 10 μM TIS108 exhibited fewer adventitious roots (AR). The diameter of AR at 5, 10, and 30 days after 0.1 μM GR24 treatment decreased by 23.8, 23.2, and 11.5 %, respectively, whereas AR diameter was 1.15, 1.15, and 1.16 times higher than that in the control when 10 μM TIS108 was applied, respectively. The LR number in plantlets treated with 10 μM TIS108 reached a maximum of 11.25 for each AR, much higher than those of the control and other treatments at 30 days after treatment (DAT). X-ray micro-CT scanning also showed that the treatment with 10 μM TIS108 markedly induced LR initiation but suppressed LR elongation. Furthermore, 2946, 1536, and 2146 differentially expressed genes (DEGs; p-value 1) were identified in the root samples treated with 0.1 μM GR24, 10 μM GR24, and 10 μM TIS108, respectively, compared to the control. RNA-Seq findings highlighted several DEGs, such as ARF, PP2C, ERF, LOB, and CYC, which play critical roles in hormone signaling, cell cycle, and root growth and development. UPLC-MS analysis further demonstrated that SLs markedly altered the levels of endogenous hormones in cherry rootstock. In particular, the content of endogenous indole-3-acetic acid (IAA) markedly increased by 64.6, 52.1, and 173.5 % after treatment with 0.1 μM GR24, 10 μM GR24, and 10 μM TIS108, respectively. Overall, our study indicates that SLs affect root system architecture by interacting with other plant hormones, which provides a solid theoretical basis for the effects of SLs on the root system architecture of other woody plants.

Field Programmable Gate Arrays (FPGAs) are widely used in wireless networking transceivers, however they typically are designed to process one specific wireless protocol. Our research group is investigating how to make FPGA designs more versatile. In this paper, we present an FPGA design that can receive either Wi-Fi or LTE signals by determining which signal is being received, and then applying the appropriate processing. We initially receive all signals at a 30.72 MHz sampling rate, an underlying sampling rate for LTE. A unique matched filter is designed that allows us to detect the Wi-Fi preamble at this rate despite the fact that it is transmitted at 20MHz. Results show that we can successfully distinguish between the two signals and further decode received packets by switching to the appropriate sampling rate after the type of signal has been detected.

The surge in smart phones, tablets, and other wireless electronics has drastically increased data usage and wireless communication, creating massive traffic spectrum demand. Congestion is mainly due to inefficient use of spectrum, rather than spectrum scarcity. Spectrum coexistence schemes provide opportunities for efficient use of the spectrum. Furthermore, software-defined hardware reconfiguration after signal detection can be completed to reduce the power consumption of adaptive analog/RF front ends. In this paper, we propose a Wi-Fi and LTE protocol coexistence architecture, and present its implementation using a Xilinx evaluation board and ADI RF front end.

Field Programmable Gate Arrays (FPGAs) provide great flexibility and speed in Software Defined Radio (SDR). However, as a mobile wireless protocol, the LTE system needs to maintain coding procedures for different channels, and the hardware’s implementation is more complex than other wireless local area network (WLAN) specifications. Thus a compact and resource reusable LTE channel coder is needed as hardware resources and speed are the main pain points in SDR implementation. Traditional FPGA design and synthesis only focus on low levels of resource reuse, and IPs are independently designed without considering the whole system, which causes resource waste. In this paper, we describe a LTE downlink channel encoder processing chain implemented in FPGA hardware. Reuse in the whole system is done at a channel level and above, and scarce resources like BRAM are shared between processing units to maximize reuse. The system can efficiently process data and control channel signals at the same time using the same hardware. For the data channel, we use cross-component optimization to reduce the usage of BRAMs up to 25% for high volume data buffering. A novel rate matching design reduces the latency which improves the performance. By applying high-level reuse, the cross-component design can reduce resource usage while maintaining a good processing speed.

The multi-objective reconfiguration model, considering the losses, the compositive voltage deviation and the system reliability, is developed in this paper. The NSGA-II method is applied to solve the model. In the decoding process, the random spanning tree strategy is adopted to avert the emergency of unfeasible solution; in the selection process, any two individuals are compared based on their rank values and crowding distances. In addition, the elitism strategy is also used to make sure that the good individuals in father population can be remained in the evolution process. The results demonstrate the validity and efficiency of the proposed model and algorithm.