Search

In this paper, we propose a new type of tri-input tunneling field-effect transistor (Ti-TFET) that can compactly realize the “Majority-Not” logic function with a single transistor. It features an ingenious T-shaped channel and three independent-biasing gates deposited and patterned on its left, right, and upper sides, which greatly enhance the electrostatic control ability between any two gates of all the three gates on the device channel and thus increase its turn-on current. The total current density and energy band distribution in different biasing conditions are analyzed in detail by TCAD simulations. The turn-on current, leakage current, and ratio of turn-on/off current are optimized by choosing appropriate work function and body thickness. TCAD simulation results verify the expected characteristics of the proposed Ti-TFETs in different working states. Ti-TFETs can flexibly be used to implement a logic circuit with a compact style and thus reduce the number of transistors and stack height of the circuits. It provides a new technique to reduce the chip area and power consumption by saving the number of transistors.

In this paper, a frequency estimation method based on complex correlation is proposed with TIADC (time-interleaved ADC) theory. Firstly, received signal is processed by amplification, filter, and quadrature demodulation. Then, TIADC is adopted to data acquisition, and parallel operation of complex correlation is used to deal with complex signal. Finally, signal frequency is acquired with phase angle obtained by arctangent function. Also, the detailed implementation and testification with FPGA are presented. The testification results show that the method can not only reduce time of frequency calculation, but also improve estimation precision with strong anti-interference performance.

The Keccak hash function is the winner of SHA-3 competition. By analyzing the permutation functions linearity of SHA-3 algorithm. On the basis of the present distinguish attacks on reduced versions and zero-sum property of the permutation. In this paper a new method proposed that enhanced CP-Kernel character of SHA-3 algorithm to improve security. The design is simulated by Modelsim SE tool and the results show the encryption process has correct performance and significant property of anti-distinguish attack.

Polarity optimization for mixed polarity Reed-Muller (MPRM) circuits is a combinatorial issue. Based on the study on discrete particle swarm optimization (DPSO) and mixed polarity, the corresponding relation between particle and mixed polarity is established, and the delay-area trade-off of large-scale MPRM circuits is proposed. Firstly, mutation operation and elitist strategy in genetic algorithm are incorporated into DPSO to further develop a hybrid DPSO (HDPSO). Then the best polarity for delay and area trade-off is searched for large-scale MPRM circuits by combining the HDPSO and a delay estimation model. Finally, the proposed algorithm is testified by MCNC Benchmarks. Experimental results show that HDPSO achieves a better convergence than DPSO in terms of search capability for large-scale MPRM circuits.