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MSK is often used in communication, but most of them are for detailed inference. In order to study the digital realization of minimum frequency shift keying (MSK) and its principle. It is analyzed according to the principle of digital up-conversion (DUC), digital down-conversion (DDC) and filtering technology, and verified by simulation with MATLAB. Finally, it is realized by Verlig HDL language on FPGA (Field-Programmable Gate Array), and the feasibility and system parameters of the scheme are determined.

In order to meet the high-speed and reliable data transmission requirements in high-speed signal acquisition and playback systems, a high-speed data interaction system based on FPGA-based PCIe interface and Gigabit Ethernet interface is designed. The system combines the high-speed data transmission capabilities of PCIe interface and flexible port expansion capabilities of Gigabit Ethernet. It uses FPGA as the core controller and builds control logic based on the UDP protocol to realize data interaction between PCIe and Gigabit Ethernet. This article mainly introduces PCIe communication block, Gigabit Ethernet communication block and the specific implementation plan of the data transmission process, and proposes a bidirectional dislocation cache transceiver mechanism based on ping-pong operation to ensure the reliability of data transmission and increase the data transmission rate. The test result shows that the data conversion result of this design is accurate and reliable, and has obvious advantages in the transmission rate, which is close to the ideal value of 950Mb/s, which can be applied to various high-speed data transmission occasions.