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This paper examines the feasibility of using commercial out-of-the-box reconfigurable field programmable gate array (FPGA) technology and the open computing language (OpenCL) framework to create an efficient Sobel edge-detection implementation, which is considered a fundamental aspect of image and video processing. This implementation enhances speedup and energy consumption attributes when compared to general single-core processors. We created the proposed approach at a high level of abstraction and executed it on a high commodity Intel FPGA platform (an Intel De5-net device was used). This approach was designed in a manner that allows the high-level compiler/synthesis tool to manipulate a task-parallelism model. The most promising FPGA and conventional implementations were compared to their single-core CPU software equivalents. For these comparisons, local-memory, pipelining, loop unrolling, vectorization, internal channel mechanisms, and memory coalescing were manipulated to provide a much more effective hardware design. The run-time and power consumption attributes were estimated for each implementation, resulting in up to 37-fold improvement of the execution/transfer time and up to a 53-fold improvement in energy consumption when compared to a specific single-core CPU-based implementation. [ABSTRACT FROM AUTHOR]

There are enormous numbers of applications that require the use of tracking algorithms to predict the future states of a system according to its previous accumulated states. Thus, many efficient techniques are widely adopted to estimate the future states of a system at every point in time to get the desired performance levels. Kalman filter is a popular and an efficient method for online estimations for linear measurements. Extended Kalman Filter (EKF), on the other hand, is more suited for nonlinear measurements. However, EKF algorithm is well known to be computationally intensive, and may not achieve the strict requirements of real time applications. This issue has motivated researchers to consider the use of parallel processing platforms such as Field Programmable Gate Arrays (FPGAs) and Graphic Processing Units (GPUs) to meet the real time requirements. This paper provides an optimized parallel architecture for EKF using FPGA. Our approach exploits many optimization and parallel techniques such as pipelining, loop unrolling, dataflow, and inlining; and utilizes the inherently parallel architecture nature of FPGAs to accelerate the estimation process. Our experimental analyses show that our optimized implementation of EKF can achieve better results when compared to other implementations using GPU and multicore platforms. Moreover, higher performance levels can be achieved when operating on larger data sizes. This is due to our proposed optimization techniques that we have applied, and the exploited inherent parallelism among EKF operations. [ABSTRACT FROM AUTHOR]

Background: The development process of a new drug should be a subject of continuous evolution and rapid improvement as drugs are essential to treat a wide range of diseases of which many are life-threatening. The advances in technology resulted in a novel track in drug discovery and development known as in silico drug design. The molecular docking phase plays a vital role in in silico drug development process. In this phase, thousands of 3D conformations of both the ligand and receptor are generated and the best conformations that create the most stable drug-receptor complex are determined. The speed in finding accurate and high-quality complexes depends on the efficiency of the search function in the molecular docking procedure., Objective: The objective of this research is to propose and implement a novel hybrid approach called hABCDE to replace the EMC searching part inside the BUDE docking algorithm. This helps in reaching the best solution in a much accelerated time and higher solution quality compared to using the ABC and DE algorithms separately., Methods: In this work, we have employed a new approach of hybridization between the Artificial Bee Colony (ABC) algorithm and the Differential Evolution (DE) algorithm as an alternative searching part of the Bristol University Docking Engine (BUDE) in order to accelerate the search for higher quality solutions. Moreover, the proposed docking approach was implemented on Field Programmable Gate Array (FPGA) parallel platform using Vivado High-Level Synthesis Tool (HLST) in order to optimize and enhance the execution time and overall efficiency. The NDM-1 protein was used as a model receptor in our experiments to demonstrate the efficiency of our approach., Results: The NDM-1 protein was used as a model receptor in our experiments to demonstrate the efficiency of our approach. The results showed that the execution time for the BUDE with the new proposed hybridization approach was improved by 9,236 times., Conclusion: Our novel approach was significantly effective to improve the functionality of docking algorithms (Bristol University Docking Engine (BUDE))., (Copyright© Bentham Science Publishers; For any queries, please email at epub@benthamscience.net.)