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We investigate a fast and facile approach for the simultaneous synthesis and coating of conducting polyaniline (PANI) onto a substrate and the effects of processing conditions on the electrical properties of the fabricated films. Simultaneous polymerizing and depositing on the substrate forms a thin film with the average thickness of 300 nm and sheet resistance of 304 Ω/sq. Deposition conditions such as polymerization time (3–240 min), temperature (−10 to 40 °C), concentrations of monomer and oxidant (0.1–0.9 M), and type of washing solvents (acetone, water, and/or HCl solution) affect the film thickness, doping state, absorption characteristics, and solid-state nanoscale morphology, therefore affecting the electrical conductivity. Among the conditions, the surface-polymerized PANI film deposited at room temperature with acetone washing showed the highest conductivity of 22.2 S/cm. [ABSTRACT FROM AUTHOR]

Graphene has attracted attention due to its excellent electrical properties; however, the electrical performance of graphene devices, including device hysteresis, mobility, and conductivity, tends to be limited by the supporting dielectric layer properties. In this work, the impact of a dielectric material on a graphene transistor was investigated by fabricating graphene field effect transistors integrated with four different dielectric substrates (SiO 2 , Al 2 O 3 , Si 3 N 4 and hexagonal boron nitride) and by comparing the transistor performances. Results revealed that the carrier transport characteristics of the graphene transistors, including the hysteresis, Dirac point shift, and mobility, were highly correlated with the hydrophobicity-induced charge trapping and surface optical phonon energies of the dielectric materials. [ABSTRACT FROM AUTHOR]

We have demonstrated a novel yet simple method for fabricating graphene-based vertical hybrid structures by performing the CVD growth of graphene at an h-BN/Cu interface. Our systematic Raman measurements combined with plasma etching process indicate that a graphene film is grown under exfoliated h-BN rather than on its top surface, and that an h-BN/graphene vertical hybrid structure has been fabricated. Electrical transport measurements of this h-BN/graphene, transferred on SiO 2 , show the carrier mobility up to approximately 2250 cm 2 V −1 s −1 . The developed method would enable the exploration of the possibility of novel hybrid structure integration with two-dimensional material systems. [ABSTRACT FROM AUTHOR]

We propose a modified motion estimation algorithm that is adequate for error localization and temporal error concealment in transmitting videos over unreliable channels. In order to achieve good error concealment performance, the proposed algorithm implicitly imposes spatial correlations on motion vectors by extending the block size and overlapping blocks in motion estimation. Thereby, the obtained motion vectors can be used to improve error concealment performance while keeping the encoding efficiency with negligible overhead. In addition, the proposed motion estimation can provide a new error detection measure so that we can maximally utilize uncorrupted data rather than simply discarding all data in a defected packet. Simulation results show that the proposed motion estimation scheme provides significant improvements in error concealment performance over the existing schemes and improves the bit utility over a wide range of error conditions. [Copyright &y& Elsevier]

A comprehensive review of the fabrication process, fundamental properties and functionalities and device applications of heterogeneously integrated two-dimensional (2D) materials is provided. An extensive library of atomic 2D materials with selectable material properties exists and it is rapidly expanding, with which it is possible to construct hybrid or heterostructures that display novel properties with unique functionalities. Such heterostructures adding a degree of freedom to carriers in the third direction provide interesting possibilities for the design of functional novel devices. The subject of 2D heterostructures has now become so vast that no single article can cover the entire topic in any reasonable manner. This review is intended to bridge the gap between the major developments already discovered and current trends in 2D heterostructures. A comprehensive review of the fabrication process, fundamental properties and functionalities, and device applications of heterogeneously integrated 2D materials is provided. This review is intended to bridge the gap between the major developments already discovered and current trends in 2D heterostructures. This review should be considered complementary to the other review articles, tried to avoid repetition of material already covered, concentrating instead on new results that have arisen in the literature. [ABSTRACT FROM AUTHOR]

Skyrmion-based devices are an attractive candidate for nonvolatile memory and low-power computation. In a real device, however, skyrmions easily annihilate at device edges, which hampers device applications. Here, we present a novel skyrmion-based logic device, which takes advantage of the skyrmion annihilation (SA) and increases the efficiency of logic operation. An SA half adder (HA) is implemented in a ferromagnet/heavy metal nanotrack by introducing a geometric notch that annihilates the skyrmion. In addition, full adder and n-bit SA ripple-carry adder are demonstrated by directly cascading the SA HAs. The prototype of a 32-bit SA ripple-carry adder consumes energy as low as 0.62 pJ per each operation, which is only 18% of the previously proposed skyrmion adder. Our SA logic gate can, therefore, be a promising candidate for the beyond-CMOS logic device. [ABSTRACT FROM AUTHOR]

Abstract: Electronic properties of graphene can be controlled by using elastic strain. Theories predicted two major effects of strain, pseudo-magnetic field and spatially-varying Fermi velocity effects in graphene, but only the former was confirmed by experiments. Here, we report the experimental evidences of the latter, observed in strained graphene weakly coupled to a hexagonal boron nitride (BN) using scanning tunneling microscopy (STM) and spectroscopy (STS). V-shaped STS spectra showed spatially-varying slopes at lines across the strained ridges, whereas they showed constant slopes at lines along the long directions of ridges. The observed slope variations in the former were explained with the reduced Fermi velocity which is linear with the uniaxial strain less than 5% in agreement with theoretical predictions. Spatially-varying Fermi velocity that is controllable by local strain can provide an accessible component for the electronic engineering of graphene. [Copyright &y& Elsevier]