1. Demonstration of a lateral p-NiO/n-GaN JFET fabricated by selective-area regrowth.
- Author
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Qiao, Guang, Yu, Jing, Hao, Lin, Miao, Ailin, Xu, Liang, Zhu, Hong, and Xie, Zili
- Abstract
In this paper, we demonstrated experimentally a lateral GaN-based junction field effect transistor (JFET). A selective area regrowth of p-NiO on the as-grown n-GaN channel layer was developed by magnetron sputtering at room temperature to form the p–n junction. A self-aligned gate process and a post metal annealing process were employed to improve the device performances. The measured results show that the annealed JFET exhibits an ON/OFF ratio exceeding 106 and a higher breakdown voltage up to 814 V without any terminal structure. The breakdown voltage is determined by the reverse breakdown of parasitic PN junction between gate and drain. Further, the threshold voltage of the p-NiO/n-GaN JFET exhibits excellent temperature stability in the range of 300–500 K. [ABSTRACT FROM AUTHOR]
- Published
- 2024
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