93 results on '"Jürgen Ruf"'
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2. Efficient Testing of Different Loop Paths.
3. Efficient Fault Localization During Replay of Embedded Software.
4. Debugger-Based Record Replay and Dynamic Analysis for In-Vehicle Infotainment.
5. More Flexible Object Invariants with Less Specification Overhead.
6. Increasing Software Reliability by Integrating Formal Verification and Robustness Testing.
7. Erkennen von Speicherverletzungen im Testbetrieb von eingebetteter Software.
8. LoCEG: Local Preprocessing in SAT-Solving through Counter-Example Generation.
9. Optimized hybrid verification of embedded software.
10. Scalable and Optimized Hybrid Verification of Embedded Software.
11. A Software Testing Framework to Integrate Formal Verification Results.
12. Beschleunigte Robustheitstests für verhaltensbeschreibende Zustandsmaschinen.
13. Optimized Static Parameter Assignment for Semiformal Software Verification.
14. Scalable hybrid verification for embedded software.
15. Scalable and Extendable Hybrid Verification Platform.
16. State-based Analysis and UML-driven Equivalence Checking for C++ State Machines.
17. Towards assertion-based verification of heterogeneous system designs.
18. Semiformal verification of temporal properties in automotive hardware dependent software.
19. Verification of Temporal Properties in Automotive Embedded Software.
20. Grid Based Fast Falsification For Bounded Property Checking.
21. Semiformal Verification of Temporal Properties in Embedded Software.
22. UML/SysML-Systemanalyse zur Generierung von formalen Verifikationseigenschaften für verschiedene Abstraktionsebenen.
23. Transaction Modeling and RTL Simulation Analysis.
24. Coverage Driven Verification applied to Embedded Software.
25. Monitoring-based Formal Hardware Verification.
26. Automatische Eigenschaftsextraktion auf Systemebene aus SystemC Modellen.
27. Fast falsification based on symbolic bounded property checking.
28. Efficient and Customizable Integration of Temporal Properties.
29. Overlap reduction in symbolic system traversal.
30. Modeling and Formal Verification of Production Automation Systems.
31. Specification and Formal Verification of Temporal Properties of Production Automation Systems.
32. Transactional Level Verification and Coverage Metrics by Means of Symbolic Simulation.
33. Dynamic guiding of bounded property checking.
34. Using Symbolic Simulation for Bounded Property Checking.
35. Bounded Property Checking with Symbolic Simulation.
36. A Visual Approach to Validating System Level Designs.
37. Combination of Simulation and Formal Verification.
38. Customer-Oriented Systems Design through Virtual Prototypes.
39. Simulation-guided property checking based on a multi-valued AR-automata.
40. The simulation semantics of systemC.
41. Data Analysis of Timed Finite State Systems.
42. Analyzing Real-Time Systems.
43. A Toolset for the Symbolic Examination of Finite State Transition Systems.
44. Structured English for Model Checking Specification.
45. Do You Trust Your Model Checker?
46. Checking temporal properties under simulation of executable system descriptions.
47. Modleing and Checking Networks of Communicating Real-Time Process.
48. Modeling Real-Time Systems with I/O-Interval Structures.
49. A Synchronous Language for Modeling and Verifying Real Time and Embedded Systems.
50. Using MTBDDs for Compostion and Model Checking of Real-Time Systems.
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