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Disturbance rejection performance optimization with constraints on robustness for a multivariable process is commonly encountered in industrial control applications. This paper presents the tuning of a multi-loop Proportional Integral (PI) controller method to enhance the performance of load disturbance rejection using evolutionary optimization. The proposed design methodology is formulated to minimize the load disturbance rejection response and the input control energy under the constraints of robust stability. The minimum singular value of multiplicative uncertainty is considered a multi-loop system robust stability indicator. Optimization is performed to achieve the same, or higher level than the most-explored Direct Synthesis (DS) based multi-loop PI controller, which is derived from a conventional criterion. Simulation analysis clearly proved that the proposed multi-loop PI controller tuning method gives better disturbance rejection, and either, the same or a higher level of robust stability when compared to the DS-based multi-loop PI controller. [ABSTRACT FROM AUTHOR]

The buck converter is one of the DC/DC converters that are often used as power supplies and high energy conversion. These controllers are used in electronic devices to regulate the output voltage against change in the input voltage and load current. This leads to the requirement of an efficient control methodology to meet real-time demand. It is found in many works of literature that satisfactory performance in buck converter's dynamic behavior using genetic algorithm controlling techniques, but the appearance of the transient with large overshoots and the ripple output voltage is not focused. The main reason for such a problem is the improper selection of capacitance values. In this work, to address such issues, along with the PID controller gain values and capacitance selection also be considered in multi-objective problems. The optimization is carried out using the NSGA-II and modified NSGA-II algorithm. This paper also presents a comparison of these algorithms' performance in terms of time-domain specifications and ripple voltage. Simulated outputs exhibit that the controller based on MNSGA-II for buck converter gives better performance than NSGA-II-based controller and results compared with the existing wok. The MNSGA–II-based PID controller for buck converted validated in the real-time environment also. [ABSTRACT FROM AUTHOR]

The time delay element present in the PI controller brings dead-time compensation capability and shows improved performance for dead-time processes. However, design of robust time delayed PI controller needs much responsiveness for uncertainty in dead-time processes. Hence in this paper, robustness of time delayed PI controller has been analyzed for First Order plus Dead-Time (FOPDT) process model. The process having dead-time greater than three times of time constant is very sensitive to dead-time variation. A first order filter is introduced to ensure robustness. Furthermore, integral time constant of time delayed PI controller is modified to attain better regulatory performance for the lag-dominant processes. The FOPDT process models are classified into dead-time/lag dominated on the basis of dead-time to time constant ratio. A unified tuning method is developed for processes with a number of dead-time to time constant ratio. Several simulation examples and experimental evaluation are exhibited to show the efficiency of the proposed unified tuning technique. The applicability to the process models other than FOPDT such as high-order, integrating, right half plane zero systems are also demonstrated via simulation examples. [ABSTRACT FROM AUTHOR]

Partial discharge (PD) measurement is used for a diagnosis and performance assessment of the solid insulation material inside the high-voltage (HV) equipment. PD measurement indicates the presence of voids, cracks and imperfection present in solid insulation material. The major problem associated with this measured PD signal is heavily contaminated by noise which results in reduction in PD pattern recognition. The objective of this work is to measure and de-noise the PD signal due to cavity and recognize two different size of cavities present in three different locations, namely near HV electrode, center and lower electrode. In first part, the measured PD signal is de-noised using translation invariant wavelet transform. In second part, the three-dimensional (φ–q–n) PD patterns are extracted from the de-noised PD data. Then, it is subjected to canny edge detection technique, and the features like horizontal and vertical fractal dimension averages are evaluated using fractal image compression-based semi-variance technique. For classification, multi-class nonlinear support vector machine has been proposed to classify position and size of the cavity based on the PD fingerprints. The findings of this proposed work can be used to design a solid basis for an recognition of cavity size and position in an electrical apparatus. [ABSTRACT FROM AUTHOR]