Search

A double synchronous unified virtual oscillator controller (dsUVOC) is proposed for grid-forming voltage source converters to achieve synchronization to the fundamental frequency positive- and negative-sequence components of unbalanced or distorted grids. The proposed controller leverages a positive- and a negative-sequence virtual oscillator, a double-sequence current reference generator, and a double-sequence vector limiter. Under fault conditions, the controller enables to clamp the converter output current below the maximum value limited by the converter hardware while retaining synchronization without a phase-locked-loop (PLL) regardless of the balanced or unbalanced nature of grid faults. Consequently, balanced and unbalanced fault ride-through can be achieved without the need for switching to a back-up controller. The paper presents the systematic development of the double-synchronous structure along with detail design and implementation guidelines. Validation of the proposed controller is provided through extensive control-hardware-in-the-loop (CHIL) and laboratory hardware experiments.

As the number of converter-interfaced distributed energy resources connected to the power system continues to increase rapidly, recent grid codes require these grid-tied converters to maintain grid connection during fault to ensure power supply security and reliability. In this work, we analyze the oscillation in the injected real and reactive power that a grid-tied voltage source converter (VSC) introduces as it attempts to contribute to the power quality and improve the voltage at the point of common coupling (PCC) during an asymmetrical fault. We propose a new double sequence current reference generation method that can be utilized to derive a closed-form quantifiation of the peak value of both the real and reactive power oscillation during asymmetrical fault ride-through (AFRT) analytically. Effect of the resulting bus voltage oscillation and ripple current requirement at twice the grid frequency, corresponding to the real power oscillation, on the input DC bus capacitor and upstream converter is analyzed for facilitating system component sizing. Furthermore, the proposed current reference generation formulation helps control the negative sequence current injection during fault to assist with fault identifiation. The theoretical analysis is validated through simulation in PLECS for both asymmetrical and symmetrical fault scenarios. Experimental results for a three-phase, grid-tied VSC operating under both asymmetrical and symmetrical faults are provided to evaluate the performance of the proposed current reference generation method and validate the analysis presented.

In this work, metal oxide varistor (MOV) design optimization and switching control in the main circuit breaker (MCB) branch of a progressively switched hybrid DC circuit breaker (DCCB) is presented. A progressively switched hybrid DCCB can achieve faster fault isolation with reduced peak fault current magnitude and transient recovery voltage compared to a regular hybrid DCCB due to its modified switching strategy. Consequently, thermal stress on the semiconductor devices in MCB is significantly reduced. Analytical model of the system dynamics during fault isolation with progressive switching is derived to demonstrate the switching scheme’s effect on the energy-absorbing component, MOV, during turn-off process. Derived analytical model in conjunction with the displacement curve of the fast mechanical switch of the hybrid DCCB is utilized to optimize the components of the main circuit breaker branch to reduce MOV degradation through asymmetric energy dissipation. A model of the circuit breaker is built in PSCAD to validate the performance of the proposed optimization method in a 10kV/250A system with four stage progressive switching. Additionally, a low voltage system model at 380V is developed in PLECS for two stage progressive switching that works as the basis of experimental validation. This includes both look up table based MOV model and device thermal model for junction temperature estimation. Experimental results are provided for a 380V system to demonstrate reduced fault current peak in a progressive switching and near uniform energy absorption in optimally selected MOVs

Three-level (TL) dual-active-bridge (DAB) converter serves a critical role in the medium-voltage (MV) solid-state-transformers (SST) in which high voltage rating and bidirectional power flow are required. The regular neutral-point-clamping (NPC) topology is easily subjected to capacitor voltage unbalance due to non-ideal operating conditions. In this paper, a hybrid structure incorporating NPC and flying capacitor (FC) is presented to resolve the voltage unbalance issue. The key advantages include minimal additional hardware efforts and no need to resort to active control. The FC behaves as a buffer to leverage the upper and lower capacitor so that passive voltage balance between the two dc-link capacitors can be achieved on a switching cycle basis. Closed-form analysis further reveals the impact of FC value on voltage unbalance. Moreover, the appropriate modulation scheme, switching condition, and commutation loop are evaluated to provide detailed rule of thumb to the implementation of FC circuit. Analysis shows the FC also brings favorable switching loss performance and is friendly to employ upon fast switching of wide bandgap devices such as SiC. Finally, a 1.6 kV input, 400 V output, 8 kW scaled-down hybrid NPC-FC based DAB converter is built to validate the above analysis.

This article proposes a torque ripple minimization strategy based on minimizing interactive space harmonics of fractional slot permanent magnet (PM) machines using a space-shifted wye-delta stator winding. A radial force analysis has also been carried out which showed a substantial reduction in the second order mode for these space-shifted wye-delta wound machines; this will improve the noise and vibration performance. The effectiveness of the proposed method is shown by analyzing the performances of a low power surface-mounted permanent magnet (SPM) machine for the electric power steering (EPS) applications, and a high power interior permanent magnet (IPM) machines for the hybrid electric vehicle (HEV) applications on the 12-slot/10-pole (12S/10P) configuration. The proposed winding doubles the stator slot number of the base model, and as a result, the base 12S/10P configuration becomes 24-slot/10-pole (24S/10P) combination. Compared with the existing ripple minimization techniques of magnet shaping or rotor skewing, the proposed stator winding based strategy achieves better torque ripple performance and magnet utilization leading to an improvement in average torque while reducing the amplitude of the low order radial force. A 10-pole SPM machine has been built and tested for experimental validation of both the concept and the finite element analysis (FEA) simulation results.

This paper proposes a unique control strategy for a deadbeat multiple vector finite-set model predictive current control with an embedded integral action (MV-FMPC) for permanent magnet synchronous motor drives. Torque ripple and phase current distortions in PMSM drives are minimized with the proposed controller by adopting the multiple vector approach to the finite-set model predictive control. The controller uses a hexagonal co-ordinate system to simplify the location and identification of the virtual vectors created, thereby eliminating the use of large look-up tables and reducing computational burden. When used with the proposed deadbeat prediction model, the overall steady-state performance, system robustness and quality of disturbance rejection are improved compared to the state-of-the-art finite-set model predictive current control (FS-MPC) methods with pulse width modulation (PWM). The improvements are due to the modified deadbeat prediction model with integral action, the algorithm used for multiple virtual voltage identification and the retention of the cost function in the proposed method. The proposed deadbeat MV-FMPC method and its improvements over the conventional FS-MPC have been verified through simulation and experiments with an interior-type permanent magnet synchronous machine.

Unified virtual oscillator controller (uVOC) inherits the rigorous analytical foundation offered by oscillator based grid-forming (GFM) controllers and enables fast over-current limiting and fault ride-through (FRT). Control design for effective FRT requires transient stability analysis. Existing transient stability analysis methods and studies are limited in either considering only current unconstrained scenarios or neglecting the simultaneous power angle and voltage dynamics. Under current-constrained faults, the voltage and power angle dynamics are strongly coupled and both play critical roles in determining transient stability. Therefore, decoupled analysis of the two, typically used in transient stability studies, does not offer comprehensive insight into the system dynamics. In this work, a comprehensive modeling and analysis method for transient stability in uVOC based converters is developed under both current-saturated and unsaturated symmetrical AC faults. We utilize phase-plane analysis of the overall system in a single graphical representation to obtain holistic insights into the coupled voltage and power angle dynamics. The FRT controller and the analysis method have been validated through simulations and hardware experiments. The results demonstrate that uVOC is not constrained by a critical clearing angle unlike droop and virtual synchronous machine (VSM) type second order controllers.

A reliable protection coordination system between the power electronic converters and solid-state device-based fast protection unit in a standalone dc microgrid supplied by a wave energy converter (WEC) and an energy storage unit is presented. A system model with solid-state circuit breakers is developed in Piecewise Linear Electrical Circuit Simulation (PLECS) to analyze the steady-state operation as well as faulted conditions. The effect of both resistive and constant power loads on a current-limited bus controlling converter behavior during an overload event is analyzed theoretically. Also, the variation in the WEC power output and its effect on bus voltage during overload are investigated. The analysis has led to a novel dual current–voltage feedback-based protection coordination system. The method does not require any communication between the solid-state circuit breakers and converters and eliminates the need for adaptive updating of the overcurrent threshold with varying renewable generation output. Bus capacitor discharge during a short-circuit is analyzed theoretically as well to formulate an instantaneous trip threshold selection utilizing device gate driver functionality. The proposed protection coordination system ensures rapid fault isolation and continued power delivery to the healthy segments. An SiC-based bidirectional, solid-state dc circuit breaker prototype is designed and fabricated, which has been used to implement the proposed protection method with a 380-V dc bus-based system.

The article presents a torque ripple minimization process using symmetrical rotor flux barrier shaping for synchronous reluctance (SyncRel) machines. High-performance applications demand stringent torque-speed, torque ripple, noise, and vibration requirements to satisfy the overall system performance. An iterative design approach incorporating electromagnetic, structural, and thermal analyses is presented that led to the design of a SyncRel motor with low torque ripple and minimized second-order vibration mode. The contributions demonstrated that the 30-slot, 4-pole SrncRel machine is a viable option for high-performance and packaging-constrained applications. Global response surface method that has the capability for parallel analysis has been used for the multiobjective optimization problem. A 2D finite element (FE) tool with the HyperStudy optimization routine has been used to implement the proposed design process. A quick and easy-to-use motor parameter-based model along with 2D FE analysis is used to evaluate the performance of the optimized design. Experimental results are provided to validate the iterative and comprehensive design, and design procedure.

A unified virtual oscillator controller (uVOC) is proposed, which enables a unified analysis, design, and implementation framework for both grid-forming (GFM) and grid-following (GFL) voltage source converters (VSCs). Oscillator based GFM controllers, such as dispatchable virtual oscillator control (dVOC), offer rigorous analytical framework with enhanced synchronization, but lack effective fault handling capability which severely limits practical application. The proposed uVOC facilitates synchronization with an arbitrarily low grid voltage and fast over-current limiting; this enables effective fault ride-through unlike existing GFM controllers which typically switch to a back-up controller during fault. GFM operation with uVOC is achieved in both grid connected and islanded modes with seamless transition between the two. In GFL converters, bidirectional power flow control and DC bus voltage regulation is achieved with uVOC. No phase-locked-loop (PLL) is required for either GFL or GFM operation circumventing the synchronization issues associated with PLLs in weak grid applications. Detail small signal models for GFM and GFL operation have been developed and systematic design guidelines for controller parameters are provided. The proposed controller is validated through hardware experiments in a hybrid AC-DC microgrid., 14 pages, 27 figures; manuscript is under review in IEEE Journal of Emerging and Selected Topics in Power Electronics

A high-bandwidth (>20 kHz) motor emulator (ME) prototype for ac machines, utilizing field programmable gate array (FPGA)-based hybrid model predictive control (MPC) and a high fidelity motor model and implemented with a voltage source power converter, and fast-switching SiC devices, is presented in this article. The hybrid MPC incorporates a unique gate stitching modulation strategy that synchronizes the inverter switching state with the ME switching state for an accurate representation of the emulated motor currents in the physical inverter hardware output. The gate stitching MPC hybrid algorithm avoids the need for an excessively high switching frequency of the ME power converter. The developed high-bandwidth ME can emulate up to the switching ripple current of the inverter under test (IUT) where the current slope can change up to six times within one switching period when using space vector pulse width modulation (PWM). The FPGA-based fast iterating online motor model is another key component which along with the high-performance ME current regulation algorithm can accurately emulate the motor current. The bandwidth achieved far exceeds that of existing ME solutions that can only emulate fundamental current and only a few orders of harmonic content. The high bandwidth also allows the use of a small line inductor, which reduces the size and cost of the ME system. Simulation and experiment results are provided to the FPGA implementation and validate the high-bandwidth current emulating capability.

Mutually coupled switched reluctance motors (MCSRMs) are alternatives in the family of reluctance machines that can overcome switched reluctance motor's (SRM's) system-level integration and control challenges by utilizing standard three-phase voltage source inverters. In this article, a novel segmented-rotor, fractional-slot, tooth-wound MCSRM with notched rotor design is presented, which has very low torque ripple compared to other machine types in the SRM family. The torque ripple is reduced to 3.6% without utilizing any current profiling techniques or torque sharing functions. The ripple minimization is achieved primarily through rotor segment shaping, which has a strong influence on stator flux densities, flux linkages, and torque harmonics. The design strategy, along with the optimization details, is presented for a 120 W, 12 slot-8 pole MCSRM. The designed MCSRM is prototyped for experimental verification and validation of the finite element analysis results and design methodology.

The transition to electric road transport technologies requires electric traction drive systems to offer improved performances and capabilities, such as fuel efficiency (in terms of MPGe, i.e., miles per gallon of gasoline-equivalent), extended range, and fast-charging options. The enhanced electrification and transformed mobility are translating to a demand for higher power and more efficient electric traction drive systems that lead to better fuel economy for a given battery charge. To accelerate the mass-market adoption of electrified transportation, the U.S. Department of Energy (DOE), in collaboration with the automotive industry, has announced the technical targets for light-duty electric vehicles (EVs) for 2025. This article discusses the electric drive technology trends for passenger electric and hybrid EVs with commercially available solutions in terms of materials, electric machine and inverter designs, maximum speed, component cooling, power density, and performance. The emerging materials and technologies for power electronics and electric motors are presented, identifying the challenges and opportunities for even more aggressive designs to meet the need for next-generation EVs. Some innovative drive and motor designs with the potential to meet the DOE 2025 targets are also discussed.