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This paper discuss the performance of doubly fed induction generator (DFIG) fed wind turbine system under fault conditions. The proposed performance analysis is demonstrated in MATLAB/Simulation software. A sailent pole rotor type induction generator and three phase converter comprises with IGBT switches are employed to propose the DFIG system. The proposed design has ability to extract utmost energy under minimum wind speed constraints. In order to achieve utmost energy, various control designs such as pitch angle control, wind turbine speed, DC bus potential, grid potential and reactive power control are presented in this paper. The simulation results obtained are helps in understanding the dynamic performance of the DFIG fed wind turbine power generation system.

This paper proposes an improved hybrid parallel compen-sator (IHPC) for enhancing the power transfer capability of a photovoltaic (PV) grid-connected inverter. A thyristor switched capacitor (TSC) module is used in series with a conventional inductive-coupling voltage source inverter (IVSI) to reduce the DC-link voltage. Under a low DC-link voltage, the voltage across the insulated gate bipolar tran-sistor (IGBT) will also be low, which will reduce the voltage stress of the IGBT, thereby improving the reliability and reducing the loss of the VSI. First, the mechanism of reac-tive compensation for improving the PV inverter power transmission capability is analyzed. Then, the circuit con-figuration and operating principle of the IHPC are intro-duced. After that, an optimal control strategy for the IHPC is proposed to address the resonance problem caused by the TSC connected in series with the L filter and to improve the compensation performance of the IHPC. Finally, the effec-tiveness of the proposed IHPC and the control method is validated by the simulation and experiments. The results show that the IHPC with optimal control strategy can achieve continuous reactive power compensation under a low DC-link voltage, thereby enhance PV power transfer capability.

In this paper, a hybrid Modular multilevel converter (MMC) topology is proposed, in which two of the submodules (SMs) are based on SiC MOSFET, while others are based on Si IGBT. In the proposed hybrid topology, the capacitor voltage of SiC SM is controlled to be half of that of Si SM, which reduces the requirement for the SiC devices. Whats more, this paper improves the modulation scheme to move most of the switching actions from Si SMs to the two SiC SMs, which strengthens the merits and avoids the shortcomings of SiC MOSFET. Besides, to solve the voltage imbalance problem caused by the change of topology and modulation scheme, a specialized voltage balancing scheme is proposed. Finally, the simulation and experiment result proves the feasibility of the hybrid MMC and control scheme, and the comprehensive analysis verifies that the hybrid MMC can achieve a better balance among cost, loss and feasibility compared with others.

Introducing bond wire diagnosis for multichip IGBT modules is key to the health monitoring of modular multilevel converters (MMCs), which allows for improved field robustness, reliability, and reduced maintenance cost. This paper leverages the crosstalk phenomenon during switching transitions to detect the chip open-circuit faults caused by the bond wire lift-off using typical half-bridge IGBT modules in a multichip-parallel configuration. The cycle-controlled, non-intrusive measurement is conducted under normal operation, when the device under test is at off-state and its complementary switch is during switching transitions. Two specialized health sensitive parameters arising from the dynamic gate loop waveforms are identified and evaluated, including 1) the gate voltage VGE(t3) when the declining collector voltage reaches zero, and 2) the negative peak gate voltage VGE(t4). The sensitivity and stability of these two parameters are compared through theoretical analysis, circuit simulation and practical verification. The results show that VGE(t4) is more suitable for online monitoring, while VGE(t3) is more sensitive than VGE(t4). With managed complexity in gate drives, this proposed health awareness approach is feasible in the submodules of MMC applications, but it can also be used in other power converter topologies incorporating the half-bridge structure.

To address the most commonly seen single IGBT open-circuit fault problems in cascaded H-bridge (CHB) converter based STATCOM, a simple online fault diagnosis method and the corresponding ride-through operation approach are proposed. The method can quickly determine the exact location of the open-circuit IGBT through three steps, via analyzing the relationships between the dc bias in the three-phase output current of CHB converter, the transient dc rail voltage variations with respect to the averaged dc rail voltage, and the response of dc rail voltage and output current when the modulation approach of the faulty power module is adjusted. Afterwards, a fault ride-through approach is adopted to seamlessly transfer the modulation approach of faulty H-bridge module and it behaves as a half-bridge to provide a half of the rated output AC voltage. Meanwhile, the corresponding dc offset voltage form this faulty module is compensated by producing the same dc voltage in the healthy phase legs to avoid the dc bias in the three-phase output current. It has been demonstrated that the proposed fault diagnosis approach and the fault ride-through approach are effective in various adverse situations including grid voltage sudden disturbances and the load power sudden changes.

Insulated Gate Bipolar Transistor (IGBT) module is one of the most prone-to-fail components in the wind power converter. The reduction of the junction temperature swing by thermal management can improve the reliability of a wind power converter. Due to the lack of an applicable selection criterion, not many studies on the control target of junction temperature swing were reported. This paper proposes a thermal management strategy to find the control target of junction temperature swing. The proposed strategy considers the return on investment (ROI) of thermal management as a quantitative indicator to guide the control target selection. The selected control target enables optimal benefit of the thermal management. Results show that a 1%-increase in the total harmonic distortion would extend the lifetime of IGBT module by 0.144 years. Success of the proposed scheme lies in the efficient regulation of the junction temperature swing. Case studies with different mission profiles and experimental tests on a three-phase two-level inverter are presented to validate the proposed method.

This article presents an interleaved boost rectifier for power factor correction (PFC) that operate in the continuous conduction mode (CCM) and is grounded on the switching cell with switching frequency modulation (SC-SFM). The input current naturally follows the shape of the input voltage, which is a resistive input characteristic (voltage follower). In the proposed converter, only one output voltage control loop is required. Moreover, the proposed topology has a wide range of soft commutation and no reverse recovery when the diodes block. This article presents the operating principle, a mathematical analysis of the converter, and four topological variations. In addition, experimental results of a 1-kW rectifier prototype with four different switch technologies (MOSFET, CoolMOS, SiC and IGBT), are discussed and their operational characteristics are demonstrated.

In the literature, giant magnetoresistive (GMR) point field detectors (PFDs) were integrated in terminals of Si IGBT modules for galvanically isolated current sensing in machine drives. This work presents a PFD-based current sensing system that can be fully integrated in the direct bonded copper (DBC) region of SiC power modules. The physics of phase shift errors caused by the Nickel (Ni) plating in the SiC power module is investigated. To address current sensing phase errors, a real-time phase shift reduction method is proposed. A bandwidth extension method is proposed to meet the sensing requirement of SiC devices that can switch at tens of kilohertz. The phase shift reduction and bandwidth extension methods are experimentally combined to sense the currents in the SiC DBC regions. The proposed current sensing has high bandwidth, minimal phase errors and low position sensitivity. The sensed currents can be used for high performance control and protection of SiC module-based converters.

In pursuit of high power density and high reliability of power converters, the junction temperature of power devices becomes an essential indicator for heath condition monitoring and thermal management. Particularly under high-temperature operating conditions, the temperature-dependent thermal properties of the chip and ceramic materials must be incorporated to enhance the prediction accuracy. In this paper, an improved temperature-dependent Cauer-type thermal network of IGBT module is established. The temperature dependence of thermal parameters for the chip layer and ceramic layer are meticulously considered. More importantly, FEM simulation is used to yield the heat flux curve of the power module at the center line in order to better imitate the real heat-spreading scenario. This way, the effective heat transfer area of each layer can be calculated accurately and analytically. By this analytic method, the temperature-dependent thermal impedance can be efficiently determined. Compared with prior-art fully FEM-based temperature-dependent thermal impedance characterization method, the method proposed in this paper reduces the FEM simulation time cost approximately 20 times under the same computing hardware facilities and considerably simplifies the parameter extraction process. Finally, experimental results based on two commercial IGBT modules successfully validate the usefulness, effectiveness and accuracy of the proposed thermal network model.

SiC MOSFET has superior switching performance over Si IGBT in terms of power loss and temperature characteristics. In order to significantly improve the efficiency and power density of medium voltage drive and high-power converters, this paper proposes a current source gate driver for series connected SiC MOSFETs, forming a universal block of series connected SiC devices with higher voltage rating. Proposed current source gate driver has better gate voltage synchronization performance because of its constant gate current and novel gate driver structure. By implementing synchronized gate voltages, the snubber circuit is designed only for power loop difference, gate displacement current difference, and the snubber can be minimized or even be eliminated. The proposed block has been verified by LTSPICE simulations and multi-pulse test experiments under 200kHz, 2kV, 0~60A condition using three 1.2kV/60A C2M0040120D SiC MOSFETs connected in series.

Accurately obtaining the spectrum characteristic parameters of switching devices is very significance for reduced EMI generation on the device switching process. This paper proposed the universal analytical waveform (UAW) to equal the interference source in the device switching process, and analyzed its time and frequency domain characteristic parameters. First, the time domain equivalent method of UAW is proposed, and all the parameters of UAW are calculated with the switching process of the device. Then, the frequency domain characteristic parameters of UAW are mathematically derived based on Fourier transform (FT), and obtained the spectrum envelope functions. Subsequently, the experiments of Si IGBT and SiC MOSFET have been performed to verify the correctness of the UAW, which provides the interference source for electromagnetic interference (EMI) prediction of the system where the device is located. Finally, taking SiC MOSFET as an example, specific solutions to reduce the interference source are discussed, which can be used to diminish the EMI generation of the system where the device located.

The reliability of the insulation of commercially used high voltage insulated gate bipolar transistor (IGBT) subjected to untimely initiation of partial discharge (PD) at low pressures and high temperatures is investigated and discussed in this letter. To date, no research has addressed the vulnerability of the high voltage IGBTs to the PDs at harsh environmental conditions for aerospace applications. This letter aims to fill this gap and illustrate the PD characteristics initiated between the electronic components inside the silicone gel. To this end, five commercial 3.3kV IGBT modules and four 4.5kV IGBT modules were tested at AC voltage under low pressures (20kPa, 15kPa, and 10kPa) and high temperatures up to 120C. An efficient PD test method and an anti-series connection configuration are suggested which emulate a realistic operational scenario for IGBTs together with the one suggested by the current standard. Experimental results reveal the occurrence of inconsistent PDs initiating from possible dynamic PD source inside the gel at low pressures, and more intense and consistent PDs when the temperature increases. It is expected the findings highlight the importance of PD tests on IGBTs at the abovementioned operation conditions and provide a selection and modification guidelines of PD-free IGBTs for manufacturers and engineers in the aerospace industry.

As the most widely used power semiconductor devices, insulated gate bipolar transistor (IGBT) modules are normally composed of parallel IGBT chips to achieve the desired current capability. However, the electro-thermal behavior of each chip is significantly different due to the asymmetric layout, increasing the overheating risk of single chip. Therefore, this paper proposes a novel approach to describe the thermal safe operation area (TSOA) of multichip IGBT modules in the inverter application, considering the uneven temperature distribution among parallel chips. The novelty of the approach is that it applied the proposed analytical model describing the uneven electro-thermal behavior, thus avoiding the traditional averaging process. Comprehensive investigation has been made to reveal the deep mechanism of the inconsistent temperature distribution, which are the uneven dynamic current sharing and thermal cross-coupling effects. Correspondingly, the analytical model of the uneven switching loss and the standard form of thermal resistance matrix related to cooling performance, are proposed and further verified, respectively. Based on the proposed approach, the recommended operation area of different rated devices is fully described. The contribution of this paper enables more well-founded device selection to achieve a safe and cost-efficient design for the inverter application.

The temperature-sensitive electrical parameter (TSEP) method is widely used in the extraction and prediction of junction temperature ( T j ) of power semiconductor devices. In this paper, turn-off loss ( E off ) and turn-off time ( t off ) are taken as temperature-sensitive electrical parameters. It is proved that the junction temperature of the insulated-gate bipolar transistor (IGBT) changes abruptly during switching. The common defects of a single temperature-sensitive electrical parameter, including collector current requirements and poor junction detection accuracy, are considered. Therefore, after proving the linear relationship between junction temperature, turn-off time, and turn-off loss, a hybrid model based on turn-off loss ( E off ) and turn-off time ( t off ) is proposed to accurately extract junction temperature. The experimental results show that this method has the advantages of high precision and strong anti-jamming ability.

IGBT junction temperature monitoring is crucial for converter healthy management and condition monitoring. However, most conventional IGBT junction temperature estimation methods are device-level, which means that monitoring junction temperatures of all IGBTs in converter requires the same number of monitoring units as IGBTs, which is of high complexity and cost. A converter-level IGBT junction temperature estimation method based on the DC bus voltage ringing is proposed in this paper. The peak values of bus voltage ringing during switching transient display a linear dependency on the junction temperatures of the corresponding switching IGBTs. Hence, the bus voltage ringing can be used for estimating the junction temperatures of the IGBTs in converter. The validity of the proposed method is verified by experiments on double-pulse and three-phase converter. Besides, implementation schemes and calibration approach for practical application are discussed. The method proposed has a higher resolution compared with traditional on-state voltage-based IGBT junction temperature monitoring method. Besides, the method proposed reduces the circuit complexity, size, cost, and it is easy to install. Moreover, the method proposed has a fast response, high resolution, and does not disturb the normal operation. The method proposed is independent of bond wire degradation of the IGBT module.

The ruggedness of the insulated gate bipolar transistor (IGBT) is one of its important attributes from the application stand point. Models for the forward-, reverse-, and short circuit safe operating area are provided in this chapter. Latchup of the parasitic thyristor in the IGBT can lead to destructive failure. Cell design for suppressing the latchup of the parasitic thyristor in the IGBT is described including adding a deep P-region, reducing the gate oxide thickness, adding a diverter region, and improving the polysilicon gate layout topology. The performance of silicon carbide devices is contrasted with that of silicon devices.

Practical insulated gate bipolar transistor (IGBT) devices have a finite size with a well-defined active area where the current flow occurs, an edge termination region surrounding the active area, and pads for locating the wires to carry current into and out of the chip. The design of the active area is related to the on-state current density. Various edge termination designs are discussed to achieve high blocking voltage capability. The integration of over-current, over-voltage, and over-temperature sensors is described for protection of the device. The typical process steps used to manufacture planar and trench-gate IGBTs are provided. The control of minority carrier lifetime is described to control the switching speed of IGBTs.

The insulated gate bipolar transistor (IGBT) can be configured to provide forward and reverse blocking voltage capability using the symmetric structure or only forward blocking voltage capability using the asymmetric structure. The control of current flow through the IGBT can be obtained by using either a planar D-MOS gate structure or a trench U-MOS gate structure. The collector region doping profile can be adjusted to reduce the injected carrier density with the transparent emitter concept. Complementary n-channel and p-channel IGBT structures are useful for AC power control. Lateral IGBTs are of interest for integration with control circuits. Novel IGBT structures that allow enhanced performance are described.

The methodology for designing the insulated-gate bipolar transistor (IGBT) cell structure for achieving a broad range of blocking voltage ratings is discussed in this chapter by using analytical models. The design of the threshold voltage of the IGBT is related to the channel doping profile. The optimization of the doping and width of the drift region in the symmetric and asymmetric structure is described to obtain the required blocking voltage capability. The on-state characteristics for the symmetric, asymmetric, and transparent emitter IGBTs are related to the injected carrier distribution as determined by the minority carrier lifetime in the drift region, the buffer layer doping and thickness, and the doping and thickness of the collector region, respectively. The stored charge in the drift region of these devices is used to develop the turn-off switching waveforms for the collector voltage and current so that the energy loss per switching event can be computed. The trade-off curve between on-state voltage drop and switching losses is generated for each device and its maximum operating frequency is analyzed. The performance of silicon carbide IGBT is also included here.

Collector-emitter voltage (Vce) detection of insulated gate bipolar transistors (IGBTs) is important for safety-critical and mission-critical power applications. The conventional voltage sensing method is characterized by the detection range from 0 V to the rated voltage in application (Vr), which is limited by the contradiction between the dynamic range of the signal and the ADC resolution in high voltage situations. Therefore, this study proposes a novel local voltage sensing (LVS) mode, in which the detection range is from Vst to Vr, where Vst is the controllable starting voltage of the sensed IGBT. Based on LVS mode, a novel controllable voltage sensor structure is given, which can provide a sensing signal that is a scaled version of the large Vce when Vce Vst. Vst can be controlled by applying a negative voltage to a control electrode gate (VG2). An analytical model is derived to understand the mechanism of the sensor and simplify the design. The effects of internal and external parameters on the sensing characteristics are simulated by Medici & TS4. Furthermore, the sensor is incorporated into a trial-manufactured 1200 V IGBT, and the experimental results agree with the analytical results.

Medium voltage DC (MVDC) power system has the characteristics of low line impedance, resulting in high peak and fast rise rate of the fault current. For example, the current in an onboard 10kV DC grid can rise to more than 40 kA in 3 ms after the failure. Therefore, it is necessary to configure DC circuit breaker (DCCB) with high current breaking capacity. In this paper, a novel high-power hybrid DC breaker based on integrated commutation compound power electronic switch is proposed. By giving full play to the complementary advantages of IGBT and IGCT, and skillfully integrating the commutation function into the power electronic switch, the proposed DC breaker has the characteristics of low cost, compact, high performance, and can also play a role in current limiting. The working principle of the proposed scheme is described in detail, and a 10 kV prototype with 40 kA current breaking ability is built to verify its feasibility.

This paper presents a novel concept of switch-mode DC-DC boost converters with reduced switching losses. The converters use an auxiliary switching cell (ASC) to achieve zero voltage switching (ZVS) during the turn-off of a transistor. The novel concept facilitates an increase in the efficiency or switching frequency of an IGBT-based boost converter. The paper discusses the converters topology, the principle of operation, and issues related to the reduction of power losses, the range of optimal operation and selection of components. The concept of the converter was verified through simulation and a series of experiments that demonstrate the process of zero-voltage turn-off and the efficiency of the converter.

With the development of high power converters, the safe operation of large IGBT modules with parallel chips is of increasing importance. In a multichip module, uneven solder layer degradation translates into higher thermal resistance for some of the chips, leading to junction temperature differences between them. However, the specific meaning of a virtual junction temperature extracted from any external electric characteristic parameter of the module is not yet clear. This paper studies the physical meanings of the temperatures estimated by the threshold voltage and the Miller platform duration as well as the quasi turn-off delay time. Experimental results show that the temperature estimated from the threshold voltage is close to the highest temperature of all the chips, while that estimated from the Miller platform duration or quasi turn-off delay time is close to the average chip temperature. Making use of the difference between the two, this paper proposes a new method to monitor the initial solder layer degradation in the multichip IGBT module. Such a method using combined temperature sensitive electric parameters (TSEPs) is verified for different levels of degradation.

Based on partial power conversion concept, this paper proposes a hybrid Silicon (Si)-Silicon Carbide (SiC) DC-AC topology to improve performance in high power application. First, master unit (MU) uses Si IGBT working in low frequency to handle main high power because of its high-rating current capacity and high switching loss, while the low power quality of MU is induced by the low switching. And SiC MOSFET suffers from high cost and high conduction loss at high power level. To solve these, the output of partial-power slave unit (SU) based on SiC MOSFET is connected with MU in series through line-frequency transformer (LFT), while SU works in high frequency to compensate the harmonic of MU and adjust the total output voltage. In this new topology, the corresponding hybrid modulation strategy and multiple Quasi Proportional Resonance (QPR) control for single phase system are introduced in detail to ensure the reliable operation. In the end, a 4.5-kW converter prototype was implemented and tested. Simulation and experiment results are given to verify the performance of the proposed hybrid DC-AC topology.

The module multilevel converter (MMC) is composed of dozens of the insulated gate bipolar transistors (IGBT) and its reliability should be seriously considered. This brief presents a fault diagnosis and localization (FDI) method for open-circuit fault of the IGBT in an MMC, which combines event-based capacitor voltage with capacitor current state observation. Under the event-triggered mechanism, the fault diagnosis program is activated only when the capacitor voltage of submodules (SMs) violated the designed event-triggering condition, which can effectively reduce the computational burden for the controller. The current direction of the capacitor will change when the submodule has an open-circuit gault. This characteristic is extracted and used for diagnose and locate the fault IGBT by comparing the observed value with the theoretical value of capacitor current. The proposed FDL method can effectively reduce the computation intensity of the controller and do not require extra hardware. Simulation results show that the proposed FDL can diagnose and locate the open-circuit fault of IGBT accurately within two fundamental periods.

Scaling design effects on surface buffer (SB) insulated gate bipolar transistor (IGBT) is analyzed not only for power loss reduction but also for switching controllability and robustness using TCAD simulation. Although the scaling design improves turn-off loss and on-state voltage drop $\text{V}_{ce(sat)}$ trade-off due to injection enhancement (IE) effect, turn-on surge current is increased by the enhancement of negative gate capacitance due to thin gate oxide. Dual gate control improves turn-on switching controllability by hole current path control. Short circuit robustness is improved by the scaling design, because the saturation current is decreased with the scaling design due to pinch-off of the n-MOS channel. From these results, the scaling design is effective in improving the SB-IGBT characteristics including high robustness.

Model-based sensorless field-oriented control (FOC) suffers from overparameterization and can be laborious to use for a five-phase permanent magnet synchronous motor. On the other hand, insulated gate bipolar transistor (IGBT) frequently fails in an electric drive. Under IGBT failure, a freewheeling current is observed, and, above all, it carries the failed phase back electromotive force information. Based on this observation, this article presents the design of a brand new sensorless FOC by exploiting the freewheeling current to accommodate both IGBT and position sensor failures, which is expected to further enhance the drive's fault-tolerant capability. The mathematical model of this current is first established to provide a theoretical basis and a comprehensive understanding of the presented sensorless FOC. By virtue of this model, a second-order generalized integrator with a frequency-locked loop can be used as a simple and elegant way to extract position/speed estimates. Experimental results are provided to validate the proposed sensorless FOC philosophy.

Junction temperature monitoring and bond wire detection are crucial for the condition monitoring and protection of insulated gate bipolar transistor (IGBT) and freewheeling diode (FWD). On-state voltage drop is one of the most popular parameters for junction temperature estimation and bond wire detection. However, there is still a lack of cost-effective on-state voltage drop measuring technique for both IGBT and FWD with a fast response. This paper proposes an in situ junction temperature monitoring and bond wire detecting method based on IGBT and FWD on-state voltage drops. The proposed technique can measure the on-state voltage drops of IGBT and FWD online with high accuracy and fast response. The on-state voltage drops of IGBT and FWD under low load current are linearly dependent on their junction temperatures. Besides, the on-state voltage drops under high load current are closely related to the bond wire degradation. Therefore, the junction temperatures and bond wire conditions of both IGBT and FWD can be monitored based on the on-state voltage drops during a period of alternating current. The experiment results validate the feasibility of the proposed on-state voltage drop-based method for junction temperature monitoring and bond wire detecting. The proposed method has characteristics of high response speed, non-invasiveness for normal converter operating, and simple structure.

Temperature-sensitive electrical parameter (TSEP) approaches are widely employed in the junction temperature (Tj) extraction and prediction of power semiconductor devices. In this paper, the turn-off loss (Eoff) and turn-off time (toff) are presented as temperature-sensitive electrical parameters. The abrupt change in the junction temperature of Insulated Gate Bipolar Transistor (IGBT) occurs during switching is proved. Common deficiencies in a single temperature-sensitive electrical parameter were considered, including the necessity of the collector currents exaction, the poor junction detection accuracy. Therefore, after the linear relationship between junction temperature and turn-off time, and turn-off loss is proved, a hybrid model based on turn-off loss (Eoff) and turn-off time (toff) is proposed to extract junction temperature accurately. The experimental results show that the proposed method is with the advantages of high accuracy and strong anti-interference ability. Although some high-precision probes are required for parameter extraction, it indicates the internal mechanism of junction temperature mutation of the power device, and it is of great value for the reliability of the power devices that operate continuously.

Generation of the hot spot in photovoltaic cells (PV) cells under partial shading conditions (PSC) is a persistent issue associated with PV systems which not only affects the PV performance but also increases the cell temperature (up to 400 °C in extreme cases), and thereby causes premature failure. This article presents a novel technique to prevent the reverse breakdown and thereby mitigate the hot spot temperature of the PV cells under partial shading by reducing reverse current through automated reconfiguration of PV array. The efficacy of the proposed technique is evaluated by simulating eight different shading scenarios, under which the reconfiguration algorithm automatically switched different PV configurations based on the nature of the shading pattern. The performance of the PV arrays is evaluated using IGBT as the switching device, and the performance is compared with an ideal switch-based circuit. The proposed technique is found to reduce the reverse voltage and reverse current and through the affected modules and thereby increase the reliability index in 82% of the cases. Hence the proposed reconfiguration algorithm is expected to increase the PV reliability and thereby increase the performance ratio of the PV projects, especially which are susceptible to frequent partial shading conditions.

Transformerless inverters are being used for integrating photovoltaic (PV) sources to the grid. Highly efficient and reliable inverter concept (HERIC) inverter is one such topology which is derived from H-bridge by adding a bypass leg on the AC side using two back-to-back insulated gate bipolar transistors (IGBT). Open-circuit fault in the bypass leg would result in conduction of current through anti-parallel diodes of the main switches of the inverter, effectively making the inverter to operate in bipolar mode. As a result of the fault, there would not be an issue of leakage current and the operation would continue at the expense of increased conduction losses and dc-offset in the grid current. This paper proposes an online non-invasive model-based technique to detect switch faults in the bypass leg of the HERIC inverter. The grid current at the peak of the carrier signal is predicted based on the measured grid current at the start of the zero state. By comparing the estimated and measured grid currents at the peak of the carrier signal, faulty switch in the bypass leg is localized. Once the fault is localized, the inverter’s modulation scheme is changed to conventional bipolar mode to improve the performance of the converter during the post-fault stage. A detailed simulation study is carried out to verify the effectiveness of the proposed approach. Experimental tests on the prototype converter show that the proposed algorithm can reliably detect open-circuit fault in switches of the bypass leg and once a fault is detected, the algorithm would change the modulation scheme to bipolar mode to minimize the inverter loss and dc-offset in the grid current.

Degradation caused by humidity affects the blocking characteristic of an insulated gate bipolar transistor (IGBT) module, leading to an increased leakage current and/or a reduced voltage blocking capability. The proposed measurement system enables the in situ detection of decreased breakdown voltage and increased leakage current. Thus, it can assess the degradation level of power modules when installed in a converter. This test is intended primarily for wind power converters and can be part of the start-up procedure of the system. The working principle has been validated on predamaged power modules arranged in half-bridge configuration, using a demonstrator implementation of the proposed approach in laboratory experiments. Due to the simplicity of the circuit, this concept is easy to integrate in existing inverter systems at a comparatively low cost.

Connecting low-voltage insulated gate bipolar transistor (IGBT) in series to withstand much higher dc -link voltages has some advantages over using a single high-voltage IGBT or the multilevel topologies. However, severe voltage imbalance during turn-off transient remains to be solved. In all existing methods, adjusting driving signal time delay (ADSTD) is attractive and has no penalty of sacrificing the switching performance of IGBT. Moreover, instead of using a snubber, the voltage imbalance caused by the difference in tail currents can be mitigated by using ADSTD as well. An active voltage balance method based on ADSTD is proposed and verified by experiments in this article. Besides, a more accurate equivalent capacitance for IGBT considering the stored carriers in the n-drift region is discussed. The factors affecting a proper driving signal time delay are also discussed in detail. These contents are well supported by experimental results as well.

This paper presents an on-line monitoring method of IGBT module bond wires aging based on the phase-frequency characteristics (PFCs) of differential mode (DM) interference signal. Firstly, the collector current variation during IGBT chip switching is analyzed, and the relationship between the aging degree of bond wires and the PFCs of DM interference signal is studied; Secondly, a phase angle characteristic measurement system of DM interference signal is built and used to online monitor the aging of bond wires in IGBT module; Finally, taking the buck converter composed of IGBT module as the equipment under tested, the interference signal is extracted by the RF current probe and processed by the low-pass filter and signal amplifier, then the phase angle characteristics are measured by the oscilloscope board to realize the on-line monitoring of the bond wires aging of IGBT module. The experimental results show that compared with buck converter with healthy IGBT module, the phase angle of DM interference signal in Buck Converter with aging IGBT module is reduced. The proposed method does not need expensive equipment such as spectrum analyzer, and only needs to monitor the aging state of bond wires in IGBT module online through oscilloscope board. Besides, the research method in this paper provides an approximate linear monitoring method for bonding wire lift-off.

Three-level (3L) inverters suffer from higher parasitic inductance due to the increased number of series-connected switches in a single current commutation loop (CCL) results in a larger size of CCL compared to their two-level (2L) counterparts. As such, semiconductors are subjected to higher voltage stress and severe ringing at the switching transient. While silicon carbide's (SiC) faster switching speed improves overall efficiency by reducing switching loss, the faster voltage, and current gradient (d v /d t and d i /d t ) generate electromagnetic interference (EMI) noise, requiring a larger and complicated filter stage design. To solve this problem, an optimized 3L T-type neutral point clamped power module has been proposed with a hybrid combination of the switch (SiC mosfet + Si IGBT) rated for 1200 V/160 A. Two direct bonded copper (DBC) substrates have been stacked to have a vertical power loop using laser-drilled vias, which provides low commutation loop inductance as low as 4.6 nH for the major CCLs including the wire bond. Other associated CCLs have also been identified and optimized. Additional DBC in the package will be acting as an EMI shield. The EMI noise has been compared to a traditional power module and a 21 dB reduction of common-mode noise has been observed.

Machine learning (ML) based data-driven methods have shown promising performance in power converter fault diagnosis. However, the existing ML model trained by one fault database can only work for the corresponding converter system, but cannot work accurately for a different system with the same topology but different parameters. In this article, a novel transferrable data-driven fault diagnosis is proposed for insulated gate bipolar transistor open-circuit fault diagnosis in three-phase inverters. First, three-phase current signals are sampled as original inputs and fault features are generated by manifold feature learning. Then, an extreme learning machine model is trained by the data from the source system to form an initial diagnostic model. After that, a model adaption process is designed to adjust the model's parameter by minimizing the distribution divergence between the data from the source and target systems. As the biggest advantage, one trained diagnostic model can be applied for different systems without the need for multiple training processes. Finally, offline tests and real-time experiments are conducted to verify the performance of the proposed transferrable method.

As a classical insulated gate bipolar transistor (IGBT) structure, the trench-gate field-stop (FS) IGBT has been widely used. For more convenient application, physics-based trench-gate FS IGBT models have received great attentions due to its effectiveness in simulating key device properties. However, current IGBT modeling studies for this popular IGBT chip seldom investigate the depletion layer behavior under the trench-gate structure. This article first derives the physics-based miller capacitance formula for the trench-gate structure according to finite element method (FEM) simulation. Another haunting issue for these physics-based IGBT models is that the intrinsic device parameters are difficult to be extracted appropriately. Thus, an FEM FS IGBT model is established in Sentaurus TCAD as the benchmark. Then, an improved parameter extraction procedure for a Fourier-series-based (FSB) IGBT model is proposed based on the improved miller capacitance formula. By the particle swarm optimization algorithm, key device parameters for the FSB IGBT model can be successfully extracted by fitting the simulated waveforms to those by FEM simulation at a randomly selected turn-off operating condition. Parameters extracted through the proposed procedure using the FSB IGBT model with the improved miller capacitance formula are very close to the device parameters of the FEM model. More importantly, the reliability and the robustness of the extracted parameters are further validated by comparing the waveforms of FSB model with those of FEM model at different operating conditions.