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The new power Gallium Nitride transistors allow to increase the operating frequency of converters to megahertz range, thanks to their low switching time that is of a few nanoseconds or less. This permits to reduce the values and the volume of the passive components, and enhance the power density of power converters. However, inductors needed for energy storage still take a large volume in converters compared with the others components, because of their weak energy density. Furthermore, high-frequency operation require low-losses magnetic materials. In this article, a design method of PCB inductors is proposed. A flexible ferrite sheet is used to enhance the inductance value and ease the realization of custom-shape devices. The design method of the inductor is based on the optimization of the inductor volume taking into account thermal issues of the magnetic sheets. Also a simulation method is proposed to calculate the equivalent stray capacitance of the inductors. The proposed method provides a losses volume tradeoff that helps designers to optimize the inductor for their application. [ABSTRACT FROM AUTHOR]

The switching of the power semiconductors in static converters is the main source of electromagnetic interferences (EMI). To meet with electromagnetic compatibility standards, it is necessary to reduce the level of the conducted emissions. This reduction can be achieved by different techniques including the EMI filters whose design is mainly based on the use of ring core inductors. This element is a key point for designing efficient EMI filters, requiring then accurate inductor high-frequency (HF) models. Therefore, this paper deals with the development of an HF behavioral model of inductors, based on electrical equivalent circuit, for an implementation in circuit simulation software. The aim is to provide a robust and adjustable model under small-signal operating conditions for frequencies up to 100 MHz. The proposed model considers the frequency-dependent properties of the magnetic core material and also includes the parameterization of the electrical equivalent circuit elements with the number of winding turns and dimension of the magnetic core. Simulations results using the obtained inductor model are validated by impedance measurements with two types of magnetic materials: ferrite and nanocrystalline. [ABSTRACT FROM AUTHOR]

This paper deals with conducted electromagnetic interferences (EMIs) in adjustable-speed drive (ASD) systems. For some years, the use of high-speed switching power devices in ASDs induces high-voltage (dv/dt) and high-current (di/dt) variations that excite the parasitic elements of the power circuit, inducing conducted emissions. The advent of these devices has thus generated several unexpected problems, such as premature deterioration of motor ball bearings and high increases in the EMI levels, which are caused by the circulation of the high-frequency currents. In order to evaluate the level of the common-mode (CM) and the differential-mode (DM) currents in the ASD system, it is necessary to use a precise model of the pulse width modulation (PWM) inverter, power cable, and ac motor that takes into account various phenomena, which appear when the frequency increases. First, a PWM inverter and shielded four-wire power cable model are presented. Then, a new high-frequency modeling method of the ac motor is proposed. Finally, the ASD system is simulated and the obtained results are compared to the experimental measurements in the frequency and time domains. [ABSTRACT FROM AUTHOR]

In power electronics applications, power cables spread paths of conducted disturbances throughout the system. This paper proposes a high frequency modeling method for power cables that takes into account phenomena which appear when the switching frequency of the static converter increases, such as skin effects, proximity effects and dielectric losses. The proposed power cable models are obtained by the series- association of n identical RLCG basic cells. The skin and proximity effects are represented as the impedance of an R-L ladder and the dielectric, losses as the admittance of an R-C ladder. The proposed method was successfully applied to a three- wire unshielded cable and extended to a four-wire shielded cable. [ABSTRACT FROM AUTHOR]

As the characteristics of insulted gate transistors [like metal-oxide-semiconductor field-effect transistors and insulated gate bipolar transistors (IGBTs)] have been constantly improving, their utilization in power converters operating at higher and higher frequencies has become more common. However, this, in turn, leads to fast current and voltage transitions that generate large amounts of electromagnetic interferences over wide frequency ranges. In this paper, a new active gate voltage control (AGVC) method is presented. It allows us to control the values of di/dt at turn-on and dv/dt at turn-off for insulated gate power transistors, by acting directly on the input gate voltage shape. In an elementary switching cell, it enables us to strongly reduce over-current generated by the reverse recovery of the free-wheeling diode at turn-on, and oscillations of the output voltage across the transistor at turn-off. In the following sections, the AGVC in open and closed-loop for IGBT is presented, and its performance is compared with that of a more conventional method, i.e., increasing the gate resistance. Robustness of the AGVC is estimated under variations of dc-voltage supply and transistor switched current. [ABSTRACT FROM AUTHOR]

High-frequency power converters need electromagnetic interferences filters using common and differential mode chokes with low parasitic capacitance to comply with the electromagnetic compatibility standards. This article proposes a modeling method of this capacitance and ways to minimize it. The studied components are ring core inductors with magnetic materials considered as perfect conductors or with high permittivity, such as nanocrystalline material and most Mn-Zn ferrite materials. In comparison to other work in the literature, the proposed approach takes into account the curvature of the turn, in addition to the coating of the core and the insulation layer of the wire. The hypotheses, used in this article to simplify the real geometry, are compatible with two-dimensional (2-D) approaches to compute the parasitic interturns and turn–core capacitances. These capacitances are evaluated thanks to the 2-D finite element method. The obtained model allows accurate evaluation of the effect of turn–core space on the parasitic capacitance, and enables to reduce its value with a limited impact on the volume of the magnetic component. [ABSTRACT FROM AUTHOR]

With the integration of power electronic converters and components, an accurate thermal design becomes essential. Hence, precise thermal models for components are needed for their optimal design. This paper focuses on the development of an analytical model for the design of thermal resistance of planar magnetic cores (PMC). Based on computational fluid dynamic (CFD) simulations, the PMC design thermal resistance variation is studied, according to ambient temperature and level of losses. Then, a polynomial equation is developed to model those variations, and coefficients are deduced for all the sizes of PMC. This analytical model, useful for designers, is finally validated with thermal measurements on a planar transformer prototype. [ABSTRACT FROM AUTHOR]

Due to the high switching speed of Gallium Nitride (GaN) transistors, parasitic inductances have significant impacts on power losses and electromagnetic interferences (EMI) in GaN-based power converters. Thus, the proper design of high-frequency converters in a simulation tool requires accurate electromagnetic (EM) modeling of the commutation loops. This work proposes an EM modeling of the parasitic inductance of a GaN-based commutation cell on a printed circuit board (PCB) using Advanced Design System (ADS®) software. Two different PCB designs of the commutation loop, lateral (single-sided) and vertical (double-sided) are characterized in terms of parasitic inductance contribution. An experimental approach based on S-parameters, the Cold FET technique and a specific calibration procedure is developed to obtain reference values for comparison with the proposed models. First, lateral and vertical PCB loop inductances are extracted. Then, the whole commutation loop inductances including the packaging of the GaN transistors are determined by developing an EM model of the device's internal parasitic. The switching waveforms of the GaN transistors in a 1 MHz DC/DC converter are given for the different commutation loop designs. Finally, a discussion is proposed on the presented results and the development of advanced tools for high-frequency GaN-based power electronics design. [ABSTRACT FROM AUTHOR]

Because of trapped charges in GaN transistor structure, device dynamic on-state resistance RDSon is increased when it is operated in high frequency switched power converters, in which device is possibly operated by zero voltage switching (ZVS) to reduce its turn-on switching losses. When GaN transistor finishes ZVS during one switching period, device has been operated under both reverse and forward conduction. Therefore its dynamic RDSon under both conduction modes needs to be carefully measured to understand device power losses. For this reason, a measurement circuit with simple structure and fast dynamic response is proposed to characterize device reverse and forward RDSon. In order to improve measurement sensitivity when device switches at high frequency, a trapezoidal current mode is proposed to measure device RDSon under almost constant current, which resolves measurement sensitivity issues caused by unavoidable measurement circuit parasitic inductance and measurement probes deskew in conventional device characterization method by triangle current mode. Proposed measurement circuit and measurement method is then validated by first characterizing a SiC-mosfet with constant RDSon. Then, the comparison on GaN-HEMT dynamic RDSon measurement results demonstrates the improved accuracy of proposed trapezoidal current mode over conventional triangle current mode when device switches at 1 MHz. [ABSTRACT FROM AUTHOR]

Electromagnetic interference filters are broadly used in power electronic systems in order to respect electromagnetic compatibility normative constraints, which considerably increase overall cost and volume mainly because of the common-mode (CM) inductor. In this paper, a new method to calculate the optimal volume of the CM inductor is proposed. It takes into account core saturation issues that may greatly impact inductor volume and filter performances. Consequently, it is shown that in some cases, increasing the inductance value up to the best value can significantly reduce the filter volume in addition to further enhancing the filter attenuation. It is also shown that different nearly-best inductor geometrical parameters with different shape factors can be obtained, which provides an important degree of freedom to designers while introducing the filter in the energy conversion system. [ABSTRACT FROM AUTHOR]

This paper presents a pulse width modulation strategy for the cancellation of common-mode (CM) voltage generated by three-phase back-to-back two-level inverters. This method theoretically provides complete elimination of the CM voltage by synchronizing all the commutations of one converter with commutations of the other one, so that the overall resulting CM voltage does not vary. The degrees of freedom of this strategy are studied and an experimental implementation is carried out on a 15-kW motor drive prototype to validate the method effectiveness. Taking into account deadtime compensation, measurements in time and frequency domains show that the CM voltage is strongly reduced and that more than 15 dB reduction is achieved in a wide frequency range. [ABSTRACT FROM AUTHOR]

In order to study switching waveforms of a SiC-JFET, its interelectrode capacitances evolution is necessary when the power device is in linear region. In this paper, the reverse transfer capacitance Cgd is at first characterized by the multiple-current-probe method and afterwards validated by the measurement with an impedance analyzer. The output capacitance Cossis measured by the same method and compared with the single-pulse characterization, which shows a huge increase of the apparent capacitance values in linear region. The influence of the power transistor internal gate resistor is thus studied, revealing the interelectrode capacitances measurement difficulties when the power device is in linear region. The characterization results are allowed to finely model the power transistor of which the switching behaviors are validated with the measurement in a buck converter. [ABSTRACT FROM PUBLISHER]

With the advantage of high bandwidth and small insertion impedance, a current surface probe (CSP) used to measure switching current waveforms is presented in this letter. Its transfer impedance is characterized and validated by measuring an IGBT switching current that is compared with those obtained with a current probe and a Hall effect current probe. Furthermore, by comparing with a current shunt to measure a GaN-HEMT switching current, it is shown that CSP is able to measure a switching current of a few nanoseconds, while it brings no influence on transistor voltage waveform measurement. The obtained results show that the use of CSP brings little parasitic inductances in the measurement circuit and it does not bring the connection of the ground to the power converter. [ABSTRACT FROM AUTHOR]

This paper focuses on the modeling method of energy cables used in power conversion systems, in the aim of EMC simulation and overvoltage analysis. Based on the node-to-node functions method, a simple frequency-domain model with a reduced number of equivalent impedances is considered and applied to three-wire shielded cables, along with a fast identification method based on a cascaded-cell model. Even though the model eventually includes nonphysical virtual impedances, simulation in frequency domain provides accurate results when compared to equivalent experimental measurements, for various cable lengths and in short simulation times. Time-domain waveforms are then extracted from frequency-domain simulation and confirm the effectiveness of the proposed method in a wide frequency range up to 50 MHz. Finally, a good match has been found between experimental and simulation results of voltage overshoots on a buck power converter system. [ABSTRACT FROM PUBLISHER]

The magnetic material when designing EMI filter determines the inductance value and the parasitic elements that influence the insertion loss effectiveness of the filter. Moreover, the EMI filter characterization is usually realized at low power levels (low current and low voltage). When the EMI filter is subjected to higher currents through its coils, the principal characteristics of the filter (inductance variation with current and frequency) are modified. To account for these variations in the design step, it is useful to take into account the hysteresis model that represents the inductive and dissipative effects. Therefore, in this paper, an approach combining a magnetic hysteresis model together with a concept of material capacitance is proposed. The model is identified from a single turn of flat copper ribbon (STFC) experimental setup. Then, the experimental data are modeled with the proposed hysteretic and capacitive material behavior model (HCM) that is implemented in an equivalent circuit modeling approach, accounting for both the magnetic behavior law together with the “material capacitance.” The robustness of the proposed approach is evaluated by comparison and validation with the experiment results, showing good representation of the inductive and partially the dissipative effects. [ABSTRACT FROM AUTHOR]

The characterization of voltage-dependent capacitances of power semiconductor devices [diode, MOSFET, insulated gate bipolar transistor (IGBT), etc.] is very important for modeling their dynamic performances. A measurement method using two current probes has been developed to characterize interelectrode capacitances of power devices while isolating the measurement devices from the high-voltage dc bias power source. Ciss and Coss are shown to be accurately measured while Crss is not convincing enough. Then an additional current probe is added to improve the method. Crss is shown to be well characterized by this three-current-probe method. This method has been validated using various technologies of semiconductor devices including silicon MOSFET and silicon carbide JFET. The interelectrode capacitances of power devices can be safely and accurately measured with this multiprobe method even in high voltage. [ABSTRACT FROM AUTHOR]

Pulsewidth-modulated (PWM) voltage-source inverters are known to provoke high-frequency disturbances in motor-drive applications, particularly when long cables are used. Indeed, the parasitic elements of the cable, along with steep voltage transitions due to semiconductor switchings, are responsible for the conducted electromagnetic emissions and high overvoltages on the motor terminals. Therefore, several specific PWM schemes have been proposed in order to reduce these phenomena without requiring large passive filters. However, strategies that reduce common-mode currents (mainly conducted electromagnetic emissions) tend to increase the overvoltages generated on the motor. This paper focuses on a new PWM strategy that reduces the common-mode currents generated by three-level inverters. It provides a control algorithm that makes sure that the motor overvoltages never exceed those of conventional strategies while improving the electromagnetic-compatibility performance of the drive. [ABSTRACT FROM AUTHOR]

Adjustable-speed drives involve common-mode voltages, which generate common-mode currents flowing to the ground through stray capacitances of electric machines. These currents are known to provoke premature motor-bearing failures, as well as electromagnelic interferences disturbing neighbor electronic devices. Furthermore, high-voltage applications involve high levels of these conducted emissions, which must be lowered by using bulky and expensive filters. This paper aims at elaborating a new pulsewidth-modulation (PWM) strategy in order to reduce the common-mode currents generated by three- level neutral-point-clamped inverters. The proposed strategy also provides the ability to balance the neutral point of the dc-bus capacitors. Experimental results both in time and frequency domains confirm that the new PWM improves the electromagnetic-compatibility behavior of the drive compared with conventional strategies. [ABSTRACT FROM AUTHOR]

Planar magnetic components are promising solutions for the integration of power electronic systems. The leakage inductance of such components plays an essential role in power converters. In this paper, an analytical modeling method for leakage inductance computation is developed for planar components with plastoferrite leakage layers. This method is based on the solution of Poisson's equations for magnetostatic using multilayered Green's functions. The obtained formulations are general and precise and have been validated by numerical tests. Experimental characterizations have been performed on two magnetic components: A planar LLC and planar common-mode choke. The obtained results show that with the described method, the static leakage inductance of planar components can be accurately estimated. [ABSTRACT FROM AUTHOR]

Abstract: In order to enhance the performance of electromagnetic interference (EMI) filters, it is necessary to identify high-frequency parasitic elements of their passive components, mainly those related to the coupled inductors. Motivated by this issue, in this work a realistic high-frequency model is proposed for the coupled inductors. Actually, using interval analysis in particular the forward–backward contractor, a set-membership algorithm has been developed to estimate systematically the parasitic elements linked with the magnetic components. The main advantages of this algorithm compared to the fitting methods are the values of the estimated parameters are always positive and the corrupted data are taken into account. The comparison of the simulation results and the experimental data allows us to validate the proposed method. [Copyright &y& Elsevier]

Power converters with high switching frequency generate conducted electromagnetic interference (EMI) noise. EMI filters are thus widely used to reduce these conducted noises for the compliance with electromagnetic compatibility standards. In this paper, a high-frequency (HF) equivalent circuit model for common mode (CM) chokes used in EMI filters is proposed together with its parameter extraction procedure. This procedure is based on impedance measurements and it incorporates an iterative rational function approximation fitting algorithm to extract the parameters in the model. The proposed model and procedure is applied to a planar CM choke which is used to realize an EMI filter. The simulated results of the filter show good agreement with the experimental ones. This extraction procedure is quite general and it can also be extended to identify the HF model of other passive components. [ABSTRACT FROM AUTHOR]

In order to model GaN-HEMT switching transients and determine power losses, a compact model including dynamic R DSon effect is proposed herein. The model includes mathematical equations to represent device static and capacitance-voltage characteristics, and a behavioural voltage source, which includes multiple RC units to represent different time constants for trapping and detrapping effect from 100 ns to 100 s range. All the required parameters in the model can be obtained by fitting method using a datasheet or experimental characterisation results. The model is then implemented into our developed virtual prototyping software, where the device compact model is co-simulated with a parasitic inductance physical model to obtain the switching waveform. As model order reduction is applied in our software to resolve physical model, the device switching current and voltage waveform can be obtained in the range of minutes. By comparison with experimental measurements, the model is validated to accurately represent device switching transients as well as their spectrum in frequency domain until 100 MHz. In terms of dynamic R DSon value, the mismatch between the model and experimental results is within 10% under different power converter operation conditions in terms of switching frequencies and duty cycles, so designers can use this model to accurately obtain GaN-HEMT power losses due to trapping and detrapping effects for power electronics converters. [ABSTRACT FROM AUTHOR]