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We have studied the effect of different cleanings at device level for nPERT (passivated Emitter, Rear Totally diffused) cells with a rear epitaxial emitter. Cleanings based on sulfuric acid and peroxide mixtures (SPM), which are effective but also expensive, were used as reference. We found that simplified cleanings such as those based on sulfuric acid and ozone mixtures (SOM), and those based on water and ozone (IPV), are giving similar results at device level as the expensive SPM cleaning, leading to similar J0e, J0, FSF, and lifetime values. The implied VOC values of corresponding test devices fabricated using the simplified cleanings are at the same high level as the test devices using more expensive SPM cleanings. Actual nPERT devices with moderately doped epitaxially-grown emitters with a constant doping profile (box profile) showed average efficiencies above 22.0% for both SOM and IPV cleanings. Very high VOC values of up to 695 mV and implied VOC values of up to 730 mV were shown for cells with a flat rear surface. Finally, the best nPERT cells with rear epitaxial emitter and SOM cleaning showed efficiencies up to 22.5%, as externally confirmed by ISE CalLab.

This paper proposes a kerfless wafer structure with built-in p-n junctions in n-type silicon wafers grown using Crystal Solar's high throughput epitaxy technology. Compared with a conventional p-type emitter by boron diffusion, ion implantation, or epitaxy, the built-in p-type emitter has a reduced and uniform doping concentration and increased thickness. The epitaxially grown wafers and conventional Czochralski (CZ) n-type wafers were processed into solar cells. A best efficiency of 22.5% with epitaxially grown wafers was achieved, with a 6 mV gain in open-circuit voltage, suggesting a high wafer quality and superiority of the deep epitaxial emitter over a standard boron-diffused emitter. Substrate reuse associated with the kerfless epitaxy technology is studied as well, with respect to its impact on solar cell efficiency. The data suggest no degradation in cell efficiency due to substrate reuse.

In this work, we evaluate by means of simulations and measurements the effect of rear surface morphology on the performance of n-type rear-junction Passivated Emitter Rear Totally-diffused (PERT) solar cells with epitaxial emitter. A comparison of the electrical and optical performance between a rear polished and a rear textured surface was conducted on both test structures and solar cells. The effect of surface morphology on J 0e for both emitters formed by either diffusion or epitaxy was investigated. It was found that epitaxy on a textured surface provides J 0e values even better than boron diffusion and J 0e for both surfaces (textured rear and polished rear) using ALD-Al 2 O 3 /PECVD SiO x as dielectric passivation are much lower than the ones by wet oxidation. A small difference in V oc between both surfaces was also predicted in our electrical simulations. Overall, the measurements show that n-type PERT solar cells with textured rear epitaxial emitter can perform at almost the same efficiency level to the ones with polished rear. For both types of n-PERT cells (textured rear and polished rear), average efficiencies ( η ) and short-circuit current densities ( J sc ) exceeding 20.5% and 39 mA/cm 2 , respectively were achieved on 238.9 cm 2 cells. Moreover, from our optical simulations it was found that either a textured rear surface or a non-perfect polished rear surface are ideal for light trapping at standard illumination conditions, with light impinging perpendicular onto the cell. However, a perfectly polished rear surface or one with pyramids at angles of 45° should be avoided. Finally, from a cost of ownership (CoO) point of view it was found that the potential efficiency gain originating from a rear polished surface is not cost effective. For polishing to become cost effective, the cell in the module should have an efficiency of 21.05% which is 0.45% more than the textured case.

This work focuses on the fabrication of nPERT(Passivated Emitter, Rear Totally Diffused) devices incorporating an epitaxially grown single side rear-emitter. Such epi-nPERT cells are fabricated in a simplified way using the selectivity of the epitaxial deposition, which is obtained by a PECVD-SiOxlayer, that not only mask the front but also passivates the cell. The cell performance is studied in terms of: i) various front surface fields (FSF) applied prior to emitter epitaxy and ii) usage of laser doping as an alternative to laser ablation for a front contacting scheme. The results show: i) a clear relationship between the depth of the homogeneous FSF and its impact on the open circuit voltage of the devices, with a shallow FSF having the highest V OC loss due to laser damage and ii) laser doping on devices with a relatively deep diffused FSF giving 8 mV increase in V OC as compared to devices with ablated dielectrics and a V OC increase of almost 30 mV in case a shallow selective FSF is applied. This results in a best efficiency obtained so far for the epi nPERT devices of 21.6% (226 cm 2 ).

We report the use of a screen-printable copper paste to form the front busbars on high efficiency photovoltaic cell structures in combination with copper fingers formed by light induced plating. Such a process route offers economic benefits relative to the fully plated front metallization due to the reduced requirement for laser ablation and increased cell performance. We demonstrate improved open circuit voltage and fill factor compared to cells that used plating for both the fingers and the busbars. These result from reduced contact between the semiconductor and the metal and from reduced shunting compared to the laser ablated and plated electrodes. p-type ‘PERC’ cells have been fabricated with copper plated fingers and screen-printed copper busbars with a median cell efficiency of 20.4%, compared to 20.3% for those with fully plated busbars. n-type ‘PERT’ cells reached a cell efficiency of 20.9% for both front metallization schemes. The screen-printed busbars gave a ∼5 mV advantage over the plated busbars in both cases.

Attaching interconnection ribbons to solar cells using electrically conductive adhesives is an attractive alternative to soldering, particularly if it can be achieved on cells without busbars. We report on ribbon bonding tests on busbarless PERC cells using a silicone-based electrically conductive adhesive, comparing the results with those of soldered control samples. The ribbon-bonded samples lead to somewhat lower performance, but promising results have nevertheless been obtained that indicate that equivalent performance could be reached with better process control. Proof-of-concepts of innovative structures combining electrically conductive adhesives and non-conductive adhesives are demonstrated, with the potential to yield high fill factors, moderate material consumption and easier application.

A new process for deposition of silicon oxide films with excellent passivation properties was developed using an atmospheric pressure plasma reactor. This process consists of fast deposition at room temperature of a SiCxOyHz film followed by a rapid thermal anneal in air (similar treatment to a contact firing step) to convert it to a dense inorganic SiOx material. The material formed using this process shows improved passivation compared to low pressure PECVD films. The firing process and more particularly the firing temperature appears to play a critical role in passivation performance, and an optimum temperature was identified. Capacitance-Voltage measurements on a MOS structure show that the oxide layer has a very low Dit value with fixed negative charges, which has not been reported before for thick silicon oxide. This uniqueness is attributed to measured over-stoichiometry in oxygen in the dense film owing to the presence of bulk silanols. These films were successfully incorporated in PERC solar cells with cells showing efficiencies up to 19.7%.

In this paper, we investigate the mechanisms leading to rear reflectance losses in i-PERC type solar cells by means of reflectance measurements, scanning spreading resistance microscopy (SSRM), and transmission electron microscopy (TEM). Using 2 μm sputtered (PVD) AlSi12.7% (eutectic composition) it is found that the interaction between Si present in the sputtered mixture and the rear dielectrics upon contact firing leads to a large drop in rear reflectance even without any laser ablated contact openings. On the other hand, in the case of local Al-BSF formation with pure PVD Al, it is shown that the presence of Si on top of the rear dielectrics, coming from Si diffusion into the Al layer with alloying, leads to parasitic absorption which contributes almost entirely to the measured drop in rear reflectance.

This work studies the performance of commercially available Al pastes for the rear side contact formation with an industrially feasible process. The pastes are specifically designed for local Al-BSF/PERC (Passivated emitter and rear cell) cells. With this type of metallization, fill factors (FF) up to 80% are demonstrated, to our knowledge, the highest FF ever reported on fully screen printed PERC cells with industrial type emitter. Additionally, the use of an AlSi eutectic (12.7% Si) target for PVD sputtering is evaluated in comparison to a reference process using a pure Al target with the same kind of deposition technique. It was found that the thickness of the Al p+ BSF layer realized with the 12.7% Si containing Al target is systematically thicker than the reference due to a smaller metal Si interface. With this method, solar cells have been fabricated showing a potential efficiency above 20%, with standard Ag front screen printing on 60 Ω/□ emitter.

We demonstrate the use of a copper-based metallization scheme for the specific application of thin-film epitaxial silicon wafer equivalent (EpiWE) solar cells with rear chemical vapor deposition emitter and conventional POCl3 emitter. Thin-film epitaxial silicon wafer equivalent cells are consisting of high-quality epitaxial active layer of only 30 µm, beneath which a highly reflective porous silicon multilayer stack is embedded. By combining Cu-plating metallization and narrow finger lines with an epitaxial cell architecture including the porous silicon reflector, a Jsc exceeding 32 mA/cm2 was achieved. We report on reproducible cell efficiencies of >16% on >70-cm2 cells with rear epitaxial chemical vapor deposition emitters and Cu contacts. Copyright © 2011 John Wiley & Sons, Ltd.

B implanted emitters are investigated in the back junction cell configuration and their material properties are tested in double side implanted Si wafers. B has been implanted at 5 keV at various dose conditions varying from 1 × 1014 up to 3 × 1015 at./cm2 and activated at 1000°C for 10 min. N-type 8 × 8 cm2 mono-crystalline cells are fabricated and measured. Both fill factor and efficiency increase for high-B doses. However, at 1015 at./cm2 B dose the Voc drops, which is in agreement with lifetime degradation in the wafer. Defect evolution simulations of BnIm clusters formation is correlated with lifetime degradation. Copyright © 2011 John Wiley & Sons, Ltd.

In the quest for lowering the manufacturing cost of silicon solar cells, imec has been working successfully on two crystalline Si ‘thin-film’ cell concepts. In a first concept, a 20 µm-thin Si solar cell is epitaxially grown on top of a porous Si-based Bragg-type reflector which is electrochemically etched in a low-cost UMG Si substrate. Large area solar cells with efficiencies of 15.2% have been made, using (semi-)industrial processing tools. This clearly demonstrates that this cell concept has almost reached the stage of industrial application. In a second, longer-term approach, a 1–5 µm-thin, stand-alone mono-crystalline film is created based on the controlled annealing of an ordered macroporous silicon layer (the ‘Epi-free’ process). With this very thin Si layer, a simple proof-of-concept solar cell has been made exhibiting an efficiency of 4%. By optimizing the cell process in terms of light trapping and passivation, efficiencies over 15% can be expected from this technology.

We report on the beneficial use of embedded segmented porous silicon broad-band optical reflectors for thin-film epitaxial silicon solar cells. These reflectors are formed by gradual increase of the spatial period between the layer segments, allowing for an enhanced absorption of low energy photons in the epitaxial layer. By combining these reflectors with well-established solar cell processing by photolithography, a conversion efficiency of 15·2% was reached on 73 cm2 area, highly doped offspec multicrystalline silicon substrates. The corresponding photogenerated current densities (Jsc) were well above 31 mA/cm2 for an active layer of only 20 µm. Copyright © 2010 John Wiley & Sons, Ltd.

In this work, we study the gettering properties of a porous silicon (Psi) intermediate reflector. This type of reflector is used currently in the thin film epitaxial silicon solar cell approach. The porous layers are electrochemically etched into low-cost, highly contaminated UMG (Upgraded Metallurgical Grade) Si in order to investigate the influence of impurity diffusion to the active layer due to the high thermal budget during epitaxial growth. When implemented into a solar cell, a porous silicon (Psi) multilayer stack consisting of layers with alternating porosities can serve as a gettering site for impurities that originate from the substrate. This statement is confirmed in our present work by several techniques such as SIMS (Secondary Ion Mass Spectrometry) and TXRF (Total Reflection X-Ray Fluorescence). Additionally to these experiments, solar cell results are presented, for which the active layer is grown with two different growth rates on top of porous silicon (Psi) multilayer stack and on two different types of multicrystalline silicon substrates: UMG (Upgraded Metallurgical Grade) and OFFSPEC (Out-of spec silicon material treated as a waste from Integrated Circuits industry). (© 2009 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

One of the main challenges in the ongoing development of thin film crystalline silicon solar cells on a supporting silicon substrate is the implementation of a long-wavelength reflector at the interface between the epitaxial layer and the substrate. IMEC has developed such a reflector based on electrochemical anodization of silicon to create a multi-layer porous silicon stack with alternating high and low porosity layers. This innovation results in a 1–2% absolute increase in efficiency for screenprinted epitaxial cells with a record of 13� 8%. To reach a better understanding of the reflector and to aid in its continued optimization, several extensive optical simulations have been performed using an in-house-developed optical software programme. This software is written as a Microsoft Excel workbook to make use of its user-friendliness and modular structure. It can handle up to 15 individual dielectric layers and is used to determine the influence of the number and the sequence of the layers on the internal reflection. A sensitivity analysis is also presented. A study of the angle at which the light strikes the reflector shows separate regions in the physical working of the reflector which include a region where the Bragg effect is dominant as well as a region where total internal reflection plays the largest role. The existence of these regions is proved using reflection measurements. Based on these findings, an estimate is made for the achievable current gain with an ideal reflector and the potential of epitaxial silicon solar cells is determined. Copyright # 2008 John Wiley & Sons, Ltd.

Thin film epitaxial silicon solar cells are considered a near future alternative to bulk silicon solar cells. However due to the limited thickness of the active layer they require efficient light trapping. Therefore we propose the development and implementation of such light confinement by means of a porous silicon (PS) intermediate reflector at the epi/substrate interface. The formation of the reflector is done by electrochemical etching of a highly doped Si substrate into a multilayer stack (Bragg-optical reflector), and is followed by epitaxial deposition of the active layer. The implementation of the PS reflector however requires detailed analysis of many problematic issues, foremost the optical optimisation of the stack for internal reflection at the Si/PS/Si interface. Other topics include the pore rearrangement during high-temperature CVD as well as the quality of the epitaxial layer grown on porous silicon. Another challenge is the resistance within the PS layers. For that purpose, SRP (Spreading Resistance Probe) and resistance measurements were performed to determine the conductive properties of rearranged PS. First cells with a 9-layer porous silicon reflector gave a very promising efficiency of 13.5% which is 1.5% higher compared to cells without internal reflector.

Thin-film epitaxial silicon solar cells are an attractive future alternative for bulk silicon solar cells incorporating many of the process advantages of the latter, but on a potentially cheap substrate. Several challenges have to be tackled before this potential can be successfully exploited on a large scale. This paper describes the points of interest and how IMEC aims to solve them. It presents a new step forward towards our final objective: the development of an industrial cell process based on screen-printing for >15% efficient epitaxial silicon solar cells on a low-cost substrate. Included in the discussion are the substrates onto which the epitaxial deposition is done and how work is progressing in several research institutes and universities on the topic of a high-throughput epitaxial reactor. The industrial screen-printing process sequence developed at IMEC for these epitaxial silicon solar cells is presented, with emphasis on plasma texturing and improvement of the quality of the epitaxial layer. Efficiencies between 12 and 13% are presented for large-area (98cm 2 ) epitaxial layers on highly doped UMG-Si, off-spec and reclaim material. Finally, the need for an internal reflection scheme is explained. A realistically achievable internal reflection at the epi/substrate interface of 70% will result in a calculated increase of 3 mA/cm 2 in short-circuit current. An interfacial stack of porous silicon layers (Bragg reflectors) is chosen as a promising candidate and the challenges facing its incorporation between the epitaxial layer and the substrate are presented. Experimental work on this topic is reported and concentrates on the extraction of the internal reflection at the epi/substrate interface from reflectance measurements. Initial results show an internal reflectance between 30 and 60% with a four-layer porous silicon stack. Resistance measurements for majority carrier flow through these porous silicon stacks are also included and show that no resistance increase is measurable for stacks up to four layers.

High surface area mesoporous silicon is prone to sintering, which can be an issue for some applications and be exploited for others. The mechanisms of silicon sintering, conditions that promote it, methods of characterizing, effects on properties, and potential uses are reviewed.

Epitaxial thin film silicon solar cell technology is one of the most promising midterm alternatives for cost effective industrial solar cell manufacturing. Here, CVD is used to grow the active base layer. However, also the emitter can be grown by CVD, with doping profiles as desired. In this paper, solar cell processes are established integrating both a two-step CVD grown emitter, and state-of-the-art concepts for optical light trapping in epitaxial cells. In this way, the significant increase in Voc is combined with an improved short-circuit and leads to a record efficiency of 16.1% with a current density of 33.2 mA/cm2, approaching the Jsc of bulk silicon solar cells.

Stacks of porous silicon layers have been successfully applied to maximize internal reflection at the interface between a silicon substrate and an epitaxially grown layer. The stack is consist of alternating porous layers of high and low porosity, defined by the quarter-wavelength rule. During the hydrogen bake prior to epitaxial growth of the epitaxial layer, the porous silicon stack crystallizes in the form of thin quasi-monocrystalline silicon layers incorporating large voids. Experimental data of the measured external reflectance have been linked to the internal reflectance. An optical-path-length enhancement factor of seven was calculated in the wavelength range of 900-1200 nm. Application on thin-film epitaxial solar cells showed a 12% increase in short-circuit current and efficiency

Epitaxial thin film silicon solar cell technology, consisting of a thin high quality epitaxial layer on top of a highly doped low-cost silicon substrate, is one of the most promising midterm alternatives for cost effective industrial solar cell manufacturing. Currently, CVD is used to grow the active layer. However, besides the growth of the base, also the emitter can be grown by CVD, which allows the growth of almost any doping profile, designed as desired to optimize the emitter and base properties. A two step emitter with a highly doped top layer acting as a front surface field and a moderate doped bulk layer was designed and tested. Very sharp transitions between the different epi-layers boost the open-circuit voltage drastically up to values around 650 mV. However, the Jsc of those cells were limited to values around 29 mA/cm2. To enhance the Jsc, light trapping methods are introduced to enhance the optical thickness of the 20 µm thick active base. In this paper, solar cell processes are established integrating both a CVD grown emitter, and state-of-the-art concepts for optical light trapping in epitaxial cells. In this way, the significant increase in Voc is combined with an improved short-circuit currents and leads to a record efficiency of 16.1% with a current density of 33.2 mA/cm2, approaching the Jsc of bulk silicon solar cells.

In order to overcome the shortage of silicon feedstock that is currently affecting the photovoltaic industry, many efforts are being dedicated to the search of alternative substrates for solar cells. One of the possible solutions is to use low-cost substrates of upgraded metallurgical silicon, for which there are no supply issues. The solar cell is built on a thin layer of high quality silicon which is epitaxially grown over this substrate, with the use of a high throughput epitaxial reactor of novel design. This reactor can be fed with electronic grade source gases or with gases obtained in situ from metallurgical silicon. A reactor prototype has been constructed with a capacity of 50 wafers per run and a deposition velocity of approximately 2 microns per minute. The production of chlorosilanes by Si etching and the recirculation of gases for maximum efficiency are being studied. A solar cell process specific for these substrates has been developed, achieving an efficiency of 12,8%. Further improvements on the solar cell process are under investigation, with special emphasis on light trapping by plasma texturing and the application of a porous Si layer as internal reflector. A preliminary market study has been performed to understand the role of silicon feedstock in the current photovoltaic market and its projection in the next decades, looking at the expected role of epitaxial solar cells.

The studies of porous silicon as a one-dimensional photonic crystal have led to solutions allowing the fabrication of broad photonic band gaps as large as several hundreds nanometers for various types of applications. In this work we demonstrate the use of the chirping process, i.e., the gradual increase in the spatial period of the structure, as it is used in image processing, to design porous silicon broad-band reflectors for thin-film silicon solar cells. Modeling of those layers is done using linear design method and a simulation software. Such chirped structures are fabricated by an anodization process. Samples are prepared on mono and multicrystalline silicon substrates with 15, 40, 60, and 80 layers. The reflectance spectra of such prepared porous reflectors are evaluated and the results show an increase in bandwidth of over 50% of the total width in comparison with the conventional, unchirped reflectors. We demonstrate clear advantages of introducing chirped multilayer structures over conventional...

A screen-printable copper paste has been developed by Dow Corning to replace the standard screen-printable silver paste for use in front busbars for solar cells. Solar cells produced with these ‘passivated copper busbars’ have shown increased conversion efficiency due to an improved device operating voltage and current while maintaining a similar fill factor when compared to cells with standard ‘fired-through’ silver busbars. In addition to the improved cell efficiency, the use of copper paste may provide major cost savings compared to the use of silver, potentially giving a very significant reduction in cost per Watt. 60-cell modules have been produced at Trina Solar with passivated copper busbars, showing similar performance to the reference modules with silver busbars. Module reliability has been shown to be well in excess of the IEC 61215 standard requirements.