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This paper proposed a red deer algorithm (RDA)-based selective harmonic elimination (SHE) method for multilevel inverters (MLIs). To eliminate the desired harmonic orders, the optimum switching angles of the MLI have been calculated using the proposed RDA. The calculated switching angles have been applied to the 3-phase cascaded H-bridged 11-level inverter. In addition, the performance of the proposed RDA method was compared with the results of methods such as the Newton-Raphson (NR) method, LSHADE/EpSin technique (LSHADE), whale optimization algorithm (WOA), and particle swarm optimization (PSO) used for the SHE problem in the literature. The results obtained prove that the proposed RDA optimization solves the SHE problems more effectively than other methods. It has also been observed that RDA produces good solutions in different modulation indexes.

The amplitude, frequency and phase angle of the grid voltage are essential three components to ensure synchronization for grid interactive inverters. Synchronous reference frame-phase locked loop (SRF-PLL) is widely used to obtain these components. Although the SRF-PLL shows a perfect performance under ideal grid conditions, its performance deteriorates under unbalanced and distorted grid conditions. Therefore, researchers have been working to provide more advanced PLL methods. A dual third order generalized integrator PLL (DTOGI-PLL) and quasi-type-1 PLL (QT1-PLL) are two PLL methods that have come to the fore in grid synchronization recently. As with any method, these PLL methods have both advantages and disadvantages. The aim of this study is to integrate the advantages of the two methods, and to develop a new PLL method with better performance than these two methods. It means that the proposed PLL has the adaptive filtering capability of the DTOGI-PLL and fast transient response of the QT1-PLL. The effectiveness of the proposed PLL is confirmed by experimental results. The experimental results demonstrate that the proposed PLL is a more effective method than the DTOGI-PLL and QT1-PLL under adverse grid conditions.

In this study, an advanced phase-locked-loop (PLL), which has a simple structure and a low computational burden is proposed. The proposed PLL also improves the dynamic performance and the filtering capability of the conventional three-phase enhanced-PLL (3pEPLL) significantly. The conventional 3pEPLL operates three individual EPLL blocks for each phase voltage and a fourth EPLL for estimation of the magnitude, frequency, and phase angle, which considerably increases the structural complexity and computational burden. However, the proposed PLL called enhanced-3pEPLL (E2PLL) employs only two single-phase EPLL modules in its pre-filtering stage. A moving-average-filter (MAF) is also supplemented on the error signal path of these EPLL modules, which allows smoother estimation of the magnitude, frequency, and phase angle, and improves the filtering capability of the EPLLs. Unlike the conventional 3pEPLL, the proposed E2PLL employs a quasi-type-1 PLL (QT1-PLL) to estimate the magnitude, frequency, and phase information of the fundamental grid voltage. The structure of QT1-PLL is similar to a type-1 PLL, which offers a low transient response time. The small-signal model of the proposed PLL is derived for stability analysis and parameter design procedure. The effectiveness of the E2PLL is verified owing to experimental results and comparison with the conventional 3pEPLL and QT1-PLL.

This study aims to find the optimum switching angles in an asymmetric cascaded H-bridge multilevel inverter (CHB-MLI) powered by photovoltaic (PV) panels. Red Deer Algorithm (RDA), a newly developed algorithm, has been applied to solve the selective harmonic elimination (SHE) equations. The calculated switching angles are used to obtain a 19-level output voltage using only 3 different amplitude DC sources and 3 H-bridge modules in Matlab/Simulink. The simulation results show that the RDA can accurately and quickly suppress selected harmonics while controlling the fundamental voltage with less than 0.06% error in the modulation index range of 0.2 to 1.0. The proposed RDA optimization has eliminated the selected harmonics without complex analytical calculations and reduced the total harmonic distortion.

In grid interactive power converter applications, phase locked loop (PLL) algorithms are very important to realize grid synchronization. The performance of PLL should not be affected by adverse conditions such as voltage unbalance, harmonics, frequency and phase changes. Otherwise, synchronization errors occur between the grid interactive inverter and the grid. In this paper, two different PLL algorithms are simulated by modeling under MATLAB/Simulink. The performances of the PLLs are comparatively presented under four different grid conditions such as balanced, unbalanced, harmonics and variable frequency. In this study, synchronous reference frame-PLL (SRF-PLL) and decoupled double synchronous reference frame-PLL (DDSRF-PLL) which are mostly used, state-of-arts and effective PLL algorithms are analyzed by modeling in grid synchronization applications. It has also been demonstrated the positive and negative aspects of the PLLs based on the obtained results.

Recently, several approaches with the ability to reject the DC-offset in phase locked loop (PLL) methods have been developed. These approaches include different filtering structures which can be classified into two categories: prefiltering before the PLL input and in-loop filtering in the PLL control loop. As highlighted in the literature, the DC-offset rejection methods based on in-loop filtering have received less attention due to their slow dynamic performance. Therefore, this paper proposes an alternative DC-offset rejection technique as in-loop filtering of the PLL. The effectiveness of the proposed PLL is confirmed by simulation and experimental results.

In recent years, to fast and accurately extract the grid voltage information, using cascaded delayed signal cancellation (CDSC) operators in the prefiltering stage of phase locked loops (PLLs) has become highly popular. Non-adaptive CDSC (NCDSC) operators do not cause the stability problems unlike adaptive CDSC operators. So, researchers use the NCDSC operators intensely. Nonetheless, the NCDSC operators have two main drawbacks: (1) the dynamic responses of NCDSC-PLLs are not fast enough, similar to adaptive CDSC operators-based PLLs; and (2) the imbalance rejection capability of the NCDSC-PLLs dramatically deteriorates in case of large frequency variations. In this paper, to overcome these problems, two enhanced NCDSC-PLLs, which are called the ENCDSC-PLL1, and ENCDSC-PLL2, are suggested. The parameter design procedures of suggested PLLs are given by means of their small- signal models. Since the proposed ENCDSC-PLLs are the nonminimum-phase systems, their stability analyses are evaluated by Nyquist diagram. The feasibility and effectiveness of the proposed ENCDSC-PLLs are validated by experimental results.

Brushless DC motor (BLDCM) has been widely used in many different fields such as high efficiency and dynamic response and high speed range in recent years. Since the BLDC motor driver does not behave, it is complex to control it via the proportional-integral (PI) controller. In this article, the mathematical model of the BLDC motor and artificial neural network algorithm is derived to make the BLDC motor control. On the proposed drive, the controller synchronizes quickly with speed, learning the motor speed to follow and load quickly. The effectiveness of the proposed method is demonstrated by the model developed in MATLAB / Simulink. The simulation results show that the proposed artificial neural network controller provides a significant improvement in control performance compared to the PI controller for both control reference speed changes and load changes.

In grid interactive power converter applications, phase locked loop (PLL) methods are very important to realize grid synchronization. The performance of PLL which is used should be affected by adverse conditions such as voltage unbalance, harmonics, frequency and phase changes. Furthermore, in these adverse conditions, the phase angle of grid voltages and positive sequence component of grid voltages in fundamental grid frequency are needed to determine quickly and accurately. Otherwise, synchronization errors occur between the grid interactive inverter and the grid.In this paper, different PLL methods are simulated under MATLAB/Simulink. The performances of the PLL methods are comparatively presented under three different conditions such as unbalanced, harmonics and variable frequency grid. It has also put forward the positive and negative aspects of the PLL methods based on the obtained results., Şebeke etkileşimli güç dönüştürücü uygulamalarında, şebeke senkronizasyonunun gerçekleştirilebilmesi için faz kilitleme döngüsü (PLL) yöntemleri oldukça önemlidir. Kullanılan PLL’nin performansı; gerilim dengesizliği, harmonikler, frekans ve faz değişimi vb. olumsuz durumlardan etkilenmemelidir. Üstelik bu olumsuz durumlarda, şebeke faz açısının ve temel şebeke frekansındaki pozitif sıralı bileşen geriliminin hızlı ve doğru bir şekilde belirlenmesi gerekir. Aksi durumda, şebeke etkileşimli dönüştürücü ile şebeke arasında senkronizasyon hataları meydana gelmektedir.Bu makalede, farklı PLL yöntemlerinin MATLAB/Simulink’te benzetimi yapılmıştır. Dengesiz, harmonikli ve değişken frekanslı şebeke durumu gibi üç farklı şebeke koşulu altında PLL yöntemlerinin performansları karşılaştırmalı olarak sunulmuştur. Ayrıca, elde edilen sonuçlara dayanarak PLL yöntemlerinin artı ve eksi yönleri ortaya konulmuştur.

Recently, various phase locked loop (PLL) methods have been improved for a reliable and robust synchronization under non-ideal grid conditions. One of the PLLs is a hybrid PLL (HPLL) which is an improved structure of the quasi-type-1 PLL (QT1-PLL) method. In this paper, an enhanced HPLL that offers both fast transient response and increased disturbance rejection capability for dominant harmonics is proposed. The proposed PLL includes adaptive all-pass-filters (APFs) in pre-filtering stage to eliminate fundamental frequency negative sequence (FFNS) component. Thus, window-width of the moving average filter (MAF) is reduced by three times compared with the HPLL by means of removing the FFNS component. So, the proposed PLL, which is called fast-hybrid PLL (FH-PLL), considerably ensures a fast transient response. Also, in case of grid faults (for example, type-B, type-C, type-D, and etc.), at the same time frequency change occurs, the FH-PLL completely blocks the FFNS component by means of using adaptive DAPF. In this study, it is experimentally implemented HPLL, QT1-PLL, and the proposed FH-PLL methods. The effectiveness of the FH-PLL is verified owing to experimental results and comparison with the QT1-PLL and HPLL.

Nowadays, electrical energy produced from the renewable energy sources (RES) tends to increase day by day to meet the increasing energy demand. Also, RES enable energy to be obtained more economically and cleanly. Electrical energy based on the RES is preferred to transfer to electrical grid instead of storing. However, this energy is not transferred to the grid directly because of usability and efficiency. Therefore, grid tied inverter which is transferred electrical energy to the grid is used and inverter control mechanism is so important. On the other hand, the inverter output voltages must be synchronized with grid voltages. So, the phase angle and amplitude of the grid voltages must be obtained accurately and fast. To achieve a suitable grid synchronization, phase locked loops (PLL) are widely used. In this paper, a three-phase space vector pulse width modulation (SVPWM) controlled grid tied inverter is simulated in MATLAB/Simulink and implemented with $\mathrm {T}\mathrm {M}\mathrm {S}320\Gamma 2\mathrm {S}335$ DSP. All simulation and experimental results confirm that the output voltages of the grid tied voltage source inverter are compatible with the grid and grid synchronization is successfully achieved thanks to the PLL algorithm.

When people realize that almost halfof life is on the way, they will understand that the route should be asimportant and careful as home and work. The compulsory lighting that is beingdone for this purpose is also the most important part of our city lighting. Notonly the intersections and the squares, but also the inner and outer city,roads in all sizes and functions, must be illuminated. The fact that theenlightenment in an environment can be characterized as successful depends onthe complete fulfilment of the requirements of the design, application and usephases, which are complementary to each other in the lighting process. Inoutdoor lighting systems, calculations must be based on standards. Otherwise,unwanted consequences will occur in the illuminating space. Thisarticle emphasizes the steps of the design, application and use phases of lightingprocess and their relation to each other. In addition, road lighting, which isa branch of outside lighting, is compared with both classical and computeraided methods and results are evaluated., İnsanlar neredeyse hayatın yarısınınyolda geçtiğini fark ettiği zaman, o güzergâha, en az evi ve işyeri kadar önem veözen göstermesi gerektiğini anlayacaklardır. Bu amaçla yapılmakta olan zorunluaydınlatma da, şehir aydınlatmamızın en önemli kısmını oluşturmaktadır. Sadecekavşak ve meydanların değil, şehir içi ve dışı, her ölçekte ve işlevdekiyolların mutlaka aydınlatılması gerekmektedir. Bir ortamdaki aydınlatmanınbaşarılı olarak nitelendirilebilmesi, aydınlatma sürecinde birbirlerinintamamlayıcısı olan tasarım, uygulama ve kullanım evrelerindeki gereksinimlerineksiksiz olarak yerine getirilmesine bağlıdır. Dış aydınlatma sistemlerindehesaplamaların standartlar bazında olması gerekir. Aksi takdirde aydınlatanmekânda istenmeyen sonuçlar vuku bulacaktır. Bu makalede aydınlatma sürecindeki tasarım, uygulama ve kullanımevrelerinin ilkesel adımları ve birbirleriyle olan ilişkileri vurgulanmıştır.Ayrıca dış aydınlatmanın bir kolu olan yol aydınlatmasını hem klasik hem debilgisayar destekli yöntemle karşılaştırılmalı hesaplamalar yapılmış vesonuçlar değerlendirilmiştir.

Multilevel inverters have been used in medium or high voltage levels of the power applications to get low total harmonic distortion (THD). Several techniques have been emerged to decrease the THD of the output voltage in multilevel inverter. One of these techniques is Selective Harmonic Elimination (SHE) that has an extensive research area in the field of power electronics. In addition, it is an alternative to usual PWM techniques and includes nonlinear equations of stepped voltage waveform. In this paper, conventional multilevel inverter structures have been analyzed and it is concluded that cascaded H-bridge topology needs lower device component. According to this implication a multilevel inverter topology with reduced number of switches which resembles the cascaded H-bridge topology and enables a reduction in the system cost has been proposed, and solution of SHE equations have been optimized using Genetic Algorithm (GA). The results of analysis and simulation obtained have evidently proved that proposed GA based SHE technique eliminates desired harmonic order.

Matrix converter is an energy conversion device which directly connects a three-phase voltage source to a three-phase load without dc-link components. Therefore, the output of the matrix converter is directly affected by the disturbance or imbalance in the input voltages. Many researchers have made an effort to overcome this problem in recent years. In this paper, the behaviors of the matrix converter controlled with the optimum-amplitude Venturini method are investigated and a novel compensation technique based on fuzzy logic controller is proposed to eliminate the undesirable influences of the input voltage under the distorted input voltage conditions. The proposed technique is based on closed loop control of the three-phase output current to enhance the output performance of the matrix converter. The mathematical model of the proposed system is developed. The simulation of the development model is performed in Matlab&Simulink. Some results demonstrating validity of the proposed compensation technique are presented.

Electrical energy's transfer, obtained from the wind energy systems, directly to the grid or load is not possible in terms of efficiency and usability. For these reasons, grid interactive inverters are largely used for wind energy systems. In this study, three phase grid interactive Voltage Source Inverter (VSI) controlled by Space Vector Pulse Width Modulation (SVPWM) has been performed. The current controller model, Proportional-Integral (PI) controller regulated the injected grid current, has been implemented as the grid interactive VSI control model. In order to operate between inverter and grid synchronously, the phase angle of grid voltage is detected by using Phase Locked Loop (PLL) in dq-synchronous reference frame. This system has been simulated under MATLAB/SIMULINK. Simulation results illustrate that inverter output voltages are in same phase and frequency with grid voltages.

Space Vector Pulse Width Modulation (SVPWM) technique is extensively used to control the three-phase voltage source inverter (VSI) of wind energy systems. The main advantages of SVPWM method are fixed switching frequency, low harmonic content and higher DC bus utilization. In terms of the use of the DC bus voltage compared to conventional PWM method provides 15.15% more efficient usage. This paper focuses on SVPWM controlled three-phase VSI simulated under MATLAB/SIMULINK.

Multilevel inverter is energy conversion device that is generally used in medium-voltage and high-power applications. It offers lower total harmonic distortion, switching losses and voltage stress on switches than conventional inverter. In this chapter, the topologies of the conventional multilevel inverters are discussed and a novel multilevel inverter topology with the reduced number of power switches is proposed. Also, a modulation technique for the proposed multilevel inverter is introduced. This multilevel inverter structure consists of the level module units to enhance the level of the output voltage. Since a level module unit consists of only a DC voltage source and a bidirectional switch, this structure allows a reduction of the system cost and size. Effectiveness of the proposed topology has been demonstrated by analysis and simulation.

Multilevel inverters (MLI) have been commonly used in industry especially to get quality output voltage in terms of total harmonic distortion (THD). In addition, development in semiconductor technology and advanced modulation techniques make MLI implementation more attractive. Selective Harmonic Elimination (SHE) that can be applied MLI at desired switching frequency offers elimination of harmonics in the output voltage. Also, by using SHE technique with cascaded H-bridge multilevel inverters, the necessity of using filter in the output can be minimized. In this paper, SHE equations have been solved by using of Genetic Algorithm (GA) Toobox&Matlab and it has been aimed to eliminate desired harmonic orders at fundamental output voltage. Simulation results have clearly demonstrated that GA based SHE techniques can eliminate the demanded harmonic orders.

Matrix converter (MC) is a direct energy conversation device without dc-link components. Therefore, the output of the converter is directly affected by the disturbances in the input voltages. Many researchers have made an effort to overcome this problem. In this paper, the behaviors of the MC have been investigated under the distorted input voltage conditions. A fuzzy logic control (FLC) based novel compensation method is proposed, which performs close loop control of the output current to improve the output performance of the MC. Some results are presented to prove the effectiveness of the proposed compensation technique.