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Image dehazing algorithm can restore a hazed image back to a haze-free image. Dark channel prior (DCP) is an efficient technique to estimate an airlight owing to its effectiveness. However, DCP causes considerable computation burdens, limiting its hardware efficiencies. To overcome this limitation, a smooth DCP (SDCP) technique is proposed in this study. The experimental results show that this study can save computation burdens by 70.9% with a minor loss of 1.03% on the accuracy of airlight estimation. Consequently, this study can greatly reduce computation burdens of DCP while keeping an accurate airlight estimation.

With rapid economic growth, air pollution is becoming an important issue in China. This paper investigates the relationship between air pollution and economic growth using an augmented green Solow model. Using the prefecture-level data of 284 cities in China during the period from 2004 through 2015, we investigate the environmental Kuznets curve (EKC) using spatial dynamic panel data models. Our model suggests an inverted U-shaped EKC, and the peak will come earlier due to the spillover effect of abatement technology. The shape of the EKC is supported by empirical evidence and is robust when we group cities by income level, region, and secondary industry. We also show that the shape of the EKC is sensitive to the model specification of dynamic and spatial features.

A direct digital frequency synthesizer (DDFS) using an analog-sine-mapping technique is presented in a 0.35-μm SiGe BiCMOS process. We intend to apply the translinear principle to develop a triangle-to-sine converter (TSC) that can achieve outputs with low harmonic content. The TSC is introduced for the DDFS to translate phase data to sine wave. Using this analog-interpolating technique, the DDFS, with 9 bits of phase resolution and 8 bits of amplitude resolution, can achieve operation at 5-GHz clock frequency and can further reduce power consumption and die area. The spurious-free dynamic range (SFDR) of the DDFS is better than 48 dBc at low synthesized frequencies, decreasing to 45.7 dBc worst case at the Nyquist synthesized frequency for output frequency band (0-2.5 GHz). The DDFS consumes 460 mW at a 3.3-V supply and achieves a high power efficiency figure of merit (FOM) of 10.87 GHz/W. The chip occupies 1.5 × 1.4 mm2.

An LC-type voltage-controlled oscillator (VCO) and a push-push frequency doubler are presented for 20/40-GHz dual-band design in standard 0.13-μm CMOS. Combining the varactor with the transconductance-tuned regime, the VCO is realized to arrive at the range extension for high-frequency operation. In addition, a technique using sensitivity distribution is adopted to achieve linear tuning range. The VCO provides the tuning range of 19.8-22.6 GHz, and the measured phase noise at 21.2-GHz frequency is -105.7 dBc/Hz at a 1-MHz offset. The doubler following the VCO can provide twice the frequency over the tuning range and generate output with better fundamental rejection resulting from the notch characteristic. The measured phase noise of the doubler at 42.4-GHz frequency is -94.6 dBc/Hz at a 1-MHz offset while dissipating 8 mW in the whole circuit.