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In this study, we proposed using the high-K polyvinyl alcohol (PVA)/low-K poly-4-vinylphenol (PVP) bilayer structure as the gate insulator to improve the performance of a pentacene-based organic thin-film transistor. The dielectric constant of the optimal high-K PVA/low-K PVP bilayer was 5.6, which was higher than that of the single PVP layer. It resulted in an increase in the gate capacitance and an increased drain current. The surface morphology of the bilayer gate dielectric could be suitable for pentacene grain growth because the PVP layer was deposited above the organic PVA surface, thereby replacing the inorganic surface of the ITO gate electrode. The device performances were significantly improved by using the bilayer gate dielectric based upon the high-K characteristics of the PVA layer and the enlargement of the pentacene grain. Notably, the field-effect mobility was increased from 0.16 to 1.12 cm2/(Vs), 7 times higher than that of the control sample.

In recent years, active-matrix organic light-emitting diodes (AMOLEDs) has been the most popular display for portable application. To satisfy the requirement for the application of the portable display, the design of the compensating pixel circuit with the low-voltage driving and low-power consumption will be requested. In addition to the circuit with the design of the low-voltage driving, high-mobility thin-film transistors as driving device will be also necessary in order to supply larger driving current at low-voltage driving. Therefore, the study presents a new low-voltage driving AMOLED pixel circuit with high-mobility amorphous indium&ndash, zinc&ndash, tin&ndash, oxide (a-IZTO) thin-film transistors (TFTs) as driving device for portable displays with high resolution. The proposed pixel circuit can simultaneously compensate for the threshold voltage variation of driving TFT (&Delta, VTH_TFT), OLED degradation (&Delta, VTH_OLED), and the I-R drop of a power line (&Delta, VDD). By using AIM-Spice for simulation based on fabricated a-IZTO TFTs with mobility of 70 cm2V&minus, 1S&minus, 1 as driving devices, we discovered that the error rates of the driving current were all lower than 5.71% for all input data when &Delta, VTH_TFT = &plusmn, 1 V, &Delta, VDD = 0.5 V, and &Delta, VTH_OLED = 0.5 V were all considered simultaneously. We revealed that the proposed 5T2C pixel circuit containing a high-mobility a-IZTO TFT as a driving device was suitable for high-resolution portable displays.

The fabrication of memory devices based on the Ag/PMMA:Na/Ag structure and their electrical characteristics are reported. The Ag/PMMA:Na/Ag devices show a hysteresis behavior with different Na contents. The most evident hysteresis behavior for memory effect, represented as the on/off current ratio, is found to be as high as 105 in Ag/PMMA:Na-180 s/Ag devices. The carrier conduction mechanisms between the high and low resistance states and the transition states are further examined on the basis of trap-assisted space charge limited current theory. Such devices sustain at least 60 operation iterations and 100 s duration tests. Hence, the idea of incorporating Na particles into the organic layer of memory devices creates a promising direction for the development of organic memory devices.

The linear-regime transfer properties of the annealed pentacene-based organic thin film transistors (OTFTs) in air at various temperatures up to 375K are examined. It is found that the linear-regime carrier mobility increases with increasing annealing temperature reaching a maximum at 350K, and then decreases with further increasing of annealing temperature beyond that point. However, an increase in annealing temperature leads to the shift of the threshold voltage towards positive gate-source voltages. An analysis through the temperature-dependent transfer characteristics of OTFTs reveals that the increased carrier mobility is the result of the reduced values of the hopping distance and the barrier height for hopping. Display Omitted The thermal annealing effect on carrier transports in pentacene is researched.The linear-regime carrier mobility is increased by thermal annealing at 350K.The temperature-dependent transfer characteristics exhibit the hopping behavior.Annealing leads to a change in the hopping conduction behavior.Annealing leads to the reduced values of hopping distance and barrier height.

Developing better contacts on dielectrics is one of the main challenges for pentacene-based transistor technology. This study investigates the effect of inorganic dielectrics on the temperature-dependent electronic property of pentacene films. It is found that the carrier mobility in the pentacene film deposited on a SiN x dielectric is higher than that in the pentacene film deposited on a SiO2 dielectric. However, the carrier density does not change substantially. The dependence of the carrier mobility upon temperature indicates the dominance of tunneling (hopping) at low (high) temperatures. The Hall-effect analysis by using the polaron theory revealed that the enhanced carrier mobility is due to the modified spacing between molecules in the pentacene layer.

The effect of a metallic front gate on the temperature-dependent electronic property of pentacene films was investigated in this study. The carrier mobility exhibits strong temperature dependence, implying the dominance of tunneling (hopping) at low (high) temperatures. The room-temperature mobility was drastically increased by capping an In (Au) layer on the pentacene front surface. However, the carrier concentration is not affected. An increase in the phonon energy occurs for In-capped or Au-capped pentacene samples, which corresponds to the abrupt transition to the nonlocal electron–phonon coupling. The enhanced mobility by capping a metal layer is attributed to a change in the electron–phonon coupling.

This study investigates the effect of different types of SiO 2 on the electronic and surface properties of pentacene films. Developing better contacts on dielectrics is one of the main challenges for pentacene-based transistor technology. The water contact angle variation indicates more hydrophobic thermally grown SiO 2 surfaces than sol–gel SiO 2 surfaces, suggesting that the thermally grown SiO 2 dielectric enables a better molecular arrangement as the pentacene layer is deposited. It is found that the carrier mobility in pentacene on thermally grown SiO 2 dielectrics is higher than that in pentacene on sol–gel SiO 2 dielectrics. The Hall-effect analysis by using the polaron theory revealed that the enhanced carrier mobility is due to the increased spacing between molecules.

In this study, the effect of the incorporation of ZnO nanoparticles into poly(3-hexylthiophene) (P3HT) on photocurrent of P3HT/n-type Si diodes was examined. Charge detrapping/trapping phenomena are studied through time domain measurement for P3HT-based diodes and thin-film transistors. Hole detrapping was the dominant phenomena in P3HT (ZnO-doped P3HT) films. For higher density of ZnO, more holes can be released and induce higher photosensitivity of the device. ZnO influences the photoresponse by providing additional holes that serve to reduce the photocurrent time constant.

The fabrication of memory devices based on the Au/pentacene/heavily doped n-type Si (n+-Si), Au/pentacene/Si nanowires (SiNWs)/n+-Si, and Au/pentacene/H2O2-treated SiNWs/n+-Si structures and their resistive switching characteristics were reported. A pentacene memory structure using SiNW arrays as charge storage nodes was demonstrated. The Au/pentacene/SiNWs/n+-Si devices show hysteresis behavior. H2O2 treatment may lead to the hysteresis degradation. However, no hysteresis-type current-voltage characteristics were observed for Au/pentacene/n+-Si devices, indicating that the resistive switching characteristic is sensitive to SiNWs and the charge trapping effect originates from SiNWs. The concept of nanowires within the organic layer opens a promising direction for organic memory devices.

This study examined the electronic properties of annealed pentacene films in air at various temperatures up to 400 K for 1 min. The carrier mobility in pentacene samples exhibits unexpectedly strong temperature dependence, implying the domination of tunneling (hopping) at low (high) temperatures. Upon annealing temperature, the molecule structure is not affected. The room-temperature mobility was drastically increased from 2.42 to 4.73 cm2/V-s by thermal annealing at 350 K. Hall-effect analysis by using the polaron theory revealed that the enhanced mobility by proper annealing is due to the increased spacing between molecules.

We studied the Hall-effect mobility of pentacene films prepared by the thermal evaporating method with different substrate temperature. A crossover from coherent bandlike charge transport with mobilities up to several tens of cm2/V-s at low temperature to an incoherent hopping motion at high temperature is observed. The carrier mobilities of pentacene exhibit a hopping-to-band transition around room temperature. An exhibition of high mobility of pentacene films prepared with substrate temperature of 90 °C is attributed to the increased spacing between molecules.

We report on the effect of ultraviolet (UV) treatment on the specific contact resistance (ρ) and electronic transport at the Ti/ZnO interfaces. The experimental results show the same barrier height of Ti/ZnO samples without UV treatment as Ti/ZnO samples with UV treatment and the higher ρ of Ti/ZnO samples with UV treatment than Ti/ZnO samples without UV treatment, suggesting the barrier-height independence of ρ. Based on the thermionic-emission model and x-ray photoelectron spectroscopy results, we found that the induced decrease in the number of the hydroxides at the surface region of ZnO by UV treatment resulted in decreases in the electron concentration near the surface region and the excess current component related to tunneling, increasing in ρ of Ti/ZnO samples.