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Recently, phase change memory is one of highly developed memory products; however, further research is needed to manage intrinsic variations in switching voltage and resistance drift, which is crucial for high density memory development. Current–voltage characteristics, their temperature dependence, and voltage‐dependent resistance switching characteristics at various programming times are investigated. These data provide an indirect characterization of microstructural phase distribution in the phase change material during memory operations. Subthreshold current–voltage symmetry in phase change memory cells can be used for identifying filamentary or non‐filamentary conducting paths, both of which are controllably formed by adjusting the programming time. This work may contribute to an improved operation method to mitigate intrinsic variations in phase change memories. Symmetry of current–voltage characteristicsprovides an indirect characterization of the microstructural phase distribution in the phase change material during memory operations. Observing current–voltage symmetry in the phase change memory cells leads to the identification of filamentary or non‐filamentary conducting paths, both of which are controllably formed by adjusting the programming time.

AbstractVariations of the leakage current behaviors and interface potential barrier height (ΦB) of rf-sputter deposited (Ba, Sr)TiO3(BST) thin films with thicknesses ranging from 20 nm to 150 nm are investigated as a function of the thickness and bias voltages. The top and bottom electrodes are dc-sputter-deposited Pt films. ΦBcritically depends on the BST film deposition temperature, postannealing atmosphere and time after the annealing. The postannealing under N2atmosphere results in a high interface potential barrier height and low leakage current. Maintaining the BST capacitor in air for a long time reduces the ΦBfrom about 2.4 eV to 1.6 eV due to the oxidation. ΦBis not so dependent on the film thickness in this experimental range. The leakage conduction mechanism is very dependent on the BST film thickness; the 20 nm thick film shows tunneling current, 30 and 40 nm thick films show Schottky emission current.

SrTiO3thin films with thicknesses ranging from 30 nm to 60 nm were grown on 6-inch-diameter, platinized Si wafers by liquid source metal-organic chemical vapor deposition (MOCVD). The crystalline quality and cation concentrations of the films are strongly dependent on the deposition temperature with optimum temperatures ranging from 500° C to 550° C. Semi-conformal deposition on submicron-sized storage node patterns is obtained but further improvements in conformality and reproducibility are required. The dielectric constant is about 210 irrespective of the film thickness and leakage current densities are sufficiently small for the dynamic random access memory (DRAM) applications. SiO2equivalent thickness (Tox) of the 30-nm-thick STO film is 0.51 nm. The finding that the leakage current density and dielectric constant are independent of the film thickness can be explained by a fully depleted model of the STO film.

High-dielectric Ba0.5Sr0.5TiO3(BST) thin films are grown on Ir and IrO2electrodes by a rf sputtering method. The structural and electrical properties of BST films are investigated. After postannealing at 750° C for 30 min in N2atmosphere, the interface between BST and IrO2remains flat and the IrO2does not show any structural change. On the other hand, a thin IrO2layer is formed at the interface between the BST and Ir after the same post-annealing. A larger grain size of BST film is obtained on the Ir electrode compared to that of BST film on the IrO2electrode. Dielectric constants of 36-nm-thick BST films on Ir and IrO2are 338 and 290, respectively. The leakage current densities of both the Pt/BST/Ir and Pt/BST/IrO2capacitors are about 20 nA/cm2at ±1.5 V, which is sufficiently small for application to dynamic random access memory devices.

The deposition characteristics of (Ba, Sr)TiO3(BST) thin films using a liquid source metal-organic chemical vapor deposition on a 6-inch-diameter Pt/SiO2/Si wafer were investigated. Ba(DPM)2tetraglyme, Sr(DPM)2tetraglyme and Ti(DPM)2(O-i-Pr)2, dissolved in n-butyl acetate, were used as the sources of Ba, Sr and Ti, respectively. Step coverage, within-wafer uniformities in composition and thickness of the BST films were investigated as a function of substrate temperatures ranging from 420° C to 570° C. As the substrate temperature decreased, the step coverage improved, whereas the within-wafer uniformities degraded. From BST films deposited in a temperature range from 450° C to 480° C, good step coverage (>80%), as well as good within-wafer uniformity were obtained. However, in that temperature range, hazy deposition was observed due to many humps on the surface. The humps are an agglomeration of crystalline grains and are a few hundred Å in diameter, which have a Ti-rich composition compared to flat film region.