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Abstract: High-k dielectric material stacks are considered to be a good candidate for tunnel barrier, replacing single SiO2 tunnel dielectrics in non-volatile flash memory. The use of low-k/high-k tunnel barriers was expected to enhance the electric field sensitivity with possibility of the reduction in operation voltage for Flash devices. In this work, we investigated the physical properties of (HfO2) x (SiO2)1−x with various compositions in conjunction with the tunneling characteristics of (HfO2) x (SiO2)1−x /SiO2 double dielectric structure for the application to charge trap flash memory(CTF) devices. The band-engineered (HfO2) x (SiO2)1−x /SiO2 double dielectric structure showed enhanced tunneling current above 2 V, while showed smaller tunneling current below 2 V because of increasing physical thickness of designed double layer structures. The band-engineered charge trap (CTD) device with (HfO2) x (SiO2)1−x /SiO2 double dielectric structure showed faster program/erase speed and larger memory window at same time and voltage compared to the CTD with a single SiO2 tunnel barrier. [Copyright &y& Elsevier]

Abstract: In this work, we investigated the physical properties of (ZrO2) x (SiO2)1− x such as band-gap, band-offset, structural stability, and the tunneling characteristics of (ZrO2) x (SiO2)1− x /SiO2 tunnel barrier with total EOT of 4.5nm for the application to charge trap memory devices. It was observed that the band-gap and band-offset of (ZrO2) x (SiO2)1− x can be controlled by changing the composition for (ZrO2) x (SiO2)1− x films. However, the sensitivity of band-gap and band-offset of (ZrO2) x (SiO2)1− x films on ZrO2 content was minimal for the cycle ratio of ZrO2:SiO2 above 1:1. The Zr-silicate film with the ZrO2:SiO2 cycle ratio of 1:7 maintained amorphous even after annealing at 1050°C. However, and Zr-silicate film with the ZrO2:SiO2 cycle ratio of 1:1 and 3:1 were crystallized after annealing at 950°C and 850°C, respectively. The band-engineered tunnel barrier of (ZrO2) x (SiO2)1− x /SiO2 bi-layer showed enhanced tunnel efficiency at high gate bias, while showed smaller tunnel current at low gate bias than a single SiO2 tunnel barrier of the similar EOT. [Copyright &y& Elsevier]