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2. Efficiency-Enhanced Dual-Input Transmitter Using Over-the-Air Combination for MIMO Systems

Author

Wu, Wenqi, Peng, Jun, He, Songbai, You, Fei, and Wang, Peng

Abstract

In this article, a dual-input transmitter (Tx) architecture with dual-power amplifier (PA) dual antennas is presented for multiple-input multiple-output (MIMO) systems. The baseband signal is split into two data streams with different peak-to-average power ratios (PAPRs) in the time domain, which are transmitted independently and recombined at the receiver antenna to boost Tx efficiency. An optimal PAPR and power-level configuration strategy is established, which is a constant threshold separation algorithm (CTSA), based on an efficiency prediction method and the distribution of modulation signals (MSs). In CTSA, the PAPR of the separated signal is correlated with the power level. Furthermore, a dynamic threshold separation algorithm (DTSA) is proposed to expand the solution space of the separated signal by decoupling the power from the PAPR of signals using an amplitude control factor. In addition, the spatial adjacent channel power ratio (ACPR) is utilized to evaluate the pollution to other systems in space by bandwidth expansion caused by signal separation. In DTSA, the optimal configuration strategy of PAPR and power under spatial ACPR constraints can be obtained. The Tx architecture is verified at 3.5 GHz with three different spatial ACPR requirements. For an MS with 8.4-dB PAPR, the optimal average efficiency of the Tx can be improved by $1.2\times $ compared with a uniform linear array (ULA) with 58% saturation efficiency of PAs. At the desired receptive end, the EVM and ACPR of the recombined signal achieve below -33 and -45 dBc, respectively, after linearization.

Published
2024
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3. An Analog Predistorter for Doherty Power Amplifiers Based on Minimum Gain and Phase Deviation

Author

Song, Minxian, He, Songbai, You, Fei, Zhang, Xubin, Zhong, Cheng, Yin, Yongwen, Xiao, Zehua, Tang, Haiqian, Guo, Junfu, and Hao, Peng

Abstract

This brief presents a design method of analog predistorter (APD) for Doherty power amplifiers (DPAs) based on minimum gain and phase deviation to improve the output adjacent channel leakage power (ACLR). To prove this method, the normalized deviation is formulated based on the non-linear analysis of DPAs’ gain and phase, which is a new joint design indicator between DPAs and APDs. Then an APD design and linearisation performance prediction platform is constructed using this indicator as the core. An APD consisting of two T-networks in series is designed as an example of an existing DPA. It has low circuit complexity and low power consumption, which can effectively improve the AM-AM and AM-PM of the DPA after optimization. Under the excitation of a 40 MHz, 64-QAM modulated signal, the results show that the ACLR of the DPA output is improved by nearly 10 dB with the proposed APD, from -34.4/-34.3 dBc to -43.9/-45.6 dBc. In case of constant output ACLR, the application of the APD also increases the output power and efficiency. Moreover, the proposed APD still has good linearization performance under the excitation of 80 MHz, 64-QAM modulated signal.

Published
2024
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4. High‐efficiency Doherty power amplifier based on codesign with bonding wires.

Author

Zhong, Cheng, He, Songbai, Song, Minxian, Shen, Ce, and Ma, Mingming

Subjects
*POWER amplifiers, *TRANSISTORS, *WIRE
Abstract

In this letter, a method for designing a Doherty power amplifier (DPA) using bare die and bonding wires (BWs) is proposed. This method adjusts the geometric parameters of BWs to achieve the desired transmission characteristics, allowing BWs to actively participate in the formation of the matching network, thus realizing the codesigning of the DPA and BWs. By designing appropriate BWs compensation to mitigate the intrinsic parasitics of bare die, the inherent obstacles caused by transistor parasitic effects are mitigated. This strategy offers a distinct advantage in terms of concurrently adjusting the target load impedance and phase, leading to a streamlined DPA design process. At the same time, the nonclipping impedance region is expanded, which attenuates the nonlinear effects of parasitic effects. On the basis of the proposed methodology, a DPA operating at 3–4 GHz is designed. Measured results show that the DPA achieves a saturation output power of 42.4–43.6 dBm in the operating band, accompanied by a drain efficiency of 55%–66%, while achieving 42%–54% at 6 dB output back‐off level. [ABSTRACT FROM AUTHOR]

Published
2024
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32. Design of a C-Band High-Efficiency Doherty Power Amplifier With Harmonic Control

Author

Shi, Wen, He, Songbai, Shi, Weimin, Shen, Ce, Li, Chuan, Wu, Jiayan, Xiao, Zehua, You, Fei, Shi, Wen, He, Songbai, Shi, Weimin, Shen, Ce, Li, Chuan, Wu, Jiayan, Xiao, Zehua, and You, Fei

Abstract

A design methodology of a C-band high-efficiency Doherty power amplifier (DPA) with harmonic control is presented in this letter. The equivalent parasitic network (EPN) of the packaged device is constructed by a deembedding technique. The phase delay caused by the transistor parasitics is calculated using the scattering matrix of the EPN. Besides, the influence of the phase delay on DPA design is analyzed. To improve the efficiency at output back-off (OBO) power level, postmatching network (PMN) is used to control the second harmonic. A high-efficiency DPA working over 6.4-7.1 GHz is implemented, fabricated, and measured. The DPA delivers a saturation output power ( $P_{sat}$ ) of 39.6-41.6 dBm. Meanwhile, the drain efficiencies in the interested frequency band are 45.1%-53.2% and 34.5%-43.1% at the $P_{sat}$ and 6-dB OBO power levels, respectively.

Published
2022

33. Harmonic‐tuned high‐efficiency GaN power amplifier with precise AM‐AM and AM‐PM characteristics.

Author

Haider, Muhammad F., Xiao, Zehua, You, Fei, and He, Songbai

Subjects
POWER amplifiers, GALLIUM nitride, AMPLITUDE modulation, IMPEDANCE matching
Abstract

An optimal balance between high efficiency and high linearity is one of the main performance metrics of modern base stations to handle the deep compression of the power amplifier (PA) module. In principle, the plethora of amplitude‐to‐amplitude (AM‐AM) and amplitude‐to‐phase (AM‐PM) distortions are issues worth exploring. Therefore, this paper presents a linearized harmonic‐tuned PA that operates at 2.4 GHz. The presented PA utilizes a compact input matching network (IMN) and output MN (OMN) with shunt‐connected tunable resonant circuits augmented by the stabilization network, whose presence greatly reduces the transistor parasitics and high‐order effects. Hence, a joint embodiment of each other gives optimal fundamental impedance matching alongside harmonic terminations and precise AM/PM waveform properties. The measurement results have shown that the fabricated PA exhibits peak saturated output power of 40.9 dBm and peak drain efficiency (DE) of 67%. In addition, the AM‐AM and AM‐PM curves under continuous‐wave excitation yield a gain flatness of 0.5 dB over a 37.5 dBm power range and ±3.5° phase distortion, respectively, when the input power level is swept up to the saturation level of 40 dBm. When driven with a 5 MHz 64‐QAM OFDM signal and 6.9 dB power back‐off, the manufactured PA meets the adjacent channel leakage ratio specification of −30 dBc at an average output power of 34.5 dBm. [ABSTRACT FROM AUTHOR]

Published
2023
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36. A Dual Power Mode GaN Doherty Power Amplifier Based on Cascode Transistors

Author

Ma, Mingming, primary, You, Fei, additional, You, Guanxiong, additional, Shen, Ce, additional, Xiao, Zehua, additional, Wu, Wenqi, additional, Chen, Yin, additional, Wang, Yu, additional, Tao, Hongqi, additional, Qian, Ting, additional, Guo, Runnan, additional, Zhang, Bin, additional, Wu, Tao, additional, and He, Songbai, additional

Published
2022
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47. Design of a C-band High Efficiency Power Amplifier With Compact Harmonic Control Network

Author

Shi, Wen, He, Songbai, Shi, Weimin, Shen, Ce, Li, Chuan, Xiao, Zehua, You, Fei, Shi, Wen, He, Songbai, Shi, Weimin, Shen, Ce, Li, Chuan, Xiao, Zehua, and You, Fei

Abstract

In this letter, the design of a C-band high efficiency power amplifier (PA) with a compact harmonic control network is presented. Based on the device model, the optimal fundamental and second harmonic load impedance were obtained by load-pull simulation. Then a simply fundamental matching network (FMN) is realized using the simplified real frequency technique (SRFT). To improve efficiency, a compact harmonic control network (HCN) based on a predesigned fundamental matching network is proposed. Besides, the microstrip radial stub (MRS) is used instead of the microstrip open-circuited stub to reduce the loss. A high efficiency PA working across 6.1-7.2 GHz is simulated and fabricated. Experimental results show that the fabricated PA delivers a saturated output power of 38.2-39.3 dBm with a drain efficiency of 43%-63.4% in the interested band. IEEE

Published
2021

48. Iterative Learning Control for Signal Separation in Dual-RF Input Doherty Transmitter

Author

Peng, Jun, Shi, Weimin, Pang, Jingzhou, You, Fei, He, Songbai, Peng, Jun, Shi, Weimin, Pang, Jingzhou, You, Fei, and He, Songbai

Abstract

Signal separation function is one of the key factors affecting the efficiency and linearity of the dual-RF input doherty transmitter (DIDT). In order to improve the linearity of DIDT, an optimization method of signal separation function based on iterative learning control (ILC) is proposed in this paper. Moreover, efficiency dictionaries which derived from the static characterization results are employed to ensure that the drain efficiency of final stage power amplifier does not degrade during iteration. The experimental results show that, for the 20 MHz test signal, the proposed method can improve adjacent channel power ratio (ACPR) of the output signal from -24.2 dBc to -49.6 dBc, meanwhile the average output power is increased form 37.8 dBm to 38.4 dBm, and the corresponding drain efficiency is 46.2% and 49.5% respectively. In this situation, auxiliary linearization techniques, such as DPD, can be omitted from the DIDT. © 2021 EuMA.

Published
2021

49. Design and Analysis of Continuous-Mode Doherty Power Amplifier With Second Harmonic Control

Author

Shi, Weimin, Wen, Shi, Peng, Jun, Feng, Linping, Gao, Yong, He, Songbai, Yue, Chik, Shi, Weimin, Wen, Shi, Peng, Jun, Feng, Linping, Gao, Yong, He, Songbai, and Yue, Chik

Abstract

While continuous-mode Doherty power amplifier (CM-DPA) can achieve high efficiency at output back-off (OBO) power levels, their achievable bandwidth and load modulation have not yet been fully investigated. This study reveals that the bandwidth of CM-DPA is limited by the impedance trajectories of the peaking transistors. In particular, the peaking transistor degrades the bandwidth in the high power region and limits the fractional bandwidth (FBW) of the CM-DPA. Moreover, based on post-matching Doherty architecture, an analytical method for harmonic control in CM-DPAs is presented. A broadband CM-DPA with harmonic control is implemented, fabricated and measured. The CM-DPA delivers a saturation output power (Psat) of 42.6–44.4 dBm from 1.50 to 2.55 GHz, i.e., FBW of 51.8%. The drain efficiencies in the interested frequency band are 50.7%–69.7% and 43.3%–57% at the Psat and 6-dB OBO power levels, respectively. IEEE

Published
2021

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