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Recent experiments have hinted towards an upcoming era of quantum utility, in which quantum hardware is able to outperform classical simulation methods for a variety of real-world applications. In this work, we show how application-inspired families of Clifford circuits can be used to benchmark the capabilities of current hardware for running certain applications, providing a prediction as to how measured expectation value fidelities scale with circuit depth. Considering the specific example of simulating kicked-Ising circuits, we benchmark a 127-qubit superconducting device and suggest how our circuits can also be used to benchmark recent classical simulation methods., Comment: 8 pages, 3 figures

We present a modular error mitigation protocol for running $\mathsf{BQP}$ computations on a quantum computer with time-dependent noise. Utilising existing tools from quantum verification and measurement-based quantum computation, our protocol interleaves standard computation rounds alongside test rounds for noise sampling and inherits an exponential bound (in the number of circuit runs) on the probability that a returned classical output is correct. We introduce a post-selection technique called \textit{basketing} to address time-dependent noise and reduce overhead. The result is an error mitigation protocol which requires minimal noise assumptions, making it straightforwardly implementable on existing, NISQ devices. We perform a demonstration of the protocol using classical noisy simulation, presenting a universal measurement pattern which directly maps to (and can be tiled on) the heavy-hex layout of current IBM hardware., Comment: 14 pages, 5 figures