279 results on '"Han, Zhengsheng"'
Search Results
2. On the Performance of Destructive Bond Strength Tests in Wedge Welding Stability
3. Jiezi: An open-source Python software for simulating quantum transport based on non-equilibrium Green's function formalism
4. C-V characterization of the trap-rich layer in a novel Double-BOX structure
5. Analysis of anomalous C-V behavior for extracting the traps density in the undoped polysilicon with a double-BOX structure
6. SOI radiation-hardened 300 V half-bridge date driver IC design with high dv/dt noise immunity
7. C-V measurement and modeling of double-BOX Trap-Rich SOI substrate
8. The Study of Hot Carrier Effects on Double SOI NMOSFETs
9. Design of compact-diode-SCR with low-trigger voltage for full-chip ESD protection
10. A 6-GHz 78-fsRMS Double-Sampling PLL With Low-Ripple Bootstrapped DSPD and Retimer-Less MMD Achieving −92-dBc Reference Spur and −258-dB FOM
11. Mitigation of Single-Event Upset Sensitivity for 6T SRAM in a 0.18 μm DSOI Technology Considering High LET Heavy Ions Irradiation
12. Impact of Back-Gate Bias and Body-Tie on the DSOI SRAMs Under Total Ionizing Dose Irradiation
13. A lateral superjunction SOI LDMOS with double-conductive channels
14. A snapback-free reverse-conducting IGBT with multiple extraction channels
15. Chemical Responsive Single Crystal Organic Magnet
16. The Drain Bias Modulation Effect of Random Telegraph Noise in Gate-All-Around FETs for Cryogenic Applications
17. Radiation effects of heavy ions on the static and dynamic characteristics of 850 nm high-speed vertical cavity surface emitting lasers
18. Single event upset for monolithic 3-D integrated 6T SRAM based on a 22 nm FD-SOI technology: Effects of channel size and temperature
19. SOI FinFET Design Optimization for Radiation Hardening and Performance Enhancement
20. Modeling of the Subthreshold Swing in Cryogenic MOSFET With the Combination of Gaussian Band Tail and Gaussian Interface State
21. A Snapback-Free and Low-Loss RC-LIGBT With Integrated Double Self-Biased nMOS
22. Robustness-Improved ESD Protection Devices With Low Leakage Using Middle Silicon Layer in Double SOI Technology
23. The Effects of $\gamma$ Radiation-Induced Trapped Charges on Single Event Transient in DSOI Technology
24. Influence of Back Gate Bias on the Hot Carrier Reliability of DSOI nMOSFET
25. Heavy Ion Displacement Damage Effect in Carbon Nanotube Field Effect Transistors
26. An RC-LIGBT With Dual Self-Driving nMOS For Enhancing Short Circuit Property and Modulating Electron Injection
27. An SOI LTIGBT With Self-Biased pMOS for Improved Short-Circuit Property and Reduced Turn-Off Loss
28. SOI radiation-hardened 300 V half-bridge date driver IC design with high dv/dt noise immunity
29. A Compact Model for Single-Event Transient in Fully Depleted Silicon on Insulator MOSFET Considering the Back-Gate Voltage Based on Time-Domain Components
30. Ultra‐Strong Comprehensive Radiation Effect Tolerance in Carbon Nanotube Electronics
31. Three-dimensional Simulation Methodology for Ionizing Radiation Effect in Ultra-scaled SOI FinFETs
32. A snapback-free RC-LIGBT with separated LIGBT and FWD
33. An Integrated Split and Dummy Gates MOSFET With Fast Turn-off and Reverse Recovery Characteristics
34. A FIN-LDMOS with Bulk Electron Accumulation Effect.
35. Investigation of interface traps at Si/SiO2 interface of SOI pMOSFETs induced by Fowler–Nordheim tunneling stress using the DCIV method
36. The radiation hardness of the nitrogen-fluorine implanted buried oxide layer in silicon-on-insulator materials against higher total dose irradiation
37. Ultra-strong comprehensive radiation effect tolerance in carbon nanotube electronics
38. A 19 ps Precision and 170 M Samples/s Time-to-Digital Converter Implemented in FPGA with Online Calibration
39. Bulk Electron Accumulation LDMOS With Extended Superjunction Gate
40. Ultra‐Strong Comprehensive Radiation Effect Tolerance in Carbon Nanotube Electronics.
41. A current reference with wide temperature operation range and low temperature drift
42. The ESD Characteristics of a pMOS-Triggered Bidirectional SCR in SOI BCD Technology
43. Total Ionizing Dose Radiation Effects Hardening Using Back-gate Bias in Double-SOI Structure
44. Three-Dimensional TID Hardening Design for 14 nm Node SOI FinFETs
45. A Bulk Full-Gate SOI-LDMOS Device With Bulk Channel and Electron Accumulation Effect
46. A snapback-free reverse-conducting IGBT with multiple extraction channels
47. Evolution of optical properties and molecular structure of PCBM films under proton irradiation
48. Radiation damage and abnormal photoluminescence enhancement of multilayer MoS2 under neutron irradiation
49. Engineering and Microscopic Mechanism of Quantum Emitters Induced by Heavy Ions in hBN
50. Dependence of Temperature and Back-Gate Bias on Single-Event Upset Induced by Heavy Ion in 0.2-μm DSOI CMOS Technology
Catalog
Books, media, physical & digital resources
Discovery Service for Jio Institute Digital Library
For full access to our library's resources, please sign in.