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The cascaded H-bridge (CHB) inverter is one of the most attractive multilevel topologies for renewable energy applications. Due to the fact that CHB inverters employ a large number of components, they suffer from a higher probability of fault, which reduces the system reliability. A fault-tolerant operation for a CHB inverter is described in this article. New features ensure reliable and robust operation of the converter in the event of a fault. The proposed strategy uses an additional cross-coupled CHB (X-CHB) unit in companion with the existing CHB units to support the output voltage and ensure continuity of operation in the event of an open/short-circuit fault. The operation of the proposed X-CHB inverter is described in detail. Simulation and experimental verification of the proposed concept are demonstrated using a seven-level CHB. Both simulation and experimental results confirm the fault-tolerant operation of the X-CHB for a battery energy storage system in case of switch faults.

A study is conducted to evaluate 1.2 kV silicon-carbide (SiC) MOSFETs in a cascaded H-bridge (CHB) three-phase inverter for medium-voltage applications. The main purpose of this topology is to remove the need for a bulky 60 Hz transformer normally used to step up the output signal of a voltage source inverter to a medium-voltage level. Using SiC devices (1.2-6.5 kV SiC MOSFETs) which have a high breakdown voltage, enables the system to meet and withstand the medium-voltage stress using only a minimal number of cascaded modules. The SiC-based power electronics when used in the presented topology considerably reduce the complexity usually encountered when Si devices are used to meet the medium-voltage level and power scalability. Simulation and preliminary experimental results on a low-voltage prototype verifies the nine-level CHB topology presented in this study.

This paper presents a high efficiency three-level Active Neutral-point Clamped (ANPC) inverter topology employing Silicon (Si) IGBTs for low frequency switches and hybrid Silicon (Si) and Silicon Carbide (SiC) switches for high frequency switches. The proposed semiconductor device configuration reduces both conduction and switching losses of the inverter so that a high efficiency, 99.5% peak, is achieved. The efficiency of the proposed ANPC inverter system is investigated and compared with other ANPC inverter configurations for different switching frequency and power factor values using PLECS. The investigation results show that the proposed ANPC inverter topology has higher efficiency than other ANPC inverter topologies for wide range of switching frequency and load power factor values. The cost of the semiconductor devices for the proposed inverter system is also estimated using off-the-shelf component prices obtained from Digi-key website. The cost estimation shows that the proposed ANPC inverter system has a cost at par with its silicon counterpart. Furthermore, since the proposed inverter system can be operated at much higher switching frequency compared to a silicon based inverter system, the cost of the passive components will be much lower.

This paper presents a new dc-link capacitor voltage balancing method for three-level Space Vector Modulation (SVM) strategies that are based on the space vector diagram of two-level inverters. The proposed method uses the time distribution of the local two-level zero vectors to achieve dc- link voltage balancing. It redistributes the zero vector times based on the magnitude and direction of the dc-link capacitor voltage deviations. The performance of the proposed capacitor voltage balancing method is compared with the conventional three-level SVM capacitor voltage balancing method that uses three-level redundant small vectors. The proposed method achieves significantly lower neutral-point voltage ripple compared to the conventional three-level SVM capacitor voltage balancing method for a wide range of modulation indices and load power factor values. Moreover, the code size and execution time are reduced by approximately 30 percent for use in microcontrollers.

For battery charger application, a wide switching frequency range is required for LLC resonant converter, which brings difficulties to magnetic components and driver circuit design, and the system efficiency would be degraded. To narrow the switching frequency range, in this paper, a novel topology based on the LLC and LCL-T resonant tanks is proposed. During the constant current (CC) charge mode, the proposed converter is operating with LCL-T resonant tank, which provides constant charging current; during the constant voltage (CV) charge mode, the structure of the proposed converter is modified to a traditional LLC resonant converter, and it is operating at the series resonant frequency to perform as a constant voltage source. Due to the high accuracy of these resonant tanks, the required operating switching frequency range can be significantly reduced. Operation principles and design considerations for the proposed converter are presented. Finally, experimental results are provided.

Photovoltaic (PV) grid-connected inverter exposes strong challenges to its efficiency, power density and reliability. This paper presents the system-level design and test of a 30 kVA grid-connected inverter. The designed inverter achieved peak efficiency of 99.3% and a specific power of 2 kW/L by using a hybrid switch based three-level (3-L) T-type neutral point clamped (TNPC) topology. The hardware prototype presents excellent dynamic current sharing and thermal distribution during the continuous test at rated voltage and power.

This paper presents a new carrier allocation technique for level-shifted carrier pulse width modulation strategy for five-level interleaved T-type voltage source inverters. The proposed modulation method avoids the simultaneous switching of the two interleaved inverter cells since only one of these inverter cells is undergoing switching for half of the fundamental period. The other inverter cell is clamped to either the positive dc bus, negative dc bus or midpoint of the dc-link capacitors. Therefore, the proposed modulation method achieves almost 50 percent switching loss reduction compared to the conventional phase-shifted carrier pulse width modulation strategy for interleaved voltage source inverters. The conduction loss of the inverter is slightly increased (by about 5 percent). But, the overall loss of the inverter is significantly reduced. The proposed modulation method is validated using experimental test.

This paper proposes a new seven-level X-Boost Active Neutral Point Clamped (7LX-BANPC) converter for renewable energy applications. It is a hybrid configuration that is formed by connecting a conventional ANPC with novel X-switches to enable it to boost the voltage and produce seven voltage levels. The proposed topology is capable of producing 7 voltage levels with a lower number of both semiconductor switches and passive elements compared to existing 7-level inverters. The proposed topology requires only one dc-power supply to boost the voltage to 1.5 times the input dc-link voltage. It consists of eight switches and three capacitors. A unique, cross-coupled switching configuration is presented to achieve extra voltage boosting. The theory of operation for the proposed topology is presented. In addition, simulations and experimental results are presented which validate the operating principles of the proposed topology.

Silicon carbide (SiC) MOSFETs have been widely used in different power conversion applications due to their advantages of high switching frequency and low loss. Parallel connection of SiC MOSFET is a cost-effective and necessary solution for high power rating converter. However, due to the differences of devices parameters, imbalance current exists, which may damage the system. In this paper, the issues of the paralleling SiC MOSFETs are well analyzed based on the static characteristics of the devices. Based on the analysis, we can find that the unbalanced transient current caused by the differences of threshold voltages are important and require to be mitigated when paralleling SiC MOSFETs. Then, the operational principles of the proposed variable gate voltage control are presented. Simulation and experiment results are presented and analyzed to validate the effectiveness of the proposed active gate driving method.

This paper presents a new modulation strategy for three-level interleaved voltage source inverters for switching loss reduction. By using two in-phase level shifted triangular carrier signals, the simultaneous switching of the two interleaved inverter cells is avoided. Only one of the interleaved inverter cells is undergoing switching for half of the fundamental period; the other inverter cell is clamped to either the positive dc bus or the neutral point of the inverter. Therefore, the switching loss of the inverter is reduced by 50 percent compared to the conventional phase-shifted carrier modulation technique for interleaved inverters. The conduction loss of the inverter is slightly increased (by about 5 percent), but the overall loss is significantly reduced. The validity of the proposed modulation method is verified using a 1kW experimental prototype.

Resonant converters have been widely used in many applications due to its soft switching capability and high efficiency characteristic. LLC and LCL-T resonant tanks are the most frequently used resonant topologies. For LLC resonant tank, at the series resonant frequency operating point, the output voltage is constant and independent of the load; at the parallel resonant frequency operating point, the output current is constant and independent of the load; for the LCL-T resonant tank, at the series resonant frequency operating point, the output current is constant. Although the characteristics of these resonant tanks have been investigated, the accuracy comparison among them are lack and unclear. Therefore, in this paper, the detailed derivations of these resonant tanks characteristics are presented; then, accuracy comparison among different characteristics are implemented with experimental results. The analysis results of this paper can provide guidance for engineers when analyzing and designing resonant converters.

Hold-up time operation is crucial for some applications, such as distributed power systems and server power supply, which requires voltage regulation capability when the DC bus voltage decreases in a wide range. For conventional LLC resonant converter, to satisfy the hold-up time requirement, a small magnetizing inductance value is required to boost the system output voltage, which will lead to large circulating current and efficiency degradation. To solve this problem, a novel hybrid pulse width modulation (PWM) and pulse frequency modulation (PFM) control strategy for LLC resonant converter is proposed, a bi-directional switch and auxiliary inductor is connected in parallel with the transformer. For the proposed topology, the PFM is adopted in the normal operation stage to achieve the output voltage regulation; while for the hold-up time operation, by controlling the duty cycle of the bi-directional switch, the equivalent magnetizing inductance value can be modified to satisfy the voltage gain requirement. Therefore, the LLC resonant converter can be designed only at normal operation stage. Operation principles, design considerations, and simulation and experiment results are presented in this paper.

The traditional single stage AC/DC converter suffers from a variable DC bus voltage that also affects the operation of the DC/DC unit. In this paper, a magnetically controlled single stage LLC resonant converter is proposed for low power applications, and it has the following features: 1) single stage operation; 2) inherent power factor correction function; 3) almost constant DC bus voltage; 4) fixed switching frequency and duty cycle operation; 5) the LLC resonant converter is operating at the series resonant frequency point, which is the highest efficiency point, so the converter can always achieve the maximum efficiency operation; 6) soft switching operation for all semiconductors can be achieved. Finally, a 75 W experimental prototype was built to validate the proposed converter.

The design considerations for power converters operating at room or at ultra-low temperatures are the same in terms of power density, reliability, and efficiency. In order to design power converters at cryogenic temperatures, the passive and active components should be carefully selected. Understanding the behavior of the components at cryogenic temperatures leads to power converter systems that have many superior advantages such as high power density (reduced size and volume), higher efficiency (reduced system losses), and even increased system reliability. This paper reviews the status of the recent research on the cryogenic temperature behavior of Si semiconductor devices, wide bandgap semiconductor devices, passive components, and power converter topologies.

This paper presents a simplified space vector modulation strategy for three-level inverter digital control applications. It avoids the complex trigonometric computations necessary for the conventional three-level space vector modulation strategy for sector identification and vector dwell time calculation by directly determining the phase duty ratios from the three-phase reference voltages. This implementation technique only involves few logic comparisons and arithmetic operations, so the code size and execution time are reduced by approximately 40 percent. Moreover, it achieves significantly lower neutral-point voltage ripple compared to the conventional three-level space vector modulation method for a wide range of modulation indices and load power factor values. The validity of the proposed modulation technique is verified using Opal-RT Hardware-in-the-Loop (HIL) simulation. The simulation results confirm that the proposed method ensures the required threelevel operation and dc-link capacitor voltage balancing.

A new family of 7-Level Boost Active Neutral Point Clamped (7L-BANPC) circuits is proposed in this paper. The proposed topology is derived from the conventional ANPC by adding one additional capacitor to boost the voltage and increase the number of output voltage levels. The proposed topology generates seven output voltage levels using one dc source and two flying capacitors. A specific modulation strategy is presented in this study to provide self-balancing for the flying capacitors of the proposed inverter. Theoretical analysis and the operational modes of the proposed 7L-BANPC are presented in this paper. Highlights of the simulation of the proposed inverter are presented to validate the proposed topology. A scaled-down prototype has been built to validate the workability of the proposed topology.

This paper presents a comparative analysis of the performances of Silicon (Si) and Silicon Carbide (SiC) power semiconductor devices for high power applications such as renewable energy generations and motor drives. A detailed investigation of the merits of power semiconductor devices such as conduction losses, switching losses, and efficiency is performed. Power devices with similar or very close specifications such as similar blocking voltage rating, similar continuous current rating and similar on-state resistances are selected for the investigation. The semiconductor device conduction and switching losses and overall system efficiency are estimated for a wide range of operating conditions such as switching frequency and operating temperature. A lesser-explored approach, Saber-Simulink cosimulation, is used to estimate the performances of the power devices for different operating conditions. A physics-based compact power device model is used for the investigation. Due to its compatibility, Saber is used to model the power stage and Simulink is used to model the control algorithm for the inverter because of its flexibility for controls implementation.

© 2019 IEEE. This paper presents the fault-tolerant operation for a cascaded H-bridge (CHB) inverter. The added features ensure reliable and robust operation in the event of a fault. The proposed strategy uses an additional cross-coupled CHB (X-CHB) unit in companion with the existing CHB to support the output voltage and ensure continuity of operation in case of an open/short circuit fault. The operation of the proposed X-CHB inverter is described in detail. Simulation and experimental verification of the proposed concept is demonstrated using a seven-level CHB. Both simulation and experimental results validate the fault-tolerant operation of the CHB for a battery energy storage system (BESS) in case of switch faults such as open/short-circuit switch faults or dc-source or battery failure.

Solar photovoltaics and wind turbine generators achieved 10% of US electricity generation in March 2017. This percentage is expected to increase in future years. The electricity generated from wind and solar sources requires power electronic circuits in order to make this energy available to the electric utility grid. Consequently, there is a need for improved fault detection and isolation in power electronic converters for maximizing the reliability of renewable energy sources. In addition, there will be power electronics needed for utility-scale battery storage systems to provide back-up energy for times of reduced wind and solar generation output and to provide black-start capability for restoration after power outages. This paper presents a new and novel power electronic circuit and method for isolating faults in power electronic inverter-rectifiers. This paper provides a significant improvement compared to existing methods by isolating faulted devices and reconfiguring the converter in a manner that reduces the disruption of electricity delivery. In addition, this is achieved with minimal cost impact to the overall system.

This paper investigates the use of power semiconductor devices in a nine - level cascaded B-bridge (CHB) multilevel inverter topology with an integrated battery energy storage system (BESS) for a 13.8kV medium voltage distribution system. In this topology, the bulky conventional step-up 60 Hz transformer is not used. The purpose of this study is to analyze the use of SiC MOSFET and Si IGBT devices in the inverter system to evaluate their respective performances. SiC MOSFET and Si IGBT switching devices are modeled and characterized using Saber® modeling software. The switching losses, thermal performance, and efficiency of the inverter system are investigated, and measurements are obtained from the simulation. Saber® provides a good capability for characterizing semiconductor models in the real world, with great features of computation. A three-phase SiC power MOSFET-based multilevel CHB inverter prototype is presented for experimental verification. In the investigation, better performances of SiC MOSFET devices are recorded. SiC devices demonstrate promising performance at different switching frequency and temperature ranges.

The increasing importance of power electronic converters in supplying electrical energy to utility grids places a higher priority to detect and protect against fault conditions. Fault detection and isolation are particularly important for inverters that provide black-start recovery for microgrids since these converters provide the energy source for restoration after a power outage. This paper presents a new fault detection and location method for Cascaded B-Bridge (CHB) multilevel inverters. The new fault detection method is based on monitoring the output voltage of each cell and output current directions along with each switch's state. By monitoring each cell's output voltage and current direction, the faulty cell can be detected and isolated. After the faulty cell is detected, the faulty switch can be located by comparing the current direction with the switching states. This technique is implemented with Level-Shifted Pulse Width Modulation (LS-PWM) in order to maintain acceptable total harmonic distortion (THD) levels at the converter. The proposed method can be implemented for a CHB with any number of cells, can operate with nonlinear loads, and offers very fast detection times. Simulation and experimental results verify the performance of this method.

This paper describes a study evaluating 1.2 kV SiC MOSFETs in modular multilevel cascaded H-bridge (CHB) three-phase inverter for medium voltage ac grid applications. The main purpose of this topology is to remove the need of a bulk 60 Hz transformer that is normally used to step up the output signal of a voltage source inverter to the medium voltage level. Using SiC devices (1. 2 kV ~ 6.5 kV SiC MOSFETs), with their high breakdown voltage, enables the system to meet and withstand the medium voltage stress, with a minimized number of cascaded modules. The SiC-based power electronics, when used in the presented topology, they significantly reduce the complexity usually faced when Si devices are used to meet the medium voltage level and the power scalability. The simulation and preliminary experimental results, on a low-voltage prototype, verifies the nine-level CHB topology that is presented in this paper.

This paper describes the study of a topology of modular multilevel converters for integrating battery energy storage into a medium (13.8 kV) distribution system. The main benefit of this topology is to remove the need for a bulk 60 Hz transformer that is normally used to step up the output of a voltage source inverter to the medium voltage level. A SiC-based power electronics interface presented in this paper provides an efficient solution without the large and costly transformer. Using medium voltage SiC devices (≥ 10 kV SiC MOSFETs), with their high breakdown voltage, enables the system to meet and withstand medium voltage application, using a minimized number of cascaded modules. This SiC-based power electronics interface significantly reduces the complexity usually faced when Si devices are used directly in medium voltage applications. The voltage and state of charge balancing control for battery modules is also simplified and performs well. The simulation and experimental results, performed on a low-voltage prototype, verify the proposed topology that is presented in this paper.

Overcoming the impacts of multiple contingencies on electric power systems with renewable resources is a significant research topic for electric utilities. Evaluating system responses under transient conditions reveals which factors impact the stability of power systems, especially with existing solar photovoltaic energy sources in those systems. This work focuses on analyzing the effects of solar photovoltaic (PV) penetration on the severity of double fault conditions. Also, the effect of variable time between contingencies is evaluated in this paper to make a comparison for distinguishing how PV resources could affect system stability. Outcomes of particular cases of a test system explain the relationship between fault occurrence and PV generation in terms of system stability.

This paper presents the analysis and design ofa line interactive uninterruptible power supply (UPS) connected to a microgrid through a high step-up/down(bidirectional) dc-dc isolated modular multilevelconverter with a high input to output voltage ratio.Resonant switching is used on the MMC to improveoverall efficiency of the converter. The input source forthis converter is a set of series and parallel batteriesand the output of the converter is connected to amicrogrid. The proposed converter steps up the inputvoltage with a 1:15 conversion ratio, and steps down theinput voltage with a 15:1 conversion ratio. Atransformer is used to both isolate the converter and tofurther increase the step-up/down ratio.