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42 results on '"Hai Nam Tran"'

1. Pisachini planthoppers of Vietnam: new records of Pisacha and a new Goniopsarites species from Central Vietnam (Hemiptera, Fulgoromorpha, Nogodinidae)

Author

Jérôme Constant, Thai-Hong Pham, Cuong Viet Canh Le, Trung Thanh Vu, Hoai Thu Thi Nguyen, and Hai Nam Tran

Subjects
Zoology, QL1-991
Abstract

Two planthopper species of the family Nogodinidae are added to the fauna of Vietnam, both from two localities in Thua Thien-Hue Province: Bach Ma National Park and Phong Dien District. The first species belongs to Goniopsarites Meng, Wang & Wang, 2014, G. mientrunganus Constant & Pham, sp. nov., and the second belongs to Pisacha Distant, 1906, P. yinggensis Meng, Wang & Wang, 2014. Pisacha yinggensis was previously recorded from Hainan Island, China. These new records greatly extend the distribution of both genera, which were known from southern China, Hainan and North Vietnam, to the south, reaching the mid area of Central Vietnam. Sexual dimorphism is reported in P. yinggensis for the first time. Illustrations of habitus and male terminalia of the new species are given as well as distribution maps and photographs of live specimens and their habitat. The family Nogodinidae now comprises nine species in Vietnam, with three of them present in Bach Ma National Park.

Published
2024
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2. Biodiversity and composition of the herpetofauna from the Tien Hai Wetland Nature Reserve, North Vietnam

Author

Dzung Trung Le, Ngam Thi Lo, Hai Nam Tran, and Yen Thi Do

Subjects
checklist, distribution, salinity, amphibians, reptiles, tien hai, Biotechnology, TP248.13-248.65
Abstract

Based on the novel data collected during the field surveys in 2019, we herein provided a checklist of eight species of amphibians belonging to seven genera (five families, one order) and nine species of reptiles belonging to eight genera (seven families, two orders) from Tien Hai Wetland Nature Reserve in Thai Binh Province. The species Hemidactylus stejnegeri is reported for the first time from Thai Binh Province. In terms of distribution pattern most of recorded species were found in the canal and aquaculture pond habitat (nine species of amphibians and reptiles, 52.94% of the total number of species). The diversity of amphibian and reptile species recorded from Tien Hai Wetland Nature Reserve is lower than the other wetland areas in North Vietnam. In this nature reserve, the number of species change according to salinity of amphibians is higher than of reptiles. [ J Adv Biotechnol Exp Ther 2020; 3(2.000): 116-121]

Published
2020
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7. ADEPT 2022 Workshop: A Summary of Strengths and Weaknesses of the AADL Ecosystem.

Author

Singhoff, Frank, Hugues, Jérôme, Hai Nam Tran, Bardaro, Gianluca, Blouin, Dominique, Bozzano, Marco, Denzler, Patrick, Dissaux, Pierre, Senn, Eric, Xiong Xu, and Zhibin Yang

Subjects
ARCHITECTURAL design, SYSTEMS design, SYSTEMS software, ECOSYSTEMS, HARDWARE
Abstract

The Architecture Analysis and Design Language (AADL) is a SAE Standardfor the modeling of both the hardware and the software of embedded systems. The AADL standard is now mature and is today employed by numerous stakeholders in the domain of critical embedded real-time systems to address a large set of concerns: performances (latency, schedulability), safety, or security, ... The ADEPT workshop aims to present and report on current projects in the field of design, implementation, and verification of critical systems where AADL is a first-citizen technology. This article is a summary of the ADEPT 2022 workshop. [ABSTRACT FROM AUTHOR]

Published
2024

11. Pisachini planthoppers of Vietnam: new records of Pisacha and a new Goniopsarites species from Central Vietnam (Hemiptera, Fulgoromorpha, Nogodinidae).

Author

Constant, Jérôme, Thai-Hong Pham, Cuong Viet Canh Le, Trung Thanh Vu, Hoai Thu Thi Nguyen, and Hai Nam Tran

Subjects
PLANTHOPPERS, SPECIES, SEXUAL dimorphism, NATIONAL parks & reserves, HEMIPTERA, TERMINALIA
Abstract

Two planthopper species of the family Nogodinidae are added to the fauna of Vietnam, both from two localities in Thua Thien-Hue Province: Bach Ma National Park and Phong Dien District. The first species belongs to Goniopsarites Meng, Wang & Wang, 2014, G. mientrunganus Constant & Pham, sp. nov., and the second belongs to Pisacha Distant, 1906, P. yinggensis Meng, Wang & Wang, 2014. Pisacha yinggensis was previously recorded from Hainan Island, China. These new records greatly extend the distribution of both genera, which were known from southern China, Hainan and North Vietnam, to the south, reaching the mid area of Central Vietnam. Sexual dimorphism is reported in P. yinggensis for the first time. Illustrations of habitus and male terminalia of the new species are given as well as distribution maps and photographs of live specimens and their habitat. The family Nogodinidae now comprises nine species in Vietnam, with three of them present in Bach Ma National Park. [ABSTRACT FROM AUTHOR]

Published
2024
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16. Identification of Downhole Emulsion in a Light Oil Development and Demulsifier Injection for Increasing Production

Author

Huu Huy Vu, Manisa Rangponsumrit, Ngoc Dong Hoang, Duy Hung Nguyen, Hai Nam Tran, Ngoc Nguyen Phi, Tony Roche, Viet Long Dang, and Minh Dung Tran

Abstract

TGT field is located offshore Vietnam, at a water depth of 45m and approximately 100km Southeast of Vung Tau. The field started production in 2011 and is currently producing about 13k bopd. The produced crude is 38-40 deg. API with viscosity of 0.45 cP at reservoir conditions and classified as light oil.The field consists of three wellhead platforms with nearly 40 production wells, all being gas lifted. Emulsion, which is rarely encountered in downhole environment and not reported in the surrounding oil fields, was diagnosed to be present in production tubing of TGT wells by two indications: measured bottom-hole flowing pressure (BHFP) remarkably higher than calculated value, and emulsion observed on surface well fluid samples.Upon completion of the laboratory testing for chemical selection, in early 2020 a field trial was carried out by injecting demulsifier into the production tubing of selected wells via the chemical injection line or together with lift gas. A successful field trial resulted in a clear reduction of BHFP of the wells along with a production increase by approximately 13% from 8 tested wells. Due to the low-cost of the application and major economic gain compared to other IOR methods, long-term downhole demulsifier injection has been applied in additional wells for increasing the field production.Unlike for heavy oil developments, there is a lack of publications on downhole emulsion and demulsification for light oil fields. This paper describes a case study for application in a light oil field, covering identification of the wells having an emulsion issue in the production tubing, laboratory testing for selecting demulsifier, challenges in chemical deployment and the field trial results.

Published
2023

24. Fine-Grained Runtime Monitoring of Real-Time Embedded Systems

Author

Zineb Boukili, Hai Nam Tran, and Alain Plantec

Subjects
General Earth and Planetary Sciences, General Environmental Science
Abstract

Dynamically ensuring the correctness of the functional behavior of a real-time embedded system is tedious, especially in the autonomous domain. Even though the current real-time task model provides sufficient information to perform basic schedulability tests, it is inadequate to be used in runtime monitoring to assert and guarantee the correctness of a system under hardware/software malfunctions or malicious cyber attacks. In this article, we present a runtime monitoring approach based on a fine-grained model of real-time tasks.

Published
2022

25. How Much Do Farmers Expect to Implement for Traceability? Evidence From a Double-Bound Choices Experiment of Vietnamese Shrimp Aquaculture

Author

Yoko Saito, Takashi Matsuishi, T.P. Dong Khuu, Nguyen Hai Nam Tran, and Thi Ngoc Hoa Nguyen

Subjects
supply chain management, 0106 biological sciences, Shrimp aquaculture, Ecology, Traceability, 010604 marine biology & hydrobiology, Vietnamese, SH1-691, 04 agricultural and veterinary sciences, Aquatic Science, 01 natural sciences, language.human_language, double-bound dichotomous choice, Agricultural science, global trade of shrimp products, Vietnam, international quality assurance certificates, Aquaculture. Fisheries. Angling, 040102 fisheries, language, 0401 agriculture, forestry, and fisheries, Business, Food Science
Abstract

Traceability is considered the most important requirement for shrimp products exported to global markets. However, implementing traceability in shrimp-exporting countries is challenging because of limited production at the local supply chain and lack of financial welfare awareness. This study aims to investigate the expected farm-gate price for traceability implementation using a double-bound dichotomous choice experiment. The censored regression model is used to estimate the factors influencing the anticipated farm-gate price of shrimp farmers. The survey was conducted in Ca Mau Province, Vietnam, by interviewing 71 Penaeus monodon Fabricius, 1798, and 43 Penaeus vannamei Boone, 1931, farmers. To implement traceability, P. monodon farmers estimated the farm-gate price at 10.17 USD.kg-1 , while P. vannamei farmers expected 6.18 USD.kg-1 . Application of international quality assurance certifications, willingness to implement traceability, land used, culture methods, shrimp species, current farm-gate price, and variable costs affected the expected farm-gate price. The attractive anticipated farm-gate price compensated for the negative influence of applying international quality assurance certifications, indicating that the farmers were willing to implement traceability. This suggests that the application of certifications increased the ability to implement traceability in the shrimp supply chain. The attractive farm-gate price for certified shrimp products would enhance their willingness to implement the traceability of shrimp products.

Published
2021

26. Évaluation et optimisation des algorithmes de restauration d'images sous-marines

Author

Hai Nam Tran, Vincent Rodin, Barbara Dzaja, Artur Mkrtchyan, Alan Le Boudec, Université de Brest (UBO), Laboratoire des Sciences et des Technologies de l'Information et de la Communication (LabSTIC), Université 08 mai 45 Guelma [Algérie], Yerevan State University, and MKRTCHYAN, Artur

Subjects
Computer science, Image quality, media_common.quotation_subject, [INFO.INFO-DS]Computer Science [cs]/Data Structures and Algorithms [cs.DS], Cognitive neuroscience of visual object recognition, 020206 networking & telecommunications, [INFO.INFO-DS] Computer Science [cs]/Data Structures and Algorithms [cs.DS], 02 engineering and technology, image restauration, underwater, ROV, Drone, Image (mathematics), [INFO.INFO-ES] Computer Science [cs]/Embedded Systems, Underwater vehicle, [INFO.INFO-TI] Computer Science [cs]/Image Processing [eess.IV], [INFO.INFO-TI]Computer Science [cs]/Image Processing [eess.IV], 0202 electrical engineering, electronic engineering, information engineering, 020201 artificial intelligence & image processing, Quality (business), [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, 14. Life underwater, Underwater, Algorithm, Image restoration, media_common
Abstract

On-board restoration of underwater images on embedded platforms such as marine drones is faced with many obstacles including image quality and real-time constraints. Confrontations met on the way vary from views to solution methods depending on the goals, such as underwater vehicle realtime control and positioning or underwater object recognition. In this research, five algorithms for underwater image restoration were studied and evaluated. In order to evaluate the quality of the performing algorithms nine evaluation criteria were used. Split into two types, the no reference metrics assesses only the quality of the image results, while the full reference criterion uses a reference image to estimate it. The calculation of these criteria allows each algorithm to be compared. Furthermore, the possibility to optimise algorithms in order to make them applicable to meet real-time requirements on embedded platforms was investigated., La restauration embarquée d'images sous-marines sur des plates-formes embarquées telles que les drones marins est confrontée à de nombreux obstacles dont la qualité des images et les contraintes de temps réel. Les confrontations rencontrées en cours de route varient des points de vue aux méthodes de solution en fonction des objectifs, tels que le contrôle et le positionnement en temps réel du véhicule sous-marin ou la reconnaissance d'objets sous-marins. Dans cette recherche, cinq algorithmes de restauration d'images sous-marines ont été étudiés et évalués. Afin d'évaluer la qualité des algorithmes performants, neuf critères d'évaluation ont été utilisés. Divisés en deux types, le critère sans référence évalue uniquement la qualité des résultats de l'image, tandis que le critère avec référence complète utilise une image de référence pour l'estimer. Le calcul de ces critères permet de comparer chaque algorithme. En outre, la possibilité d'optimiser les algorithmes afin de les rendre applicables pour répondre aux exigences du temps réel sur les plateformes embarquées a été étudiée.

Published
2021

27. When security affects schedulability of TSP systems: trade-offs observed by design space exploration

Author

Frank Singhoff, Ill-ham Atchadam, Laurent Lemarchand, Karim Bigou, Hai Nam Tran, Lab-STICC_UBO_CACS_MOCS, Institut Brestois du Numérique et des Mathématiques (IBNM), Université de Brest (UBO)-Université de Brest (UBO)-Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance (Lab-STICC), Institut Mines-Télécom [Paris] (IMT)-IMT Atlantique Bretagne-Pays de la Loire (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT)-École Nationale d'Ingénieurs de Brest (ENIB)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Centre National de la Recherche Scientifique (CNRS)-Université Bretagne Loire (UBL)-Institut Mines-Télécom [Paris] (IMT)-IMT Atlantique Bretagne-Pays de la Loire (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT)-École Nationale d'Ingénieurs de Brest (ENIB)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Université de Bretagne Sud (UBS)-Centre National de la Recherche Scientifique (CNRS)-Université Bretagne Loire (UBL), Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance (Lab-STICC), École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Télécom Bretagne-Institut Brestois du Numérique et des Mathématiques (IBNM), Université de Brest (UBO)-Université européenne de Bretagne - European University of Brittany (UEB)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Télécom Bretagne-Institut Brestois du Numérique et des Mathématiques (IBNM), Université de Brest (UBO)-Université européenne de Bretagne - European University of Brittany (UEB)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS), and Institut Mines-Télécom [Paris] (IMT)-École Nationale d'Ingénieurs de Brest (ENIB)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Centre National de la Recherche Scientifique (CNRS)-Université Bretagne Loire (UBL)

Subjects
021110 strategic, defence & security studies, Design space exploration, Computer science, Distributed computing, Trade offs, 0211 other engineering and technologies, Active redundancy, 02 engineering and technology, Avionics, Partition (database), 020202 computer hardware & architecture, Scheduling (computing), ARINC 653, 0202 electrical engineering, electronic engineering, information engineering, [INFO]Computer Science [cs], ComputingMilieux_MISCELLANEOUS
Abstract

ARINC 653 introduces the concept of partition that allows time and space isolation in real-time avionic systems. Tasks are assigned to partitions according to various objective functions or constraints such as safety, performance, and security. Some of these objective functions may be conflicting as an improvement of one objective leads to a decrease of another. For example, improving safety by active redundancy may decrease performance. In this paper, we investigate the conflicting aspect between schedulability and security in Time and Space Partitioning (TSP) systems. Many researches have shown that enforcing the security of a system results in an overhead affecting its schedulability. We formulate a design space exploration (DSE) process with a meta-heuristic to explore solutions defined by the tasks to partitions assignment according to security requirements and timing constraints. Experiments are conducted with the Cheddar scheduling analyzer to characterize applications that are concerned by this conflicting issue and to evaluate the tradeoffs between schedulability and security.

Published
2020

28. Efficient Contention-Aware Scheduling of SDF Graphs on Shared Multi-Bank Memory

Author

Jean-Pierre Talpin, Thierry Gautier, Loïc Besnard, Alexandre Honorat, Hai Nam Tran, Lab-STICC_UBO_CACS_MOCS, Institut Brestois du Numérique et des Mathématiques (IBNM), Université de Brest (UBO)-Université de Brest (UBO)-Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance (Lab-STICC), École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-Université Bretagne Loire (UBL)-IMT Atlantique (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT)-École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-Université Bretagne Loire (UBL)-IMT Atlantique (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT), Institut d'Électronique et des Technologies du numéRique (IETR), Université de Nantes (UN)-Université de Rennes (UR)-Institut National des Sciences Appliquées - Rennes (INSA Rennes), Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS), Tim, Events and Architectures (TEA), Inria Rennes – Bretagne Atlantique, Institut National de Recherche en Informatique et en Automatique (Inria)-Institut National de Recherche en Informatique et en Automatique (Inria)-LANGAGE ET GÉNIE LOGICIEL (IRISA-D4), Institut de Recherche en Informatique et Systèmes Aléatoires (IRISA), Université de Rennes (UR)-Institut National des Sciences Appliquées - Rennes (INSA Rennes), Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Université de Bretagne Sud (UBS)-École normale supérieure - Rennes (ENS Rennes)-Institut National de Recherche en Informatique et en Automatique (Inria)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS)-IMT Atlantique (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT)-Institut Mines-Télécom [Paris] (IMT)-Université de Rennes (UR)-Institut National des Sciences Appliquées - Rennes (INSA Rennes), Institut Mines-Télécom [Paris] (IMT)-Institut Mines-Télécom [Paris] (IMT)-Institut de Recherche en Informatique et Systèmes Aléatoires (IRISA), Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Université de Bretagne Sud (UBS)-École normale supérieure - Rennes (ENS Rennes)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS)-IMT Atlantique (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT)-Institut Mines-Télécom [Paris] (IMT), École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-Université Bretagne Loire (UBL)-IMT Atlantique Bretagne-Pays de la Loire (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT)-École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-Université Bretagne Loire (UBL)-IMT Atlantique Bretagne-Pays de la Loire (IMT Atlantique), Nantes Université (NU)-Université de Rennes 1 (UR1), Université de Rennes (UNIV-RENNES)-Université de Rennes (UNIV-RENNES)-Institut National des Sciences Appliquées - Rennes (INSA Rennes), Institut National des Sciences Appliquées (INSA)-Université de Rennes (UNIV-RENNES)-Institut National des Sciences Appliquées (INSA)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS), Université de Rennes 1 (UR1), Institut National des Sciences Appliquées (INSA)-Université de Rennes (UNIV-RENNES)-Institut National des Sciences Appliquées (INSA)-Université de Bretagne Sud (UBS)-École normale supérieure - Rennes (ENS Rennes)-Institut National de Recherche en Informatique et en Automatique (Inria)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS)-IMT Atlantique Bretagne-Pays de la Loire (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT)-Institut Mines-Télécom [Paris] (IMT)-Université de Rennes 1 (UR1), Institut National des Sciences Appliquées (INSA)-Université de Rennes (UNIV-RENNES)-Institut National des Sciences Appliquées (INSA)-Université de Bretagne Sud (UBS)-École normale supérieure - Rennes (ENS Rennes)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS)-IMT Atlantique Bretagne-Pays de la Loire (IMT Atlantique), Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance (Lab-STICC), Institut Mines-Télécom [Paris] (IMT)-IMT Atlantique Bretagne-Pays de la Loire (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT)-École Nationale d'Ingénieurs de Brest (ENIB)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Centre National de la Recherche Scientifique (CNRS)-Université Bretagne Loire (UBL)-Institut Mines-Télécom [Paris] (IMT)-IMT Atlantique Bretagne-Pays de la Loire (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT)-École Nationale d'Ingénieurs de Brest (ENIB)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Centre National de la Recherche Scientifique (CNRS)-Université Bretagne Loire (UBL)-Institut Brestois du Numérique et des Mathématiques (IBNM), Université de Brest (UBO), Université de Nantes (UN)-Université de Rennes 1 (UR1), Université de Bretagne Sud (UBS)-Institut National des Sciences Appliquées - Rennes (INSA Rennes), Institut National des Sciences Appliquées (INSA)-Université de Rennes (UNIV-RENNES)-Institut National des Sciences Appliquées (INSA)-Université de Rennes (UNIV-RENNES)-Institut National de Recherche en Informatique et en Automatique (Inria)-École normale supérieure - Rennes (ENS Rennes)-Centre National de la Recherche Scientifique (CNRS)-Université de Rennes 1 (UR1), Université de Rennes (UNIV-RENNES)-CentraleSupélec-IMT Atlantique Bretagne-Pays de la Loire (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT)-Institut Mines-Télécom [Paris] (IMT)-Université de Bretagne Sud (UBS)-Institut National des Sciences Appliquées - Rennes (INSA Rennes), and Institut National des Sciences Appliquées (INSA)-Université de Rennes (UNIV-RENNES)-Institut National des Sciences Appliquées (INSA)-Université de Rennes (UNIV-RENNES)-École normale supérieure - Rennes (ENS Rennes)-Centre National de la Recherche Scientifique (CNRS)-Université de Rennes 1 (UR1)

Subjects
Schedule, Job shop scheduling, Computer science, 020208 electrical & electronic engineering, 02 engineering and technology, Parallel computing, 020202 computer hardware & architecture, Scheduling (computing), Synchronous Data Flow, Data dependency, Shared memory, Memory architecture, 0202 electrical engineering, electronic engineering, information engineering, [INFO]Computer Science [cs], Time complexity, ComputingMilieux_MISCELLANEOUS
Abstract

Novel memory architectures have been introduced in multi/many-core processors to address the performance bottle neck due to shared memory accesses. Taking the advantages brought by these architectures in scheduling analysis is still an open challenge. In this article, we present a scheduling analysis technique that exploits a shared multi-bank memory architecture to efficiently schedule parallel real-time applications modeled as synchronous data flow (SDF) graphs by minimizing the memory access contentions. Our approach aims at producing a static time-triggered schedule with the objective of minimizing the makespan and buffer size requirements while respecting consistency and data dependency constraints. An Integer Linear Programming formulation of the scheduling problem is presented, as well as a heuristic with significantly lower time complexity. Experimental results are given using synthetic SDF graphs generated by the SDF3 tool and applications available in the StreamIt benchmark.

Published
2019

29. Feasibility interval and sustainable scheduling simulation with CRPD on uniprocessor platform

Author

Jalil Boukhobza, Frank Singhoff, Hai Nam Tran, Stéphane Rubini, Equipe Software/HArdware and unKnown Environment inteRactions (Lab-STICC_SHAKER), Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance (Lab-STICC), École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-Université Bretagne Loire (UBL)-IMT Atlantique Bretagne-Pays de la Loire (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT)-École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-Université Bretagne Loire (UBL)-IMT Atlantique Bretagne-Pays de la Loire (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT), Université de Brest (UBO), École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne), and This work and Cheddar are supported by Brest Métropole, Ellidiss Technologies, Région Bretagne, CD du Finistère and Campus France PESSOA programs number 27380SA and 37932TF.

Subjects
Computation theory, Computer science, Embedded systems, Computation, Distributed computing, Preemption, scheduling simulation, 0102 computer and information sciences, 02 engineering and technology, Interval (mathematics), 01 natural sciences, Scheduling (computing), Task (project management), Set (abstract data type), Reduction (complexity), 0202 electrical engineering, electronic engineering, information engineering, Uniprocessor system, [INFO]Computer Science [cs], Hardware_MEMORYSTRUCTURES, real-time embedded systems, 020202 computer hardware & architecture, Cache related preemption delay, 010201 computation theory & mathematics, Hardware and Architecture, [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], Software
Abstract

International audience; The use of hardware caches became essential in modern embedded systems to address the speed gap between processor and memory. In such systems, cache-related preemption delay (CRPD) may represent a significant proportion of task execution time. Addressing this delay in scheduling simulation of these systems stays an open and under-examined problem. Assumptions are often made to simplify the computation model used in simulation and capture the worst-case effect. Nevertheless, they can introduce situations in which scheduling simulation is considered not only pessimistic but also non-sustainable. In this article, we discuss the problem and propose a less pessimistic CRPD computation model that allows sustainable scheduling simulation regarding the capacity parameter. With the proposed model, a system that is schedulable with simulated worst-case execution times remains so when these parameters are reduced. These results improve the applicability of scheduling simulation in the early verification stage for systems with caches. Experiments conducted with our CRPD computation model show a 5% to 12% improvement of schedulability task set coverage and a 30% to 50% reduction of preemption cost with regard to existing CRPD computation models. An integration in a scheduling simulator and a performance evaluation are also realized for the proposed model.

Published
2021

30. Combined Security and Schedulability Analysis for MILS Real-Time Critical Architectures

Author

Ill-ham Atchadam and Frank Singhoff and Hai Nam Tran and Noura Bouzid and Laurent Lemarchand, Atchadam, Ill-ham, Singhoff, Frank, Tran, Hai Nam, Bouzid, Noura, Lemarchand, Laurent, Ill-ham Atchadam and Frank Singhoff and Hai Nam Tran and Noura Bouzid and Laurent Lemarchand, Atchadam, Ill-ham, Singhoff, Frank, Tran, Hai Nam, Bouzid, Noura, and Lemarchand, Laurent

Abstract

Real-time critical systems have to comply with stringent timing constraints, otherwise, disastrous consequences can occur at runtime. A large effort has been made to propose models and tools to verify timing constraints by schedulability analysis at the early stages of system designs. Fewer efforts have been made on verifying the security properties in these systems despite the fact that sinister consequences can also happen if these properties are compromised. In this article, we investigate how to jointly verify security and timing constraints. We show how to model a security architecture (MILS) and how to verify both timing constraints and security properties. Schedulability is investigated by the mean of scheduling analysis methods implemented into the Cheddar scheduling analyzer. Experiments are conducted to show the impact that improving security has on the schedulability analysis.

Published
2019
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31. About Early Scheduling Verification Of Embedded Real-Time Critical Systems: An Example With AADL

Author

Frank Singhoff, Stéphane Rubini, Hai Nam Tran, Jalil Boukhobza, Laurent Lemarchand, Pierre Dissaux, Valérie-Anne Nicolas, Alain Plantec, Jérôme Legrand, Mourad DRIDI, Jean-Philippe Diguet, Lab-STICC_UBO_CACS_MOCS, Institut Brestois du Numérique et des Mathématiques (IBNM), Université de Brest (UBO)-Université de Brest (UBO)-Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance (Lab-STICC), École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-Université Bretagne Loire (UBL)-IMT Atlantique Bretagne-Pays de la Loire (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT)-École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-Université Bretagne Loire (UBL)-IMT Atlantique Bretagne-Pays de la Loire (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT), Ellidiss Technologies [Brest], Ellidiss Technologies, Laboratoire d'Informatique des Systèmes Complexes (LISYC), École Nationale d'Ingénieurs de Brest (ENIB)-Université de Brest (UBO)-Institut Brestois du Numérique et des Mathématiques (IBNM), Université de Brest (UBO)-Université de Brest (UBO)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne), Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance (Lab-STICC), Institut Mines-Télécom [Paris] (IMT)-IMT Atlantique Bretagne-Pays de la Loire (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT)-École Nationale d'Ingénieurs de Brest (ENIB)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Centre National de la Recherche Scientifique (CNRS)-Université Bretagne Loire (UBL)-Institut Mines-Télécom [Paris] (IMT)-IMT Atlantique Bretagne-Pays de la Loire (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT)-École Nationale d'Ingénieurs de Brest (ENIB)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Centre National de la Recherche Scientifique (CNRS)-Université Bretagne Loire (UBL)-Institut Brestois du Numérique et des Mathématiques (IBNM), and Université de Brest (UBO)

Subjects
[INFO]Computer Science [cs], ComputingMilieux_MISCELLANEOUS
Abstract

International audience

Published
2018

32. Toward Efficient Many-core Scheduling of Partial Expansion Graphs

Author

Jean-Pierre Talpin, Shuvra S. Bhattacharyya, Hai Nam Tran, Thierry Gautier, Lab-STICC_UBO_CACS_MOCS, Institut Brestois du Numérique et des Mathématiques (IBNM), Université de Brest (UBO)-Université de Brest (UBO)-Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance (Lab-STICC), École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-Université Bretagne Loire (UBL)-IMT Atlantique Bretagne-Pays de la Loire (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT)-École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-Université Bretagne Loire (UBL)-IMT Atlantique Bretagne-Pays de la Loire (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT), Tim, Events and Architectures (TEA), Inria Rennes – Bretagne Atlantique, Institut National de Recherche en Informatique et en Automatique (Inria)-Institut National de Recherche en Informatique et en Automatique (Inria)-LANGAGE ET GÉNIE LOGICIEL (IRISA-D4), Institut de Recherche en Informatique et Systèmes Aléatoires (IRISA), Université de Bretagne Sud (UBS)-Institut National des Sciences Appliquées - Rennes (INSA Rennes), Institut National des Sciences Appliquées (INSA)-Université de Rennes (UNIV-RENNES)-Institut National des Sciences Appliquées (INSA)-Université de Rennes (UNIV-RENNES)-Institut National de Recherche en Informatique et en Automatique (Inria)-École normale supérieure - Rennes (ENS Rennes)-Centre National de la Recherche Scientifique (CNRS)-Université de Rennes 1 (UR1), Université de Rennes (UNIV-RENNES)-CentraleSupélec-IMT Atlantique Bretagne-Pays de la Loire (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT)-Institut Mines-Télécom [Paris] (IMT)-Université de Bretagne Sud (UBS)-Institut National des Sciences Appliquées - Rennes (INSA Rennes), Institut Mines-Télécom [Paris] (IMT)-Institut Mines-Télécom [Paris] (IMT)-Institut de Recherche en Informatique et Systèmes Aléatoires (IRISA), Institut National des Sciences Appliquées (INSA)-Université de Rennes (UNIV-RENNES)-Institut National des Sciences Appliquées (INSA)-Université de Rennes (UNIV-RENNES)-École normale supérieure - Rennes (ENS Rennes)-Centre National de la Recherche Scientifique (CNRS)-Université de Rennes 1 (UR1), Institut Mines-Télécom [Paris] (IMT)-Institut Mines-Télécom [Paris] (IMT), University of Maryland [College Park], University of Maryland System, École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-Université Bretagne Loire (UBL)-IMT Atlantique (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT)-École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-Université Bretagne Loire (UBL)-IMT Atlantique (IMT Atlantique), Université de Rennes (UR)-Institut National des Sciences Appliquées - Rennes (INSA Rennes), Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Université de Bretagne Sud (UBS)-École normale supérieure - Rennes (ENS Rennes)-Institut National de Recherche en Informatique et en Automatique (Inria)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS)-IMT Atlantique (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT)-Institut Mines-Télécom [Paris] (IMT)-Université de Rennes (UR)-Institut National des Sciences Appliquées - Rennes (INSA Rennes), Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Université de Bretagne Sud (UBS)-École normale supérieure - Rennes (ENS Rennes)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS)-IMT Atlantique (IMT Atlantique), Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance (Lab-STICC), Institut Mines-Télécom [Paris] (IMT)-IMT Atlantique Bretagne-Pays de la Loire (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT)-École Nationale d'Ingénieurs de Brest (ENIB)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Centre National de la Recherche Scientifique (CNRS)-Université Bretagne Loire (UBL)-Institut Mines-Télécom [Paris] (IMT)-IMT Atlantique Bretagne-Pays de la Loire (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT)-École Nationale d'Ingénieurs de Brest (ENIB)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Centre National de la Recherche Scientifique (CNRS)-Université Bretagne Loire (UBL)-Institut Brestois du Numérique et des Mathématiques (IBNM), and Université de Brest (UBO)

Subjects
010302 applied physics, Computer science, Data parallelism, Distributed computing, 02 engineering and technology, 01 natural sciences, 020202 computer hardware & architecture, Scheduling (computing), Exponential function, Data flow diagram, Synchronous Data Flow, Many core, Homogeneous, 0103 physical sciences, 0202 electrical engineering, electronic engineering, information engineering, Signal processing algorithms, [INFO]Computer Science [cs], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems
Abstract

International audience; Transformation of synchronous data flow graphs (SDF) into equivalent homogeneous SDF representations has been extensively applied as a pre-processing stage when mapping signal processing algorithms onto parallel platforms. While this transformation helps fully expose task and data parallelism, it also presents several limitations such as an exponential increase in the number of actors and excessive communication overhead. Partial expansion graphs were introduced to address these limitations for multi-core platforms. However, existing solutions are not well-suited to achieve efficient scheduling on many-core architectures. In this article, we develop a new approach that employs cyclo-static data flow techniques to provide a simple but efficient method of coordinating the data production and consumption in the expanded graphs. We demonstrate the advantage of our approach through experiments on real application models.

Published
2018

33. ADFG

Author

Loïc Besnard, Thierry Gautier, Jean-Pierre Talpin, Hai Nam Tran, Alexandre Honorat, Adnan Bouakaz, Tim, Events and Architectures (TEA), Inria Rennes – Bretagne Atlantique, Institut National de Recherche en Informatique et en Automatique (Inria)-Institut National de Recherche en Informatique et en Automatique (Inria)-LANGAGE ET GÉNIE LOGICIEL (IRISA-D4), Institut de Recherche en Informatique et Systèmes Aléatoires (IRISA), Université de Rennes (UR)-Institut National des Sciences Appliquées - Rennes (INSA Rennes), Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Université de Bretagne Sud (UBS)-École normale supérieure - Rennes (ENS Rennes)-Institut National de Recherche en Informatique et en Automatique (Inria)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS)-IMT Atlantique (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT)-Institut Mines-Télécom [Paris] (IMT)-Université de Rennes (UR)-Institut National des Sciences Appliquées - Rennes (INSA Rennes), Institut Mines-Télécom [Paris] (IMT)-Institut Mines-Télécom [Paris] (IMT)-Institut de Recherche en Informatique et Systèmes Aléatoires (IRISA), Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Université de Bretagne Sud (UBS)-École normale supérieure - Rennes (ENS Rennes)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS)-IMT Atlantique (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT)-Institut Mines-Télécom [Paris] (IMT), ANSYS, Université de Bretagne Sud (UBS)-Institut National des Sciences Appliquées - Rennes (INSA Rennes), Institut National des Sciences Appliquées (INSA)-Université de Rennes (UNIV-RENNES)-Institut National des Sciences Appliquées (INSA)-Université de Rennes (UNIV-RENNES)-Institut National de Recherche en Informatique et en Automatique (Inria)-École normale supérieure - Rennes (ENS Rennes)-Centre National de la Recherche Scientifique (CNRS)-Université de Rennes 1 (UR1), Université de Rennes (UNIV-RENNES)-CentraleSupélec-IMT Atlantique Bretagne-Pays de la Loire (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT)-Institut Mines-Télécom [Paris] (IMT)-Université de Bretagne Sud (UBS)-Institut National des Sciences Appliquées - Rennes (INSA Rennes), and Institut National des Sciences Appliquées (INSA)-Université de Rennes (UNIV-RENNES)-Institut National des Sciences Appliquées (INSA)-Université de Rennes (UNIV-RENNES)-École normale supérieure - Rennes (ENS Rennes)-Centre National de la Recherche Scientifique (CNRS)-Université de Rennes 1 (UR1)

Subjects
Signal processing, Computer science, Dataflow, Real-time computing, 020206 networking & telecommunications, 02 engineering and technology, Parallel computing, Throughput maximization, 020202 computer hardware & architecture, Scheduling (computing), 0202 electrical engineering, electronic engineering, information engineering, [INFO]Computer Science [cs], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, Minification
Abstract

International audience; This paper presents a synthesis tool of real-time system scheduling parameters: ADFG computes task periods and buuer sizes of systems as signal processing applications, resulting in a trade-oo between throughput maximization and buuer size minimization. ADFG synthesizes systems modeled by ultimately cyclo-static dataaow (UCSDF) graphs, an extension of the standard CSDF model. Two new synthesis algorithms are also introduced and evaluated.

Published
2017

34. How Much Do Farmers Expect to Implement for Traceability? Evidence From a Double-Bound Choices Experiment of Vietnamese Shrimp Aquaculture.

Author

KHUU, T. P. DONG, THI NGOC HOA NGUYEN, NGUYEN HAI NAM TRAN, YOKO SAITO, and TAKASHI MATSUISHI

Subjects
SHRIMP culture, WHITELEG shrimp, PENAEUS monodon, VARIABLE costs, FAIR trade goods
Abstract

Traceability is considered the most important requirement for shrimp products exported to global markets. However, implementing traceability in shrimp-exporting countries is challenging because of limited production at the local supply chain and lack of financial welfare awareness. This study aims to investigate the expected farm-gate price for traceability implementation using a double-bound dichotomous choice experiment. The censored regression model is used to estimate the factors influencing the anticipated farm-gate price of shrimp farmers. The survey was conducted in Ca Mau Province, Vietnam, by interviewing 71 Penaeus monodon Fabricius, 1798, and 43 Penaeus vannamei Boone, 1931, farmers. To implement traceability, P. monodon farmers estimated the farm-gate price at 10.17 USD.kg-1, while P. vannamei farmers expected 6.18 USD.kg-1. Application of international quality assurance certifications, willingness to implement traceability, land used, culture methods, shrimp species, current farm-gate price, and variable costs affected the expected farm-gate price. The attractive anticipated farm-gate price compensated for the negative influence of applying international quality assurance certifications, indicating that the farmers were willing to implement traceability. This suggests that the application of certifications increased the ability to implement traceability in the shrimp supply chain. The attractive farm-gate price for certified shrimp products would enhance their willingness to implement the traceability of shrimp products. [ABSTRACT FROM AUTHOR]

Published
2021
Full Text
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35. Scheduling analysis from architectural models of embedded multi-processor systems

Author

Hai Nam Tran, Christian Fotsing, Stéphane Rubini, Pierre Dissaux, Frank Singhoff, Lab-STICC_UBO_CACS_MOCS, Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance (Lab-STICC), École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Télécom Bretagne-Institut Brestois du Numérique et des Mathématiques (IBNM), Université de Brest (UBO)-Université européenne de Bretagne - European University of Brittany (UEB)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Télécom Bretagne-Institut Brestois du Numérique et des Mathématiques (IBNM), Université de Brest (UBO)-Université européenne de Bretagne - European University of Brittany (UEB)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS), Ellidiss Technologies [Brest], and Ellidiss Technologies

Subjects
[INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], Architecture description language, business.industry, Computer science, 0102 computer and information sciences, 02 engineering and technology, Dynamic priority scheduling, Multi processor, 01 natural sciences, Fair-share scheduling, 020202 computer hardware & architecture, Scheduling (computing), Fixed-priority pre-emptive scheduling, 010201 computation theory & mathematics, Two-level scheduling, Embedded system, 0202 electrical engineering, electronic engineering, information engineering, Computer Science (miscellaneous), [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, Model-driven architecture, business, Engineering (miscellaneous), computer, computer.programming_language
Abstract

As embedded systems need more and more computing power, many products require hardware platforms based on multiple processors. In case of real-time constrained systems, the use of scheduling analysis tools is mandatory to validate the design choices, and to better use the processing capacity of the system. To this end, this paper presents the extension of the scheduling analysis tool Cheddar to deal with multi-processor scheduling. In a Model Driven Engineering approach, useful information about the scheduling of the application is extracted from a model expressed with an architectural language called AADL. We also define how the AADL model must be written to express the standard policies for the multi-processor scheduling.

Published
2014

36. Cache-aware real-time scheduling simulator: implementation and return of experience

Author

Jalil Boukhobza, Frank Singhoff, Stéphane Rubini, Hai Nam Tran, Lab-STICC_UBO_CACS_MOCS, Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance (Lab-STICC), École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Télécom Bretagne-Institut Brestois du Numérique et des Mathématiques (IBNM), Université de Brest (UBO)-Université européenne de Bretagne - European University of Brittany (UEB)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Télécom Bretagne-Institut Brestois du Numérique et des Mathématiques (IBNM), and Université de Brest (UBO)-Université européenne de Bretagne - European University of Brittany (UEB)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)

Subjects
Rate-monotonic scheduling, Earliest deadline first scheduling, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], business.industry, Computer science, Distributed computing, 02 engineering and technology, Dynamic priority scheduling, Round-robin scheduling, [INFO.INFO-MO]Computer Science [cs]/Modeling and Simulation, Fair-share scheduling, Deadline-monotonic scheduling, 020202 computer hardware & architecture, Fixed-priority pre-emptive scheduling, 020204 information systems, Embedded system, Two-level scheduling, 0202 electrical engineering, electronic engineering, information engineering, Computer Science (miscellaneous), [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, business, Engineering (miscellaneous), Simulation
Abstract

International audience; Evaluating cache related preemption delay (CRPD) in preemptive scheduling context of Real-Time Embedded System (RTES) stays an open issue despite of its practical importance. Indeed, various parameters should be taken into account such as memory layout, cache utilization, processor utilization, priority assignment and scheduling algorithm. In state-of-the-art work, dependencies amongst those parameters are not investigated with precision because of the lack of scheduling analysis tool taking them into account. In this article, we present a tool to investigate and evaluate scheduling analysis of RTES with cache memory and various scheduling parameters. The work consists in modeling guidelines and implementation of a cache-aware scheduling simulator. Implementation is made in Cheddar, an open-source scheduling analyzer, which is freely available to researchers and practitioners. Experiments are conducted in order to illustrate applicability and performance of our tool. Furthermore, we discuss about implementation issues, problems raised and lessons learned from those experiments.

Published
2016

37. Instruction cache in hard real-time systems: modeling and integration in scheduling analysis tools with AADL

Author

Jalil Boukhobza, Hai Nam Tran, Stéphane Rubini, Frank Singhoff, Lab-STICC_UBO_CACS_MOCS, Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance (Lab-STICC), École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Télécom Bretagne-Institut Brestois du Numérique et des Mathématiques (IBNM), Université de Brest (UBO)-Université européenne de Bretagne - European University of Brittany (UEB)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Télécom Bretagne-Institut Brestois du Numérique et des Mathématiques (IBNM), and Université de Brest (UBO)-Université européenne de Bretagne - European University of Brittany (UEB)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)

Subjects
Rate-monotonic scheduling, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], business.industry, Computer science, Cache coloring, Distributed computing, Real-time computing, Dynamic priority scheduling, Fair-share scheduling, Fixed-priority pre-emptive scheduling, Embedded system, Two-level scheduling, [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, Cache, [INFO.INFO-OS]Computer Science [cs]/Operating Systems [cs.OS], business, Cache algorithms
Abstract

International audience; Cache prediction for real-time systems in a preemptive scheduling context is still an open issue despite its practical importance. In this paper, we propose a modeling approach for taking into account the cache memory in realtime scheduling analysis. The goal is to have a simple but practical implementation to handle the cache memory with a real-time scheduling analyzer. The proposed contribution consists of three main parts: (1) modeling the targeted system with the Architecture Analysis and Design Language (AADL), (2) applying the cache analysis methods in a real time scheduling analysis tool and (3) performing scheduling simulation to access schedulability. For such a purpose, we present an extension of both the scheduling analysis toolCheddarand of the AADL modeling language in order to integrate the cache modeling and analysis methodology we proposed. Experiments are presented to illustrate our propositions. They provide results on analysis that show examples of the timing impact of task preemption as well as the increase in overall responses time of the task set. This impact is important and the developed tool provides means to precisely assess it.

Published
2014

38. Effects of stocking densities and seaweed types as shelters on the survival, growth, and productivity of juvenile mud crabs (Scylla paramamosain)

Author

Thanh Toi, Huynh, Thi Ngoc Anh, Nguyen, Thi Tuyet Ngan, Pham, Nguyen Hai Nam, Tran, and Ngoc Hai, Tran

Abstract

The effects of utilizing green seaweed (Cladophorasp.) and red seaweed (Gracilaria tenuistipitata) as a shelter in the nursery rearing of juvenile mud crabs (Scylla paramamosain) at different stocking densities were investigated for 3 weeks. The investigation comprised a 3×2 factor with three stocking densities (200, 300, and 400 ind/m2) combined with two types of seaweed (green seaweed and red seaweed) randomly allocated in triplicate tanks. Juvenile crabs (0.81 ± 0.09 g) were stocked in 150-L tanks (tank bottom area: 0.3 m2) at a salinity of 15 g/L with constant aeration. Crabs were fed twice daily with frozen Artemiabiomass. The findings revealed that the survival and growth rate of crabs did not significantly respond to the combined effects of seaweed type and stocking density (P > 0.05). Crabs reared at a low density (200 ind/m2) grew faster than those reared at a high density (400 ind/m2), while seaweed type did not affect crab growth rates. Moreover, crab production increased noticeably as stocking density increased and was significantly influenced by the interaction. The highest crab production was found in the 400 ind/m2treatment with red seaweed as shelter when compared to other treatments (P < 0.05), indicating that this seaweed species is an ideal shelter for rearing juvenile crabs at high density.

Published
2023
Full Text
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39. Fine-Grained Runtime Monitoring of Real-Time Embedded Systems.

Author

Boukili, Zineb, Hai Nam Tran, and Plantec, Alain

Subjects
*MALWARE, *CYBERTERRORISM
Abstract

Dynamically ensuring the correctness of the functional behavior of a real-time embedded system is tedious, especially in the autonomous domain. Even though the current real-time task model provides sufficient information to perform basic schedulability tests, it is inadequate to be used in runtime monitoring to assert and guarantee the correctness of a system under hardware/- software malfunctions or malicious cyber attacks. In this article, we present a runtime monitoring approach based on a fine-grained model of real-time tasks. [ABSTRACT FROM AUTHOR]

Published
2022

40. An example of early scheduling analysis with AADL

Author

Stéphane Rubini, Hai-Nam Tran, Mourad DRIDI, Vincent Gaudel, Jalil Boukhobza, Alain Plantec, Christian Fotsing, Frank Singhoff, Dissaux, P., Legrand, J., Schach, A., Lab-STICC_UBO_CACS_MOCS, Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance (Lab-STICC), École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Télécom Bretagne-Institut Brestois du Numérique et des Mathématiques (IBNM), Université de Brest (UBO)-Université européenne de Bretagne - European University of Brittany (UEB)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Télécom Bretagne-Institut Brestois du Numérique et des Mathématiques (IBNM), Université de Brest (UBO)-Université européenne de Bretagne - European University of Brittany (UEB)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS), Ellidiss Technologies [Brest], and Ellidiss Technologies

Subjects
[INFO]Computer Science [cs]
Abstract

National audience; a presentation about AADL and scheduling analysis with Cheddar

41. Addressing Cache Related Preemption Delay in Fixed Priority Assignment

Author

Frank Singhoff, Stéphane Rubini, Hai Nam Tran, Jalil Boukhobza, Lab-STICC_UBO_CACS_MOCS, Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance (Lab-STICC), École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Télécom Bretagne-Institut Brestois du Numérique et des Mathématiques (IBNM), Université de Brest (UBO)-Université européenne de Bretagne - European University of Brittany (UEB)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Télécom Bretagne-Institut Brestois du Numérique et des Mathématiques (IBNM), and Université de Brest (UBO)-Université européenne de Bretagne - European University of Brittany (UEB)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)

Subjects
Hardware_MEMORYSTRUCTURES, Computer science, CPU cache, Distributed computing, Context (computing), Preemption, Processor scheduling, Cache-oblivious algorithm, Deadline-monotonic scheduling, Task (project management), [INFO]Computer Science [cs], Cache, Cache algorithms, ComputingMilieux_MISCELLANEOUS
Abstract

Handling cache related preemption delay (CRPD) in preemptive scheduling context for real-time embedded systems still stays an open issue despite of its practical importance. Indeed, classical priority assignment algorithms are only optimal when preemption costs are neglected. For example, with Audsley's Optimal Priority Assignment (OPA), as the original algorithm does not take CRPD into account, it fails frequently in identifying the schedulable task sets as it happens that the algorithm qualifies a task set to be schedulable, while it is practically not because of CRPD. In this article, we propose an approach to adapt fixed priority assignment algorithms to real-time embedded systems with cache memory. For such a purpose, we propose three extensions of the original OPA algorithm that have different degrees of pessimism, different complexities, and give different results in terms of schedulable task sets coverage. Exhaustive experimentations were achieved to evaluate the proposed approaches in terms of complexity and efficiency. The result shows that our approach provides a mean to guarantee the schedulability of the real-time embedded system while taking into account CRPD.

42. How Much Do Farmers Expect to Implement for Traceability? Evidence From a Double-Bound Choices Experiment of Vietnamese Shrimp Aquaculture

Author

T.P. DONG KHUU, THI NGOC HOA NGUYEN, NGUYEN HAI NAM TRAN, YOKO SAITO, and TAKASHI MATSUISHI

Subjects
Aquaculture. Fisheries. Angling, SH1-691
Abstract

Traceability is considered the most important requirement for shrimp products exported to global markets. However, implementing traceability in shrimp-exporting countries is challenging because of limited production at the local supply chain and lack of financial welfare awareness. This study aims to investigate the expected farm-gate price for traceability implementation using a double-bound dichotomous choice experiment. The censored regression model is used to estimate the factors influencing the anticipated farm-gate price of shrimp farmers. The survey was conducted in Ca Mau Province, Vietnam, by interviewing 71 Penaeus monodon Fabricius, 1798, and 43 Penaeus vannamei Boone, 1931, farmers. To implement traceability, P. monodon farmers estimated the farm-gate price at 10.17 USD.kg-1 , while P. vannamei farmers expected 6.18 USD.kg-1 . Application of international quality assurance certifications, willingness to implement traceability, land used, culture methods, shrimp species, current farm-gate price, and variable costs affected the expected farm-gate price. The attractive anticipated farm-gate price compensated for the negative influence of applying international quality assurance certifications, indicating that the farmers were willing to implement traceability. This suggests that the application of certifications increased the ability to implement traceability in the shrimp supply chain. The attractive farm-gate price for certified shrimp products would enhance their willingness to implement the traceability of shrimp products.

Published
2021
Full Text
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