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Neuromorphic cognitive computing offers a bio-inspired means to approach the natural intelligence of biological neural systems in silicon integrated circuits. Typically, such circuits either reproduce biophysical neuronal dynamics in great detail as tools for computational neuroscience, or abstract away the biology by simplifying the functional forms of neural computation in large-scale systems for machine intelligence with high integration density and energy efficiency. Here we report a hybrid which offers biophysical realism in the emulation of multi-compartmental neuronal network dynamics at very large scale with high implementation efficiency, and yet with high flexibility in configuring the functional form and the network topology. The integrate-and-fire array transceiver (IFAT) chip emulates the continuous-time analog membrane dynamics of 65 k two-compartment neurons with conductance-based synapses. Fired action potentials are registered as address-event encoded output spikes, while the four types of synapses coupling to each neuron are activated by address-event decoded input spikes for fully reconfigurable synaptic connectivity, facilitating virtual wiring as implemented by routing address-event spikes externally through synaptic routing table. Peak conductance strength of synapse activation specified by the address-event input spans three decades of dynamic range, digitally controlled by pulse width and amplitude modulation (PWAM) of the drive voltage activating the log-domain linear synapse circuit. Two nested levels of micro-pipelining in the IFAT architecture improve both throughput and efficiency of synaptic input. This two-tier micro-pipelining results in a measured sustained peak throughput of 73 Mspikes/s and overall chip-level energy efficiency of 22 pJ/spike. Non-uniformity in digitally encoded synapse strength due to analog mismatch is mitigated through single-point digital offset calibration. Combined with the flexibly layered and recurrent synaptic connectivity provided by hierarchical address-event routing of registered spike events through external memory, the IFAT lends itself to efficient large-scale emulation of general biophysical spiking neural networks, as well as rate-based mapping of rectified linear unit (ReLU) neural activations.

Carbon nanotubes (CNTs), are safe, biocompatible, bioactive, and biodegradable materials, and have sparked a lot of attention due to their unique characteristics in a variety of applications, including medical and dye industries, paper manufacturing and water purification. CNTs also have a strong film-forming potential, permitting them to be widely employed in constructing sensors and biosensors. This review concentrates on the application of CNT-based nanocomposites in the production of electrochemical sensors and biosensors. It emphasizes the synthesis and optimization of CNT-based sensors for a range of applications and outlines the benefits of using CNTs for biomolecule immobilization. In addition, the use of molecularly imprinted polymer (MIP)-CNTs in the production of electrochemical sensors is also discussed. The challenges faced by the current CNTs-based sensors, along with some the future perspectives and their future opportunities, are also briefly explained in this paper. RESEARCH HIGHLIGHTS: Review article on advanced Carbon-Nanotube (CNT)-based sensors and biosensors. The advantages of using CNTs for biomolecule immobilization and in electrochemical sensors and biosensors are discussed. The use of molecularly imprinted polymer-CNT nanocomposites in the production of electrochemical sensors is also discussed. Several characteristics, including sensor manufacturing, linear ranges, detection limits, and repeatability, are described in depth. Challenges and prospects using CNTs modified sensors have been proposed. [ABSTRACT FROM AUTHOR]

Recent demand and initiatives in brain research have driven significant interest toward developing chronically implantable neural interface systems with high spatiotemporal resolution and spatial coverage extending to the whole brain. Electroencephalography-based systems are noninvasive and cost efficient in monitoring neural activity across the brain, but suffer from fundamental limitations in spatiotemporal resolution. On the other hand, neural spike and local field potential (LFP) monitoring with penetrating electrodes offer higher resolution, but are highly invasive and inadequate for long-term use in humans due to unreliability in long-term data recording and risk for infection and inflammation. Alternatively, electrocorticography (ECoG) promises a minimally invasive, chronically implantable neural interface with resolution and spatial coverage capabilities that, with future technology scaling, may meet the needs of recently proposed brain initiatives. In this paper, we discuss the challenges and state-of-the-art technologies that are enabling next-generation fully implantable high-density ECoG interfaces, including details on electrodes, data acquisition frontends, stimulation drivers, and circuits and antennas for wireless communications and power delivery. Along with state-of-the-art implantable ECoG interface systems, we introduce a modular ECoG system concept based on a fully encapsulated neural interfacing acquisition chip (ENIAC). Multiple ENIACs can be placed across the cortical surface, enabling dense coverage over wide area with high spatiotemporal resolution. The circuit and system level details of ENIAC are presented, along with measurement results.

An adaptive buck-boost resonant regulating rectifier (B2 R3 ) with an integrated on-chip coil and low-loss H-Tree power/signal distribution is presented for efficient and robust wireless power transfer (WPT) over a wide range of input and load conditions. The B2 R3 integrated on a 9 mm2 chip powers integrated neural interfacing circuits as a load, with a TX-load power conversion efficiency of 2.64 % at 10 mm distance, resulting in a WPT system efficiency FoM of 102.

This paper presents a CMOS fully-integrated resonant regulating rectifier (IR3) for inductive power telemetry in implantable devices. Employing PWM and PFM feedback, the IR3 achieves 1.87% of delta VDD/VDD ratio despite a tenfold change in load with a 1nF decoupling capacitor. At 1V regulation of a 100μW load from a 144MHz RF input, the measured voltage conversion efficiency is greater than 92% at under 5.2mVpp ripple and 54% power conversion efficiency. Implemented in 180nm SOI CMOS, the IR3 circuit occupies 0.078mm2 active area.

This paper presents a fully-integrated 16-channel wireless neural interfacing SoC that employs an adiabatic stimulator powered directly from a 190-MHz on-chip antenna to eliminate bulky external components while simultaneously avoiding rectifier and regulator losses. Using a charge replenishing architecture, the stimulator outputs up to 145-μA, while achieving a 63.1% charge replenishing ratio and a stimulation efficiency factor of 6.0. Analog front-ends (AFEs) and telemetry circuitry are also included.