Search

The selective growth of germanium into nanoscale trenches on silicon substrates was ext. 7660investigated. These nanoscale trenches–the smallest size of which was 50 nm–were fabricated using the state-of-the-art shallow trench isolation technique. The quality of the Ge films was evaluated using transmission electron microscopy. It was found that the formation of threading dislocations (TDs) was effectively suppressed when using this deposition technique. It was considered that for the Ge grown in nanoscale Si areas (e.g., several tens of nanometers), the TDs were readily removed during cyclic thermal annealing, predominantly because their gliding distance to the SiO2 sidewalls was very short. Therefore, nanoscale epitaxial growth technology can be used to deposit Ge films on lattice-mismatched Si substrates with a reduced defect density.

The widely accepted universal dependence of N- and P-MOSFETs carrier mobility on effective vertical field E eff = (ηQ inv + Q b ) ϵ Si has been re-examined. New empirical mobility models for both electrons and holes expressed in terms of Tox, Vt and Vg explicitly are formulated. New empirical mobility models are confirmed with experimental data taken from devices of different technologies. It is also shown that the hole mobility of both the surface and buried channel P-MOSFETs can be unified for the first time by a single universal mobility equation, rather than two separate equations as previously thought necessary.