Search

This report documents the program and outcomes of the Dagstuhl Seminar 22341 - Power and Energy-Aware Computing on Heterogeneous Systems (PEACHES). The seminar was held on Aug 21 – Aug 26, 2022, and brought together 35 international experts from different domains across the entire system stack – from system designers to programmers and operators. We present the abstracts of 18 talks and 5 summaries of discussions and active sessions on the principal topic areas: Energy Transparency from Hardware to Software, Energy Optimisation and Management, Computing for Sustainability, Green Computing Hackathon, and Disruptive Paradigms., DagRep, Volume 12, Issue 8, pages 31-59

Classical core memory was entirely non- volatile and could keep at least part of the operating system (OS) in main memory even across power cycles. These days we can have terabytes of NVRAM to repeat this approach, albeit on an entirely different scale and with large parts of the OS state still kept in the volatile CPU caches. In this paper, we discuss our experiences of running large modern operating systems including their applications entirely in NVRAM. We adapted stock Linux and FreeBSD kernels to work exclusively with NVRAM by hiding all DRAM from the kernels at boot time to establish a realistic performance baseline without changing anything else. Following this entirely NVRAM-agnostic approach, we could observe an effective performance penalty of a factor of about four, but only negligible increases in whole-system power draw. For our system with two CPU sockets and 56 cores total, we also observed a reduction in power draw in several scenarios. Due to prolonged execution times, the energy consumption increased as well for these measured workloads. While this might be discouraging at first sight, this result was achieved without any performance tuning as to the specific characteristics of today’s NVRAM technology. Therefore, we are also discussing means to mitigate the observed shortcomings by integrating NVRAM appropriately into the memory hierarchy of future robust persistent systems., Technical reports / Department Informatik; CS-2023-01

Invasive computing is a paradigm for designing and programming future parallel computing systems. For systems with 1,000 or more cores on a chip, resource-aware programming is of utmost importance to obtain high utilisation as well as computational, energy and power efficiency. Invasive computing provides a programmer explicit handles to specify and argue about resource requirements desired or required in different phases of execution: In an invade phase, an application asks the operating system to allocate a set of processor, memory and communication resources to be claimed. In a subsequent infect phase, the parallel workload is spread and executed on the obtained claim of resources. Finally, if the degree of parallelism should be lower again, a retreat operation frees the claim again, and the application resumes a sequential execution. To support this idea of self-adaptive and resource-aware programming, not only new programming concepts, languages, compilers, and operating systems were needed to be developed, but also revolutionary architectural changes in the design of MPSoCs (multiprocessor systems-on-a-chip) to efficiently support invasion, infection, and retreat operations. This book gives a comprehensive overview of all aspects of invasive computing., Invasives Rechnen ist ein Paradigma für den Entwurf und die Programmierung zukünftiger paralleler Rechensysteme. Für Systeme mit 1.000 oder mehr Kernen auf einem Chip ist eine ressourcengewahre Programmierung von größter Bedeutung, um eine hohe Auslastung sowie Rechen-, Energie- und Leistungseffizienz zu erreichen. Invasives Rechnen bietet dem Programmierer bzw. der Programmiererin explizite Möglichkeiten, die in verschiedenen Phasen der Ausführung gewünschten oder erforderlichen Ressourcenanforderungen zu spezifizieren: In einer Invasionsphase fordert eine Anwendung vom Betriebssystem eine Reihe gewünschter Prozessor-, Speicher- und Kommunikationsressourcen an. In einer anschließenden Infektionsphase wird die parallele Arbeitslast auf die bereitgestellten Ressourcen verteilt und ausgeführt. Nimmt der Grad der Parallelität während der Programmausführung ab, können die allozierten Ressourcen durch eine Rückzugsoperation wieder freigegeben werden, und die Anwendung wird wieder sequenziell ausgeführt. Um diese Idee der selbstadaptiven und ressourcengewahren Programmierung zu realisieren, mussten nicht nur neue Programmierkonzepte, Sprachen, Compiler und Betriebssysteme entwickelt werden, sondern auch revolutionäre architektonische Änderungen im Entwurf von MPSoCs (Multiprozessorsystemen auf einem Chip), um Invasions-, Infektions- und Rückzugsoperationen effizient zu unterstützen. Dieses Buch gibt einen umfassenden Überblick über alle Aspekte des invasiven Rechnens.

DFG

For dynamic systems, it is mandatory that all components operate on predictably “fresh” data. This requirement constitutes a challenge, in particular, when Internet-based or wireless communication is involved. We propose X-Pace, an approach based on cross-layer pacing, to achieve predictably low communication latency in the presence of varying network channel properties and node performance.

Electrical energy is the single most important operating resource to computer systems. Although the energy demand of computers is an invisible system property by itself, the impact of energy demand is omnipresent and obvious in manifold forms of appearance. Sudden system failures (i.e., system breakdowns) and recurrent standard system operations (i.e., system charging) serve as practical examples. Energy demand of hardware components is a physical property of integrated transistor circuits that build our computers today. However, dynamic energy demand at the hardware level is caused by system activities (i.e., processes) at the software level. The analysis and improvement of system software is in focus due to the causal relationship: system software yields challenges and opportunities in equal measure in order to reduce the energy demand of the system at the hardware level. In particular, fine-tuning of system components offers distinct measures to improve the energy efficiency of computer systems. Improvements concern the coherent design of application and system software under consideration of hardware aspects. This thesis presents, implements, and evaluates unique concepts for proactive energy-aware computing on energy-efficient systems-on-a-chip. In particular, it contributes a development method for energy-aware programming that originates in static and dynamic program analysis to support programmers at the design of energy-aware programs. To assist programmers in reducing the energy demand of their programs, the thesis proposes a software-hardware tooling infrastructure that combines energy-aware programming techniques with automatised energy demand analysis at system level. To further reduce the energy demand of computer systems, the thesis implements a process executive at the operating-system level that exploits a priori information at run time to reduce the energy demand of processes. The corresponding cross-layer approach enables the transfer of programmers’ knowledge to the operating system to reduce the energy demand at run time. The thesis is first to combine dynamic program analysis techniques and the automatic creation of program variants to support energy-aware programming at the operating-system level. The distinct combination of application knowledge to identify and set important adjusting screws for the energy efficient operation of a computing system bound to an operating system is claimed to be novel. Elektrische Energie ist die wichtigste Betriebsressource für Computersysteme. Obwohl der Energiebedarf von Computern eine weitgehend unsichtbare Systemeigenschaft darstellt, sind seine Auswirkungen allgegenwärtig und in vielfältigen Erscheinungsformen offensichtlich. Plötzliches Systemversagen (z.B. Systemabsturz) und wiederkehrende Standardvorgänge (z. B. Akkuaufladung) dienen als Beispiele der Praxis. Der Energiebedarf von Hardwarekomponenten ist eine physikalische Eigenschaft integrierter Transistorschaltungen, aus denen heutige Computer bestehen. Der dynamische Energiebedarf der Hardware wird jedoch durch Systemaktivitäten (z.B. Prozesse) der Software verursacht. Die Analyse und Verbesserung der Systemsoftware steht aufgrund des folgenden Kausalzusammenhangs im Vordergrund: Systemsoftware bringt Herausforderungen und Chancen gleichermaßen mit sich, um den Energiebedarf auf Hardwareebene der Systeme zu reduzieren. Insbesondere bietet die Feinabstimmung von Systemkomponenten Maßnahmen zur deutlichen Verbesserung der Energieeffizienz von Computersystemen an. Solche Verbesserungen betreffen die kohärente Gestaltung von Anwendungs- und Systemsoftware unter Berücksichtigung von Hardwareaspekten. Diese Dissertation präsentiert, implementiert und evaluiert spezifische Konzepte für proaktive energiebewusste Rechenvorgänge bei energieeffizienten Rechnern, die auf Ein-Chip-Systemen basieren. Insbesondere wird die Entwicklungsmethode für energiebewusstes Programmieren, die ihre Wurzeln in der statischen und dynamischen Programmanalyse hat, als Beitrag geleistet, um Programmierern bei der Entwicklung energiebewusster Programme zu helfen. Zur zielführenden Unterstützung schlägt die Dissertation hierfür eine Software und Hardware umfassende Arbeitsumgebung vor, die energiebewusste Programmiertechniken mit automatisierter Energiebedarfsanalyse auf Systemebene kombiniert. Zur weiteren Verringerung des Energiebedarfs von Computersystemen implementiert die Arbeit eine Laufzeitexekutive für Prozesse auf der Betriebssystemebene, die unter Verwendung von apriorischem Wissen den Energiebedarf von Prozessen zur Laufzeit verringert. Der entsprechende schichtenübergreifende Ansatz ermöglicht den Wissenstransfer zwischen dem Programmierer und dem Betriebssystem. Die vorliegende Arbeit kombiniert als Erste dynamische Programmanalyse und Variantenbildung zur energiebewussten Systemprogrammierung. Diese Art der Zusammenführung von Anwendungswissen, um wichtige Stellschrauben für einen energieoptimierten Betrieb eines Rechensystems an ein Betriebssystem zu knüpfen, wird als neu beansprucht.

The fact that many benchmarks for evaluating worst-case execution time (WCET) analysis tools are based on real-world applications greatly increases the value of their results. However, at the same time, the complexity of these programs makes it difficult, sometimes even impossible, to obtain all corresponding flow facts (i.e., loop bounds, infeasible paths, and input values triggering the WCET), which are essential for a comprehensive evaluation. In this paper, we address this problem by presenting GenE, a benchmark generator that in addition to source code also provides the flow facts of the benchmarks created. To generate a new benchmark, the tool combines code patterns that are commonly found in real-time applications and are challenging for WCET analyzers. By keeping track of how patterns are put together, GenE is able to determine the flow facts of the resulting benchmark based on the known flow facts of the patterns used. Using this information, it is straightforward to synthesize the accurate WCET, which can then serve as a baseline for the evaluation of WCET analyzers.

Today's generation of sensor networks reflect several changes in system characteristics over traditional sensor networks. These changes affect three key aspects: energy as a fundamental resource, stream data processing, and the inherently dynamic structure of the overall system. In this paper we extract and present eight distinct challenges aligned to the key aspects which need to be addressed in the future. We use data of ongoing science and research projects to extract the most important challenges. These challenges need to be tackled in order to provide the basis for a flexible and adaptive system design which supports data-stream processing in energy-constrained ad-hoc networks.